10753 lines
418 KiB
Plaintext
10753 lines
418 KiB
Plaintext
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/home/spider_pig/src/c/pico/clacer/build/clacer.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .boot2 00000100 10000000 10000000 00001000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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1 .text 000053e8 10000100 10000100 00001100 2**3
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 0000105c 100054e8 100054e8 000064e8 2**3
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .binary_info 0000001c 10006544 10006544 00007544 2**2
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CONTENTS, ALLOC, LOAD, DATA
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4 .ram_vector_table 000000c0 20000000 20000000 00008824 2**2
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CONTENTS
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5 .data 00000764 200000c0 10006560 000080c0 2**4
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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6 .uninitialized_data 00000000 20000824 20000824 000088e4 2**0
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CONTENTS
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7 .scratch_x 00000000 20040000 20040000 000088e4 2**0
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CONTENTS
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8 .scratch_y 00000000 20041000 20041000 000088e4 2**0
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CONTENTS
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9 .bss 00000564 20000828 20000828 00008828 2**3
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ALLOC
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10 .heap 00000800 20000d8c 20000d8c 000088e4 2**2
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CONTENTS, READONLY
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11 .stack_dummy 00000800 20041000 20041000 00009100 2**5
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CONTENTS, READONLY
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12 .ARM.attributes 00000028 00000000 00000000 00009900 2**0
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CONTENTS, READONLY
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13 .comment 00000065 00000000 00000000 00009928 2**0
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CONTENTS, READONLY
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14 .debug_info 00018b2f 00000000 00000000 0000998d 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_abbrev 00004e98 00000000 00000000 000224bc 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_loclists 0000a09c 00000000 00000000 00027354 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_aranges 00001128 00000000 00000000 000313f0 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_rnglists 00000f22 00000000 00000000 00032518 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .debug_line 0000f3ff 00000000 00000000 0003343a 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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20 .debug_str 00004600 00000000 00000000 00042839 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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21 .debug_frame 00002170 00000000 00000000 00046e3c 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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22 .debug_line_str 0000035a 00000000 00000000 00048fac 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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/home/spider_pig/src/c/pico/clacer/build/clacer.elf: file format elf32-littlearm
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Disassembly of section .boot2:
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10000000 <__boot2_start__>:
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10000000: 4b32b500 .word 0x4b32b500
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10000004: 60582021 .word 0x60582021
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10000008: 21026898 .word 0x21026898
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1000000c: 60984388 .word 0x60984388
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10000010: 611860d8 .word 0x611860d8
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10000014: 4b2e6158 .word 0x4b2e6158
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10000018: 60992100 .word 0x60992100
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1000001c: 61592102 .word 0x61592102
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10000020: 22f02101 .word 0x22f02101
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10000024: 492b5099 .word 0x492b5099
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10000028: 21016019 .word 0x21016019
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1000002c: 20356099 .word 0x20356099
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10000030: f844f000 .word 0xf844f000
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10000034: 42902202 .word 0x42902202
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10000038: 2106d014 .word 0x2106d014
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1000003c: f0006619 .word 0xf0006619
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10000040: 6e19f834 .word 0x6e19f834
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10000044: 66192101 .word 0x66192101
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10000048: 66182000 .word 0x66182000
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1000004c: f000661a .word 0xf000661a
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10000050: 6e19f82c .word 0x6e19f82c
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10000054: 6e196e19 .word 0x6e196e19
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10000058: f0002005 .word 0xf0002005
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1000005c: 2101f82f .word 0x2101f82f
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10000060: d1f94208 .word 0xd1f94208
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10000064: 60992100 .word 0x60992100
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10000068: 6019491b .word 0x6019491b
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1000006c: 60592100 .word 0x60592100
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10000070: 481b491a .word 0x481b491a
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10000074: 21016001 .word 0x21016001
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10000078: 21eb6099 .word 0x21eb6099
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1000007c: 21a06619 .word 0x21a06619
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10000080: f0006619 .word 0xf0006619
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10000084: 2100f812 .word 0x2100f812
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10000088: 49166099 .word 0x49166099
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1000008c: 60014814 .word 0x60014814
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10000090: 60992101 .word 0x60992101
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10000094: 2800bc01 .word 0x2800bc01
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10000098: 4700d000 .word 0x4700d000
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1000009c: 49134812 .word 0x49134812
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100000a0: c8036008 .word 0xc8036008
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100000a4: 8808f380 .word 0x8808f380
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100000a8: b5034708 .word 0xb5034708
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100000ac: 20046a99 .word 0x20046a99
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100000b0: d0fb4201 .word 0xd0fb4201
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100000b4: 42012001 .word 0x42012001
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100000b8: bd03d1f8 .word 0xbd03d1f8
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100000bc: 6618b502 .word 0x6618b502
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100000c0: f7ff6618 .word 0xf7ff6618
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100000c4: 6e18fff2 .word 0x6e18fff2
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100000c8: bd026e18 .word 0xbd026e18
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100000cc: 40020000 .word 0x40020000
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100000d0: 18000000 .word 0x18000000
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100000d4: 00070000 .word 0x00070000
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100000d8: 005f0300 .word 0x005f0300
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100000dc: 00002221 .word 0x00002221
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100000e0: 180000f4 .word 0x180000f4
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100000e4: a0002022 .word 0xa0002022
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100000e8: 10000100 .word 0x10000100
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100000ec: e000ed08 .word 0xe000ed08
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...
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100000fc: 7a4eb274 .word 0x7a4eb274
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Disassembly of section .text:
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10000100 <__VECTOR_TABLE>:
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10000100: 20042000 .word 0x20042000
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10000104: 100001f7 .word 0x100001f7
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10000108: 100001c3 .word 0x100001c3
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1000010c: 100001c5 .word 0x100001c5
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10000110: 100001c1 .word 0x100001c1
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10000114: 100001c1 .word 0x100001c1
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10000118: 100001c1 .word 0x100001c1
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1000011c: 100001c1 .word 0x100001c1
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10000120: 100001c1 .word 0x100001c1
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10000124: 100001c1 .word 0x100001c1
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10000128: 100001c1 .word 0x100001c1
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1000012c: 100001c7 .word 0x100001c7
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10000130: 100001c1 .word 0x100001c1
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10000134: 100001c1 .word 0x100001c1
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10000138: 100001c9 .word 0x100001c9
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1000013c: 100001cb .word 0x100001cb
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10000140: 100001cd .word 0x100001cd
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10000144: 100001cd .word 0x100001cd
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10000148: 100001cd .word 0x100001cd
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1000014c: 100001cd .word 0x100001cd
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10000150: 100001cd .word 0x100001cd
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10000154: 100001cd .word 0x100001cd
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10000158: 100001cd .word 0x100001cd
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1000015c: 100001cd .word 0x100001cd
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10000160: 100001cd .word 0x100001cd
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10000164: 100001cd .word 0x100001cd
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10000168: 100001cd .word 0x100001cd
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1000016c: 100001cd .word 0x100001cd
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10000170: 100001cd .word 0x100001cd
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10000174: 100001cd .word 0x100001cd
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10000178: 100001cd .word 0x100001cd
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1000017c: 100001cd .word 0x100001cd
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10000180: 100001cd .word 0x100001cd
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10000184: 100001cd .word 0x100001cd
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10000188: 100001cd .word 0x100001cd
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1000018c: 100001cd .word 0x100001cd
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10000190: 100001cd .word 0x100001cd
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10000194: 100001cd .word 0x100001cd
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10000198: 100001cd .word 0x100001cd
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1000019c: 100001cd .word 0x100001cd
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100001a0: 100001cd .word 0x100001cd
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100001a4: 100001cd .word 0x100001cd
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100001a8: 100001cd .word 0x100001cd
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100001ac: 100001cd .word 0x100001cd
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100001b0: 100001cd .word 0x100001cd
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100001b4: 100001cd .word 0x100001cd
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100001b8: 100001cd .word 0x100001cd
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100001bc: 100001cd .word 0x100001cd
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100001c0 <isr_invalid>:
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100001c0: be00 bkpt 0x0000
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100001c2 <isr_nmi>:
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100001c2: be00 bkpt 0x0000
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100001c4 <isr_hardfault>:
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100001c4: be00 bkpt 0x0000
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100001c6 <isr_svcall>:
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100001c6: be00 bkpt 0x0000
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100001c8 <isr_pendsv>:
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100001c8: be00 bkpt 0x0000
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100001ca <isr_systick>:
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100001ca: be00 bkpt 0x0000
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100001cc <__unhandled_user_irq>:
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100001cc: f3ef 8005 mrs r0, IPSR
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100001d0: 3810 subs r0, #16
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100001d2 <unhandled_user_irq_num_in_r0>:
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100001d2: be00 bkpt 0x0000
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100001d4 <binary_info_header>:
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100001d4: 7188ebf2 .word 0x7188ebf2
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100001d8: 10006544 .word 0x10006544
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100001dc: 10006560 .word 0x10006560
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100001e0: 10000234 .word 0x10000234
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100001e4: e71aa390 .word 0xe71aa390
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100001e8 <_entry_point>:
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100001e8: 2000 movs r0, #0
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100001ea: 491f ldr r1, [pc, #124] @ (10000268 <hold_non_core0_in_bootrom+0xa>)
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100001ec: 6008 str r0, [r1, #0]
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100001ee: c806 ldmia r0!, {r1, r2}
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100001f0: f381 8808 msr MSP, r1
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100001f4: 4710 bx r2
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100001f6 <_reset_handler>:
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100001f6: 481d ldr r0, [pc, #116] @ (1000026c <hold_non_core0_in_bootrom+0xe>)
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100001f8: 6800 ldr r0, [r0, #0]
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100001fa: 2800 cmp r0, #0
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100001fc: d12f bne.n 1000025e <hold_non_core0_in_bootrom>
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100001fe: a40d add r4, pc, #52 @ (adr r4, 10000234 <data_cpy_table>)
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10000200: cc0e ldmia r4!, {r1, r2, r3}
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10000202: 2900 cmp r1, #0
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10000204: d002 beq.n 1000020c <_reset_handler+0x16>
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10000206: f000 f812 bl 1000022e <data_cpy>
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1000020a: e7f9 b.n 10000200 <_reset_handler+0xa>
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1000020c: 4918 ldr r1, [pc, #96] @ (10000270 <hold_non_core0_in_bootrom+0x12>)
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1000020e: 4a19 ldr r2, [pc, #100] @ (10000274 <hold_non_core0_in_bootrom+0x16>)
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10000210: 2000 movs r0, #0
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10000212: e000 b.n 10000216 <bss_fill_test>
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10000214 <bss_fill_loop>:
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10000214: c101 stmia r1!, {r0}
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10000216 <bss_fill_test>:
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10000216: 4291 cmp r1, r2
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10000218: d1fc bne.n 10000214 <bss_fill_loop>
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1000021a <platform_entry>:
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1000021a: 4917 ldr r1, [pc, #92] @ (10000278 <hold_non_core0_in_bootrom+0x1a>)
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1000021c: 4788 blx r1
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1000021e: 4917 ldr r1, [pc, #92] @ (1000027c <hold_non_core0_in_bootrom+0x1e>)
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10000220: 4788 blx r1
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10000222: 4917 ldr r1, [pc, #92] @ (10000280 <hold_non_core0_in_bootrom+0x22>)
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10000224: 4788 blx r1
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10000226: be00 bkpt 0x0000
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10000228: e7fd b.n 10000226 <platform_entry+0xc>
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1000022a <data_cpy_loop>:
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1000022a: c901 ldmia r1!, {r0}
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1000022c: c201 stmia r2!, {r0}
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1000022e <data_cpy>:
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1000022e: 429a cmp r2, r3
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10000230: d3fb bcc.n 1000022a <data_cpy_loop>
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10000232: 4770 bx lr
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10000234 <data_cpy_table>:
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10000234: 10006560 .word 0x10006560
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10000238: 200000c0 .word 0x200000c0
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1000023c: 20000824 .word 0x20000824
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10000240: 10006cc4 .word 0x10006cc4
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10000244: 20040000 .word 0x20040000
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10000248: 20040000 .word 0x20040000
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1000024c: 10006cc4 .word 0x10006cc4
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10000250: 20041000 .word 0x20041000
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10000254: 20041000 .word 0x20041000
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10000258: 00000000 .word 0x00000000
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1000025c: 4770 bx lr
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1000025e <hold_non_core0_in_bootrom>:
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1000025e: 4809 ldr r0, [pc, #36] @ (10000284 <hold_non_core0_in_bootrom+0x26>)
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10000260: f003 f9b6 bl 100035d0 <rom_func_lookup>
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10000264: 4700 bx r0
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10000266: 0000 .short 0x0000
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10000268: e000ed08 .word 0xe000ed08
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1000026c: d0000000 .word 0xd0000000
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10000270: 20000828 .word 0x20000828
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10000274: 20000d8c .word 0x20000d8c
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10000278: 100022e1 .word 0x100022e1
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1000027c: 100005e1 .word 0x100005e1
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10000280: 100022a1 .word 0x100022a1
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10000284: 00005657 .word 0x00005657
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10000288 <__bi_50>:
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10000288: 50520006 5360b3ab 10006418 ..RP..`S.d..
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10000294 <__bi_38>:
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10000294: 50520006 02031c86 10006428 ..RP....(d..
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100002a0 <__bi_30>:
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100002a0: 50520006 9da22254 10006430 ..RPT"..0d..
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100002ac <__bi_22>:
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100002ac: 50520005 68f465de 10006cc4 ..RP.e.h.l..
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100002b8 <_init>:
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100002b8: b5f8 push {r3, r4, r5, r6, r7, lr}
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100002ba: 46c0 nop @ (mov r8, r8)
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100002bc <deregister_tm_clones>:
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100002bc: 4804 ldr r0, [pc, #16] @ (100002d0 <deregister_tm_clones+0x14>)
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100002be: 4b05 ldr r3, [pc, #20] @ (100002d4 <deregister_tm_clones+0x18>)
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100002c0: b510 push {r4, lr}
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100002c2: 4283 cmp r3, r0
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100002c4: d003 beq.n 100002ce <deregister_tm_clones+0x12>
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100002c6: 4b04 ldr r3, [pc, #16] @ (100002d8 <deregister_tm_clones+0x1c>)
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100002c8: 2b00 cmp r3, #0
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100002ca: d000 beq.n 100002ce <deregister_tm_clones+0x12>
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100002cc: 4798 blx r3
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100002ce: bd10 pop {r4, pc}
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100002d0: 20000824 .word 0x20000824
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100002d4: 20000824 .word 0x20000824
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100002d8: 00000000 .word 0x00000000
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100002dc <register_tm_clones>:
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100002dc: 4806 ldr r0, [pc, #24] @ (100002f8 <register_tm_clones+0x1c>)
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100002de: 4907 ldr r1, [pc, #28] @ (100002fc <register_tm_clones+0x20>)
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100002e0: 1a09 subs r1, r1, r0
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100002e2: 108b asrs r3, r1, #2
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100002e4: 0fc9 lsrs r1, r1, #31
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100002e6: 18c9 adds r1, r1, r3
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100002e8: b510 push {r4, lr}
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100002ea: 1049 asrs r1, r1, #1
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100002ec: d003 beq.n 100002f6 <register_tm_clones+0x1a>
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100002ee: 4b04 ldr r3, [pc, #16] @ (10000300 <register_tm_clones+0x24>)
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100002f0: 2b00 cmp r3, #0
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100002f2: d000 beq.n 100002f6 <register_tm_clones+0x1a>
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100002f4: 4798 blx r3
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100002f6: bd10 pop {r4, pc}
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100002f8: 20000824 .word 0x20000824
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100002fc: 20000824 .word 0x20000824
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10000300: 00000000 .word 0x00000000
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10000304 <__do_global_dtors_aux>:
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10000304: b510 push {r4, lr}
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10000306: 4c07 ldr r4, [pc, #28] @ (10000324 <__do_global_dtors_aux+0x20>)
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10000308: 7823 ldrb r3, [r4, #0]
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1000030a: 2b00 cmp r3, #0
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1000030c: d109 bne.n 10000322 <__do_global_dtors_aux+0x1e>
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1000030e: f7ff ffd5 bl 100002bc <deregister_tm_clones>
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10000312: 4b05 ldr r3, [pc, #20] @ (10000328 <__do_global_dtors_aux+0x24>)
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10000314: 2b00 cmp r3, #0
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10000316: d002 beq.n 1000031e <__do_global_dtors_aux+0x1a>
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10000318: 4804 ldr r0, [pc, #16] @ (1000032c <__do_global_dtors_aux+0x28>)
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1000031a: e000 b.n 1000031e <__do_global_dtors_aux+0x1a>
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1000031c: bf00 nop
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1000031e: 2301 movs r3, #1
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10000320: 7023 strb r3, [r4, #0]
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10000322: bd10 pop {r4, pc}
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10000324: 20000928 .word 0x20000928
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10000328: 00000000 .word 0x00000000
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1000032c: 100054e8 .word 0x100054e8
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10000330 <frame_dummy>:
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10000330: 4b05 ldr r3, [pc, #20] @ (10000348 <frame_dummy+0x18>)
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10000332: b510 push {r4, lr}
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10000334: 2b00 cmp r3, #0
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10000336: d003 beq.n 10000340 <frame_dummy+0x10>
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10000338: 4904 ldr r1, [pc, #16] @ (1000034c <frame_dummy+0x1c>)
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1000033a: 4805 ldr r0, [pc, #20] @ (10000350 <frame_dummy+0x20>)
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1000033c: e000 b.n 10000340 <frame_dummy+0x10>
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1000033e: bf00 nop
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10000340: f7ff ffcc bl 100002dc <register_tm_clones>
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10000344: bd10 pop {r4, pc}
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10000346: 46c0 nop @ (mov r8, r8)
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|
10000348: 00000000 .word 0x00000000
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1000034c: 2000092c .word 0x2000092c
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10000350: 100054e8 .word 0x100054e8
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|
|
10000354 <sm_config_set_clkdiv>:
|
|
10000354: b570 push {r4, r5, r6, lr}
|
|
10000356: 0006 movs r6, r0
|
|
10000358: 1c0d adds r5, r1, #0
|
|
1000035a: 1c08 adds r0, r1, #0
|
|
1000035c: f004 f838 bl 100043d0 <__wrap___aeabi_f2uiz>
|
|
10000360: b284 uxth r4, r0
|
|
10000362: 2c00 cmp r4, #0
|
|
10000364: d012 beq.n 1000038c <sm_config_set_clkdiv+0x38>
|
|
10000366: 0020 movs r0, r4
|
|
10000368: f004 f80a bl 10004380 <__wrap___aeabi_ui2f>
|
|
1000036c: 1c01 adds r1, r0, #0
|
|
1000036e: 1c28 adds r0, r5, #0
|
|
10000370: f003 ffdd bl 1000432e <__wrap___aeabi_fsub>
|
|
10000374: 2187 movs r1, #135 @ 0x87
|
|
10000376: 05c9 lsls r1, r1, #23
|
|
10000378: f003 fff9 bl 1000436e <__wrap___aeabi_fmul>
|
|
1000037c: f004 f828 bl 100043d0 <__wrap___aeabi_f2uiz>
|
|
10000380: b2c3 uxtb r3, r0
|
|
10000382: 021b lsls r3, r3, #8
|
|
10000384: 0424 lsls r4, r4, #16
|
|
10000386: 431c orrs r4, r3
|
|
10000388: 6034 str r4, [r6, #0]
|
|
1000038a: bd70 pop {r4, r5, r6, pc}
|
|
1000038c: 2300 movs r3, #0
|
|
1000038e: e7f8 b.n 10000382 <sm_config_set_clkdiv+0x2e>
|
|
|
|
10000390 <pio_get_default_sm_config>:
|
|
10000390: b510 push {r4, lr}
|
|
10000392: 0004 movs r4, r0
|
|
10000394: 2210 movs r2, #16
|
|
10000396: 2100 movs r1, #0
|
|
10000398: f004 f8e0 bl 1000455c <__wrap_memset>
|
|
1000039c: 2380 movs r3, #128 @ 0x80
|
|
1000039e: 025b lsls r3, r3, #9
|
|
100003a0: 6023 str r3, [r4, #0]
|
|
100003a2: 23f8 movs r3, #248 @ 0xf8
|
|
100003a4: 025b lsls r3, r3, #9
|
|
100003a6: 6063 str r3, [r4, #4]
|
|
100003a8: 2380 movs r3, #128 @ 0x80
|
|
100003aa: 02db lsls r3, r3, #11
|
|
100003ac: 60a3 str r3, [r4, #8]
|
|
100003ae: 23c0 movs r3, #192 @ 0xc0
|
|
100003b0: 031b lsls r3, r3, #12
|
|
100003b2: 60a3 str r3, [r4, #8]
|
|
100003b4: 0020 movs r0, r4
|
|
100003b6: bd10 pop {r4, pc}
|
|
|
|
100003b8 <tft_program_get_default_config>:
|
|
100003b8: b570 push {r4, r5, r6, lr}
|
|
100003ba: 0004 movs r4, r0
|
|
100003bc: 000d movs r5, r1
|
|
100003be: f7ff ffe7 bl 10000390 <pio_get_default_sm_config>
|
|
100003c2: 1c6a adds r2, r5, #1
|
|
100003c4: 6863 ldr r3, [r4, #4]
|
|
100003c6: 4909 ldr r1, [pc, #36] @ (100003ec <tft_program_get_default_config+0x34>)
|
|
100003c8: 400b ands r3, r1
|
|
100003ca: 01ed lsls r5, r5, #7
|
|
100003cc: 432b orrs r3, r5
|
|
100003ce: 0312 lsls r2, r2, #12
|
|
100003d0: 4313 orrs r3, r2
|
|
100003d2: 6063 str r3, [r4, #4]
|
|
100003d4: 68e2 ldr r2, [r4, #12]
|
|
100003d6: 00d2 lsls r2, r2, #3
|
|
100003d8: 08d2 lsrs r2, r2, #3
|
|
100003da: 2180 movs r1, #128 @ 0x80
|
|
100003dc: 0589 lsls r1, r1, #22
|
|
100003de: 430a orrs r2, r1
|
|
100003e0: 60e2 str r2, [r4, #12]
|
|
100003e2: 4a03 ldr r2, [pc, #12] @ (100003f0 <tft_program_get_default_config+0x38>)
|
|
100003e4: 4013 ands r3, r2
|
|
100003e6: 6063 str r3, [r4, #4]
|
|
100003e8: 0020 movs r0, r4
|
|
100003ea: bd70 pop {r4, r5, r6, pc}
|
|
100003ec: fffe007f .word 0xfffe007f
|
|
100003f0: 9fffffff .word 0x9fffffff
|
|
|
|
100003f4 <set_sys_clock_khz>:
|
|
100003f4: b570 push {r4, r5, r6, lr}
|
|
100003f6: b084 sub sp, #16
|
|
100003f8: 0006 movs r6, r0
|
|
100003fa: 000c movs r4, r1
|
|
100003fc: ab01 add r3, sp, #4
|
|
100003fe: aa02 add r2, sp, #8
|
|
10000400: a903 add r1, sp, #12
|
|
10000402: f000 faad bl 10000960 <check_sys_clock_khz>
|
|
10000406: 1e05 subs r5, r0, #0
|
|
10000408: d104 bne.n 10000414 <set_sys_clock_khz+0x20>
|
|
1000040a: 2c00 cmp r4, #0
|
|
1000040c: d109 bne.n 10000422 <set_sys_clock_khz+0x2e>
|
|
1000040e: 0020 movs r0, r4
|
|
10000410: b004 add sp, #16
|
|
10000412: bd70 pop {r4, r5, r6, pc}
|
|
10000414: 9a01 ldr r2, [sp, #4]
|
|
10000416: 9902 ldr r1, [sp, #8]
|
|
10000418: 9803 ldr r0, [sp, #12]
|
|
1000041a: f000 fa65 bl 100008e8 <set_sys_clock_pll>
|
|
1000041e: 002c movs r4, r5
|
|
10000420: e7f5 b.n 1000040e <set_sys_clock_khz+0x1a>
|
|
10000422: 4802 ldr r0, [pc, #8] @ (1000042c <set_sys_clock_khz+0x38>)
|
|
10000424: 0031 movs r1, r6
|
|
10000426: f001 ffd7 bl 100023d8 <panic>
|
|
1000042a: 46c0 nop @ (mov r8, r8)
|
|
1000042c: 100054e8 .word 0x100054e8
|
|
|
|
10000430 <tft_program_init>:
|
|
10000430: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000432: 46ce mov lr, r9
|
|
10000434: 4647 mov r7, r8
|
|
10000436: b580 push {r7, lr}
|
|
10000438: b087 sub sp, #28
|
|
1000043a: 0004 movs r4, r0
|
|
1000043c: 000f movs r7, r1
|
|
1000043e: 4691 mov r9, r2
|
|
10000440: 001e movs r6, r3
|
|
10000442: 4b28 ldr r3, [pc, #160] @ (100004e4 <tft_program_init+0xb4>)
|
|
10000444: 4298 cmp r0, r3
|
|
10000446: d04b beq.n 100004e0 <tft_program_init+0xb0>
|
|
10000448: 2507 movs r5, #7
|
|
1000044a: 0029 movs r1, r5
|
|
1000044c: 0030 movs r0, r6
|
|
1000044e: f000 fadf bl 10000a10 <gpio_set_function>
|
|
10000452: 0029 movs r1, r5
|
|
10000454: 980e ldr r0, [sp, #56] @ 0x38
|
|
10000456: f000 fadb bl 10000a10 <gpio_set_function>
|
|
1000045a: 2301 movs r3, #1
|
|
1000045c: 4698 mov r8, r3
|
|
1000045e: 9300 str r3, [sp, #0]
|
|
10000460: 0032 movs r2, r6
|
|
10000462: 0039 movs r1, r7
|
|
10000464: 0020 movs r0, r4
|
|
10000466: f004 facf bl 10004a08 <pio_sm_set_consecutive_pindirs>
|
|
1000046a: 4643 mov r3, r8
|
|
1000046c: 9300 str r3, [sp, #0]
|
|
1000046e: 9a0e ldr r2, [sp, #56] @ 0x38
|
|
10000470: 0039 movs r1, r7
|
|
10000472: 0020 movs r0, r4
|
|
10000474: f004 fac8 bl 10004a08 <pio_sm_set_consecutive_pindirs>
|
|
10000478: 4649 mov r1, r9
|
|
1000047a: a802 add r0, sp, #8
|
|
1000047c: f7ff ff9c bl 100003b8 <tft_program_get_default_config>
|
|
10000480: 9d05 ldr r5, [sp, #20]
|
|
10000482: 4b19 ldr r3, [pc, #100] @ (100004e8 <tft_program_init+0xb8>)
|
|
10000484: 401d ands r5, r3
|
|
10000486: 9b0e ldr r3, [sp, #56] @ 0x38
|
|
10000488: 029b lsls r3, r3, #10
|
|
1000048a: 431d orrs r5, r3
|
|
1000048c: 9505 str r5, [sp, #20]
|
|
1000048e: 4b17 ldr r3, [pc, #92] @ (100004ec <tft_program_init+0xbc>)
|
|
10000490: 401d ands r5, r3
|
|
10000492: 432e orrs r6, r5
|
|
10000494: 2380 movs r3, #128 @ 0x80
|
|
10000496: 035b lsls r3, r3, #13
|
|
10000498: 4333 orrs r3, r6
|
|
1000049a: 9305 str r3, [sp, #20]
|
|
1000049c: 9b04 ldr r3, [sp, #16]
|
|
1000049e: 009b lsls r3, r3, #2
|
|
100004a0: 089b lsrs r3, r3, #2
|
|
100004a2: 2280 movs r2, #128 @ 0x80
|
|
100004a4: 05d2 lsls r2, r2, #23
|
|
100004a6: 4313 orrs r3, r2
|
|
100004a8: 9304 str r3, [sp, #16]
|
|
100004aa: 990f ldr r1, [sp, #60] @ 0x3c
|
|
100004ac: a802 add r0, sp, #8
|
|
100004ae: f7ff ff51 bl 10000354 <sm_config_set_clkdiv>
|
|
100004b2: 9a04 ldr r2, [sp, #16]
|
|
100004b4: 4b0e ldr r3, [pc, #56] @ (100004f0 <tft_program_init+0xc0>)
|
|
100004b6: 401a ands r2, r3
|
|
100004b8: 2380 movs r3, #128 @ 0x80
|
|
100004ba: 029b lsls r3, r3, #10
|
|
100004bc: 4313 orrs r3, r2
|
|
100004be: 9304 str r3, [sp, #16]
|
|
100004c0: ab02 add r3, sp, #8
|
|
100004c2: 464a mov r2, r9
|
|
100004c4: 0039 movs r1, r7
|
|
100004c6: 0020 movs r0, r4
|
|
100004c8: f004 faf0 bl 10004aac <pio_sm_init>
|
|
100004cc: 6822 ldr r2, [r4, #0]
|
|
100004ce: 4643 mov r3, r8
|
|
100004d0: 40bb lsls r3, r7
|
|
100004d2: 4313 orrs r3, r2
|
|
100004d4: 6023 str r3, [r4, #0]
|
|
100004d6: b007 add sp, #28
|
|
100004d8: bcc0 pop {r6, r7}
|
|
100004da: 46b9 mov r9, r7
|
|
100004dc: 46b0 mov r8, r6
|
|
100004de: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100004e0: 2506 movs r5, #6
|
|
100004e2: e7b2 b.n 1000044a <tft_program_init+0x1a>
|
|
100004e4: 50200000 .word 0x50200000
|
|
100004e8: ffff83ff .word 0xffff83ff
|
|
100004ec: fc0fffe0 .word 0xfc0fffe0
|
|
100004f0: c1f5ffff .word 0xc1f5ffff
|
|
|
|
100004f4 <channel_config_set_chain_to>:
|
|
100004f4: b510 push {r4, lr}
|
|
100004f6: 290c cmp r1, #12
|
|
100004f8: d806 bhi.n 10000508 <channel_config_set_chain_to+0x14>
|
|
100004fa: 6803 ldr r3, [r0, #0]
|
|
100004fc: 4a05 ldr r2, [pc, #20] @ (10000514 <channel_config_set_chain_to+0x20>)
|
|
100004fe: 4013 ands r3, r2
|
|
10000500: 02c9 lsls r1, r1, #11
|
|
10000502: 430b orrs r3, r1
|
|
10000504: 6003 str r3, [r0, #0]
|
|
10000506: bd10 pop {r4, pc}
|
|
10000508: 4b03 ldr r3, [pc, #12] @ (10000518 <channel_config_set_chain_to+0x24>)
|
|
1000050a: 4a04 ldr r2, [pc, #16] @ (1000051c <channel_config_set_chain_to+0x28>)
|
|
1000050c: 4804 ldr r0, [pc, #16] @ (10000520 <channel_config_set_chain_to+0x2c>)
|
|
1000050e: 21c3 movs r1, #195 @ 0xc3
|
|
10000510: f001 feca bl 100022a8 <__assert_func>
|
|
10000514: ffff87ff .word 0xffff87ff
|
|
10000518: 1000551c .word 0x1000551c
|
|
1000051c: 10005618 .word 0x10005618
|
|
10000520: 1000553c .word 0x1000553c
|
|
|
|
10000524 <dma_channel_get_default_config>:
|
|
10000524: b500 push {lr}
|
|
10000526: b083 sub sp, #12
|
|
10000528: 0001 movs r1, r0
|
|
1000052a: 2300 movs r3, #0
|
|
1000052c: 9301 str r3, [sp, #4]
|
|
1000052e: 3310 adds r3, #16
|
|
10000530: 9301 str r3, [sp, #4]
|
|
10000532: 4b13 ldr r3, [pc, #76] @ (10000580 <dma_channel_get_default_config+0x5c>)
|
|
10000534: 9301 str r3, [sp, #4]
|
|
10000536: a801 add r0, sp, #4
|
|
10000538: f7ff ffdc bl 100004f4 <channel_config_set_chain_to>
|
|
1000053c: 9b01 ldr r3, [sp, #4]
|
|
1000053e: 220c movs r2, #12
|
|
10000540: 0019 movs r1, r3
|
|
10000542: 4391 bics r1, r2
|
|
10000544: 000a movs r2, r1
|
|
10000546: 2108 movs r1, #8
|
|
10000548: 430a orrs r2, r1
|
|
1000054a: 9201 str r2, [sp, #4]
|
|
1000054c: 4a0d ldr r2, [pc, #52] @ (10000584 <dma_channel_get_default_config+0x60>)
|
|
1000054e: 401a ands r2, r3
|
|
10000550: 430a orrs r2, r1
|
|
10000552: 9201 str r2, [sp, #4]
|
|
10000554: 4a0c ldr r2, [pc, #48] @ (10000588 <dma_channel_get_default_config+0x64>)
|
|
10000556: 401a ands r2, r3
|
|
10000558: 430a orrs r2, r1
|
|
1000055a: 9201 str r2, [sp, #4]
|
|
1000055c: 4a0b ldr r2, [pc, #44] @ (1000058c <dma_channel_get_default_config+0x68>)
|
|
1000055e: 401a ands r2, r3
|
|
10000560: 4311 orrs r1, r2
|
|
10000562: 9101 str r1, [sp, #4]
|
|
10000564: 2109 movs r1, #9
|
|
10000566: 430a orrs r2, r1
|
|
10000568: 9201 str r2, [sp, #4]
|
|
1000056a: 4a09 ldr r2, [pc, #36] @ (10000590 <dma_channel_get_default_config+0x6c>)
|
|
1000056c: 401a ands r2, r3
|
|
1000056e: 430a orrs r2, r1
|
|
10000570: 9201 str r2, [sp, #4]
|
|
10000572: 4808 ldr r0, [pc, #32] @ (10000594 <dma_channel_get_default_config+0x70>)
|
|
10000574: 4018 ands r0, r3
|
|
10000576: 4308 orrs r0, r1
|
|
10000578: 9001 str r0, [sp, #4]
|
|
1000057a: b003 add sp, #12
|
|
1000057c: bd00 pop {pc}
|
|
1000057e: 46c0 nop @ (mov r8, r8)
|
|
10000580: 001f8010 .word 0x001f8010
|
|
10000584: fffff833 .word 0xfffff833
|
|
10000588: ffbff833 .word 0xffbff833
|
|
1000058c: ff9ff833 .word 0xff9ff833
|
|
10000590: ff1ff833 .word 0xff1ff833
|
|
10000594: ff1ff831 .word 0xff1ff831
|
|
|
|
10000598 <update_us_since_boot>:
|
|
10000598: b510 push {r4, lr}
|
|
1000059a: 2b00 cmp r3, #0
|
|
1000059c: db02 blt.n 100005a4 <update_us_since_boot+0xc>
|
|
1000059e: 6002 str r2, [r0, #0]
|
|
100005a0: 6043 str r3, [r0, #4]
|
|
100005a2: bd10 pop {r4, pc}
|
|
100005a4: 4b02 ldr r3, [pc, #8] @ (100005b0 <update_us_since_boot+0x18>)
|
|
100005a6: 4a03 ldr r2, [pc, #12] @ (100005b4 <update_us_since_boot+0x1c>)
|
|
100005a8: 4803 ldr r0, [pc, #12] @ (100005b8 <update_us_since_boot+0x20>)
|
|
100005aa: 213f movs r1, #63 @ 0x3f
|
|
100005ac: f001 fe7c bl 100022a8 <__assert_func>
|
|
100005b0: 10005594 .word 0x10005594
|
|
100005b4: 10005600 .word 0x10005600
|
|
100005b8: 100055b0 .word 0x100055b0
|
|
|
|
100005bc <get_absolute_time>:
|
|
100005bc: b510 push {r4, lr}
|
|
100005be: b082 sub sp, #8
|
|
100005c0: 0004 movs r4, r0
|
|
100005c2: f001 fa23 bl 10001a0c <time_us_64>
|
|
100005c6: 0002 movs r2, r0
|
|
100005c8: 000b movs r3, r1
|
|
100005ca: 4668 mov r0, sp
|
|
100005cc: f7ff ffe4 bl 10000598 <update_us_since_boot>
|
|
100005d0: 9a00 ldr r2, [sp, #0]
|
|
100005d2: 9b01 ldr r3, [sp, #4]
|
|
100005d4: 6022 str r2, [r4, #0]
|
|
100005d6: 6063 str r3, [r4, #4]
|
|
100005d8: 0020 movs r0, r4
|
|
100005da: b002 add sp, #8
|
|
100005dc: bd10 pop {r4, pc}
|
|
...
|
|
|
|
100005e0 <main>:
|
|
100005e0: b530 push {r4, r5, lr}
|
|
100005e2: b087 sub sp, #28
|
|
100005e4: 2101 movs r1, #1
|
|
100005e6: 4823 ldr r0, [pc, #140] @ (10000674 <main+0x94>)
|
|
100005e8: f7ff ff04 bl 100003f4 <set_sys_clock_khz>
|
|
100005ec: 4922 ldr r1, [pc, #136] @ (10000678 <main+0x98>)
|
|
100005ee: 4c23 ldr r4, [pc, #140] @ (1000067c <main+0x9c>)
|
|
100005f0: 0020 movs r0, r4
|
|
100005f2: f004 f9ed bl 100049d0 <pio_add_program>
|
|
100005f6: 0002 movs r2, r0
|
|
100005f8: 23fe movs r3, #254 @ 0xfe
|
|
100005fa: 059b lsls r3, r3, #22
|
|
100005fc: 9301 str r3, [sp, #4]
|
|
100005fe: 2311 movs r3, #17
|
|
10000600: 9300 str r3, [sp, #0]
|
|
10000602: 3301 adds r3, #1
|
|
10000604: 2100 movs r1, #0
|
|
10000606: 0020 movs r0, r4
|
|
10000608: f7ff ff12 bl 10000430 <tft_program_init>
|
|
1000060c: 2001 movs r0, #1
|
|
1000060e: f004 faa5 bl 10004b5c <dma_claim_unused_channel>
|
|
10000612: 0004 movs r4, r0
|
|
10000614: f7ff ff86 bl 10000524 <dma_channel_get_default_config>
|
|
10000618: 4b19 ldr r3, [pc, #100] @ (10000680 <main+0xa0>)
|
|
1000061a: 4018 ands r0, r3
|
|
1000061c: 2308 movs r3, #8
|
|
1000061e: 4318 orrs r0, r3
|
|
10000620: 01a3 lsls r3, r4, #6
|
|
10000622: 22a0 movs r2, #160 @ 0xa0
|
|
10000624: 05d2 lsls r2, r2, #23
|
|
10000626: 4694 mov ip, r2
|
|
10000628: 4463 add r3, ip
|
|
1000062a: 2200 movs r2, #0
|
|
1000062c: 601a str r2, [r3, #0]
|
|
1000062e: 4a15 ldr r2, [pc, #84] @ (10000684 <main+0xa4>)
|
|
10000630: 605a str r2, [r3, #4]
|
|
10000632: 2280 movs r2, #128 @ 0x80
|
|
10000634: 0152 lsls r2, r2, #5
|
|
10000636: 609a str r2, [r3, #8]
|
|
10000638: 6118 str r0, [r3, #16]
|
|
1000063a: 4813 ldr r0, [pc, #76] @ (10000688 <main+0xa8>)
|
|
1000063c: 0021 movs r1, r4
|
|
1000063e: f000 f8e5 bl 1000080c <tft_init>
|
|
10000642: a802 add r0, sp, #8
|
|
10000644: f7ff ffba bl 100005bc <get_absolute_time>
|
|
10000648: 9c02 ldr r4, [sp, #8]
|
|
1000064a: 9d03 ldr r5, [sp, #12]
|
|
1000064c: 2000 movs r0, #0
|
|
1000064e: f000 f919 bl 10000884 <tft_fill>
|
|
10000652: 480e ldr r0, [pc, #56] @ (1000068c <main+0xac>)
|
|
10000654: f000 f916 bl 10000884 <tft_fill>
|
|
10000658: 2000 movs r0, #0
|
|
1000065a: f000 f913 bl 10000884 <tft_fill>
|
|
1000065e: a802 add r0, sp, #8
|
|
10000660: f7ff ffac bl 100005bc <get_absolute_time>
|
|
10000664: 9a02 ldr r2, [sp, #8]
|
|
10000666: 9b03 ldr r3, [sp, #12]
|
|
10000668: 1b12 subs r2, r2, r4
|
|
1000066a: 41ab sbcs r3, r5
|
|
1000066c: 9204 str r2, [sp, #16]
|
|
1000066e: 9305 str r3, [sp, #20]
|
|
10000670: e7e7 b.n 10000642 <main+0x62>
|
|
10000672: 46c0 nop @ (mov r8, r8)
|
|
10000674: 00030d40 .word 0x00030d40
|
|
10000678: 10005658 .word 0x10005658
|
|
1000067c: 50200000 .word 0x50200000
|
|
10000680: ffe07ff3 .word 0xffe07ff3
|
|
10000684: 50200010 .word 0x50200010
|
|
10000688: 10005634 .word 0x10005634
|
|
1000068c: 0000ffff .word 0x0000ffff
|
|
|
|
10000690 <tft_push>:
|
|
10000690: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000692: 46c6 mov lr, r8
|
|
10000694: b500 push {lr}
|
|
10000696: 4690 mov r8, r2
|
|
10000698: 001d movs r5, r3
|
|
1000069a: 9f06 ldr r7, [sp, #24]
|
|
1000069c: 0878 lsrs r0, r7, #1
|
|
1000069e: 0080 lsls r0, r0, #2
|
|
100006a0: f003 ff46 bl 10004530 <__wrap_malloc>
|
|
100006a4: 0006 movs r6, r0
|
|
100006a6: 2200 movs r2, #0
|
|
100006a8: 2400 movs r4, #0
|
|
100006aa: e00a b.n 100006c2 <tft_push+0x32>
|
|
100006ac: 0063 lsls r3, r4, #1
|
|
100006ae: 5b59 ldrh r1, [r3, r5]
|
|
100006b0: 0409 lsls r1, r1, #16
|
|
100006b2: 1c63 adds r3, r4, #1
|
|
100006b4: 005b lsls r3, r3, #1
|
|
100006b6: 5b5b ldrh r3, [r3, r5]
|
|
100006b8: 4319 orrs r1, r3
|
|
100006ba: 0093 lsls r3, r2, #2
|
|
100006bc: 50f1 str r1, [r6, r3]
|
|
100006be: 3402 adds r4, #2
|
|
100006c0: 3201 adds r2, #1
|
|
100006c2: 42bc cmp r4, r7
|
|
100006c4: d3f2 bcc.n 100006ac <tft_push+0x1c>
|
|
100006c6: 4643 mov r3, r8
|
|
100006c8: 019b lsls r3, r3, #6
|
|
100006ca: 22a0 movs r2, #160 @ 0xa0
|
|
100006cc: 05d2 lsls r2, r2, #23
|
|
100006ce: 4694 mov ip, r2
|
|
100006d0: 4463 add r3, ip
|
|
100006d2: 63de str r6, [r3, #60] @ 0x3c
|
|
100006d4: 2064 movs r0, #100 @ 0x64
|
|
100006d6: f001 f91a bl 1000190e <sleep_ms>
|
|
100006da: 0030 movs r0, r6
|
|
100006dc: f003 ff32 bl 10004544 <__wrap_free>
|
|
100006e0: bc80 pop {r7}
|
|
100006e2: 46b8 mov r8, r7
|
|
100006e4: bdf0 pop {r4, r5, r6, r7, pc}
|
|
...
|
|
|
|
100006e8 <tft_set_dc_cs>:
|
|
100006e8: b570 push {r4, r5, r6, lr}
|
|
100006ea: 0004 movs r4, r0
|
|
100006ec: 000d movs r5, r1
|
|
100006ee: 2001 movs r0, #1
|
|
100006f0: 2100 movs r1, #0
|
|
100006f2: f001 f8ff bl 100018f4 <sleep_us>
|
|
100006f6: 490b ldr r1, [pc, #44] @ (10000724 <tft_set_dc_cs+0x3c>)
|
|
100006f8: 6948 ldr r0, [r1, #20]
|
|
100006fa: 2301 movs r3, #1
|
|
100006fc: 001a movs r2, r3
|
|
100006fe: 4082 lsls r2, r0
|
|
10000700: 6909 ldr r1, [r1, #16]
|
|
10000702: 408b lsls r3, r1
|
|
10000704: 4313 orrs r3, r2
|
|
10000706: 4084 lsls r4, r0
|
|
10000708: 408d lsls r5, r1
|
|
1000070a: 432c orrs r4, r5
|
|
1000070c: 22d0 movs r2, #208 @ 0xd0
|
|
1000070e: 0612 lsls r2, r2, #24
|
|
10000710: 6911 ldr r1, [r2, #16]
|
|
10000712: 404c eors r4, r1
|
|
10000714: 401c ands r4, r3
|
|
10000716: 61d4 str r4, [r2, #28]
|
|
10000718: 2001 movs r0, #1
|
|
1000071a: 2100 movs r1, #0
|
|
1000071c: f001 f8ea bl 100018f4 <sleep_us>
|
|
10000720: bd70 pop {r4, r5, r6, pc}
|
|
10000722: 46c0 nop @ (mov r8, r8)
|
|
10000724: 20000d60 .word 0x20000d60
|
|
|
|
10000728 <tft_write_cmd>:
|
|
10000728: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000072a: 46d6 mov lr, sl
|
|
1000072c: 464f mov r7, r9
|
|
1000072e: 4646 mov r6, r8
|
|
10000730: b5c0 push {r6, r7, lr}
|
|
10000732: 0005 movs r5, r0
|
|
10000734: 000f movs r7, r1
|
|
10000736: 0014 movs r4, r2
|
|
10000738: 4699 mov r9, r3
|
|
1000073a: 000b movs r3, r1
|
|
1000073c: 3318 adds r3, #24
|
|
1000073e: 2601 movs r6, #1
|
|
10000740: 409e lsls r6, r3
|
|
10000742: 6086 str r6, [r0, #8]
|
|
10000744: 68ab ldr r3, [r5, #8]
|
|
10000746: 4233 tst r3, r6
|
|
10000748: d0fc beq.n 10000744 <tft_write_cmd+0x1c>
|
|
1000074a: 2100 movs r1, #0
|
|
1000074c: 2000 movs r0, #0
|
|
1000074e: f7ff ffcb bl 100006e8 <tft_set_dc_cs>
|
|
10000752: 1c63 adds r3, r4, #1
|
|
10000754: 469a mov sl, r3
|
|
10000756: 7821 ldrb r1, [r4, #0]
|
|
10000758: 686a ldr r2, [r5, #4]
|
|
1000075a: 003b movs r3, r7
|
|
1000075c: 3310 adds r3, #16
|
|
1000075e: 2401 movs r4, #1
|
|
10000760: 409c lsls r4, r3
|
|
10000762: 0023 movs r3, r4
|
|
10000764: 4013 ands r3, r2
|
|
10000766: 4698 mov r8, r3
|
|
10000768: 4214 tst r4, r2
|
|
1000076a: d1f5 bne.n 10000758 <tft_write_cmd+0x30>
|
|
1000076c: 3704 adds r7, #4
|
|
1000076e: 00bf lsls r7, r7, #2
|
|
10000770: 19ef adds r7, r5, r7
|
|
10000772: 7039 strb r1, [r7, #0]
|
|
10000774: 464b mov r3, r9
|
|
10000776: 2b01 cmp r3, #1
|
|
10000778: d918 bls.n 100007ac <tft_write_cmd+0x84>
|
|
1000077a: 60ae str r6, [r5, #8]
|
|
1000077c: 68ab ldr r3, [r5, #8]
|
|
1000077e: 4233 tst r3, r6
|
|
10000780: d0fc beq.n 1000077c <tft_write_cmd+0x54>
|
|
10000782: 2100 movs r1, #0
|
|
10000784: 2001 movs r0, #1
|
|
10000786: f7ff ffaf bl 100006e8 <tft_set_dc_cs>
|
|
1000078a: e00b b.n 100007a4 <tft_write_cmd+0x7c>
|
|
1000078c: 4653 mov r3, sl
|
|
1000078e: 3301 adds r3, #1
|
|
10000790: 4652 mov r2, sl
|
|
10000792: 7811 ldrb r1, [r2, #0]
|
|
10000794: 686a ldr r2, [r5, #4]
|
|
10000796: 4222 tst r2, r4
|
|
10000798: d1fc bne.n 10000794 <tft_write_cmd+0x6c>
|
|
1000079a: 7039 strb r1, [r7, #0]
|
|
1000079c: 2201 movs r2, #1
|
|
1000079e: 4694 mov ip, r2
|
|
100007a0: 44e0 add r8, ip
|
|
100007a2: 469a mov sl, r3
|
|
100007a4: 464b mov r3, r9
|
|
100007a6: 3b01 subs r3, #1
|
|
100007a8: 4543 cmp r3, r8
|
|
100007aa: d8ef bhi.n 1000078c <tft_write_cmd+0x64>
|
|
100007ac: 60ae str r6, [r5, #8]
|
|
100007ae: 68ab ldr r3, [r5, #8]
|
|
100007b0: 4233 tst r3, r6
|
|
100007b2: d0fc beq.n 100007ae <tft_write_cmd+0x86>
|
|
100007b4: 2101 movs r1, #1
|
|
100007b6: 2001 movs r0, #1
|
|
100007b8: f7ff ff96 bl 100006e8 <tft_set_dc_cs>
|
|
100007bc: bce0 pop {r5, r6, r7}
|
|
100007be: 46ba mov sl, r7
|
|
100007c0: 46b1 mov r9, r6
|
|
100007c2: 46a8 mov r8, r5
|
|
100007c4: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100007c6 <lcd_init>:
|
|
100007c6: b570 push {r4, r5, r6, lr}
|
|
100007c8: 0006 movs r6, r0
|
|
100007ca: 000d movs r5, r1
|
|
100007cc: 0014 movs r4, r2
|
|
100007ce: e00a b.n 100007e6 <lcd_init+0x20>
|
|
100007d0: 1ca2 adds r2, r4, #2
|
|
100007d2: 0029 movs r1, r5
|
|
100007d4: 0030 movs r0, r6
|
|
100007d6: f7ff ffa7 bl 10000728 <tft_write_cmd>
|
|
100007da: 20c8 movs r0, #200 @ 0xc8
|
|
100007dc: f001 f897 bl 1000190e <sleep_ms>
|
|
100007e0: 7823 ldrb r3, [r4, #0]
|
|
100007e2: 3302 adds r3, #2
|
|
100007e4: 18e4 adds r4, r4, r3
|
|
100007e6: 7823 ldrb r3, [r4, #0]
|
|
100007e8: 2b00 cmp r3, #0
|
|
100007ea: d1f1 bne.n 100007d0 <lcd_init+0xa>
|
|
100007ec: bd70 pop {r4, r5, r6, pc}
|
|
|
|
100007ee <tft_start_pixels>:
|
|
100007ee: b500 push {lr}
|
|
100007f0: b083 sub sp, #12
|
|
100007f2: 466b mov r3, sp
|
|
100007f4: 1dda adds r2, r3, #7
|
|
100007f6: 232c movs r3, #44 @ 0x2c
|
|
100007f8: 7013 strb r3, [r2, #0]
|
|
100007fa: 3b2b subs r3, #43 @ 0x2b
|
|
100007fc: f7ff ff94 bl 10000728 <tft_write_cmd>
|
|
10000800: 2100 movs r1, #0
|
|
10000802: 2001 movs r0, #1
|
|
10000804: f7ff ff70 bl 100006e8 <tft_set_dc_cs>
|
|
10000808: b003 add sp, #12
|
|
1000080a: bd00 pop {pc}
|
|
|
|
1000080c <tft_init>:
|
|
1000080c: b570 push {r4, r5, r6, lr}
|
|
1000080e: 000d movs r5, r1
|
|
10000810: 4c19 ldr r4, [pc, #100] @ (10000878 <tft_init+0x6c>)
|
|
10000812: 2224 movs r2, #36 @ 0x24
|
|
10000814: 0001 movs r1, r0
|
|
10000816: 0020 movs r0, r4
|
|
10000818: f003 fea6 bl 10004568 <__wrap___aeabi_memcpy>
|
|
1000081c: 4b17 ldr r3, [pc, #92] @ (1000087c <tft_init+0x70>)
|
|
1000081e: 601d str r5, [r3, #0]
|
|
10000820: 6920 ldr r0, [r4, #16]
|
|
10000822: f000 f90d bl 10000a40 <gpio_init>
|
|
10000826: 6960 ldr r0, [r4, #20]
|
|
10000828: f000 f90a bl 10000a40 <gpio_init>
|
|
1000082c: 69a0 ldr r0, [r4, #24]
|
|
1000082e: f000 f907 bl 10000a40 <gpio_init>
|
|
10000832: 69e0 ldr r0, [r4, #28]
|
|
10000834: f000 f904 bl 10000a40 <gpio_init>
|
|
10000838: 6923 ldr r3, [r4, #16]
|
|
1000083a: 2601 movs r6, #1
|
|
1000083c: 0032 movs r2, r6
|
|
1000083e: 409a lsls r2, r3
|
|
10000840: 25d0 movs r5, #208 @ 0xd0
|
|
10000842: 062d lsls r5, r5, #24
|
|
10000844: 626a str r2, [r5, #36] @ 0x24
|
|
10000846: 6963 ldr r3, [r4, #20]
|
|
10000848: 0031 movs r1, r6
|
|
1000084a: 4099 lsls r1, r3
|
|
1000084c: 6269 str r1, [r5, #36] @ 0x24
|
|
1000084e: 69a3 ldr r3, [r4, #24]
|
|
10000850: 0031 movs r1, r6
|
|
10000852: 4099 lsls r1, r3
|
|
10000854: 000b movs r3, r1
|
|
10000856: 6269 str r1, [r5, #36] @ 0x24
|
|
10000858: 69e1 ldr r1, [r4, #28]
|
|
1000085a: 0030 movs r0, r6
|
|
1000085c: 4088 lsls r0, r1
|
|
1000085e: 6268 str r0, [r5, #36] @ 0x24
|
|
10000860: 616a str r2, [r5, #20]
|
|
10000862: 616b str r3, [r5, #20]
|
|
10000864: 4a06 ldr r2, [pc, #24] @ (10000880 <tft_init+0x74>)
|
|
10000866: 6861 ldr r1, [r4, #4]
|
|
10000868: 6820 ldr r0, [r4, #0]
|
|
1000086a: f7ff ffac bl 100007c6 <lcd_init>
|
|
1000086e: 69e3 ldr r3, [r4, #28]
|
|
10000870: 409e lsls r6, r3
|
|
10000872: 616e str r6, [r5, #20]
|
|
10000874: bd70 pop {r4, r5, r6, pc}
|
|
10000876: 46c0 nop @ (mov r8, r8)
|
|
10000878: 20000d60 .word 0x20000d60
|
|
1000087c: 20000b24 .word 0x20000b24
|
|
10000880: 10005664 .word 0x10005664
|
|
|
|
10000884 <tft_fill>:
|
|
10000884: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000886: b083 sub sp, #12
|
|
10000888: 0005 movs r5, r0
|
|
1000088a: 4b15 ldr r3, [pc, #84] @ (100008e0 <tft_fill+0x5c>)
|
|
1000088c: 6859 ldr r1, [r3, #4]
|
|
1000088e: 6818 ldr r0, [r3, #0]
|
|
10000890: f7ff ffad bl 100007ee <tft_start_pixels>
|
|
10000894: 2080 movs r0, #128 @ 0x80
|
|
10000896: 0180 lsls r0, r0, #6
|
|
10000898: f003 fe4a bl 10004530 <__wrap_malloc>
|
|
1000089c: 0004 movs r4, r0
|
|
1000089e: 2300 movs r3, #0
|
|
100008a0: e002 b.n 100008a8 <tft_fill+0x24>
|
|
100008a2: 005a lsls r2, r3, #1
|
|
100008a4: 52a5 strh r5, [r4, r2]
|
|
100008a6: 3301 adds r3, #1
|
|
100008a8: 2280 movs r2, #128 @ 0x80
|
|
100008aa: 0152 lsls r2, r2, #5
|
|
100008ac: 4293 cmp r3, r2
|
|
100008ae: d3f8 bcc.n 100008a2 <tft_fill+0x1e>
|
|
100008b0: 4f0c ldr r7, [pc, #48] @ (100008e4 <tft_fill+0x60>)
|
|
100008b2: 683a ldr r2, [r7, #0]
|
|
100008b4: 4d0a ldr r5, [pc, #40] @ (100008e0 <tft_fill+0x5c>)
|
|
100008b6: 6869 ldr r1, [r5, #4]
|
|
100008b8: 6828 ldr r0, [r5, #0]
|
|
100008ba: 2680 movs r6, #128 @ 0x80
|
|
100008bc: 0176 lsls r6, r6, #5
|
|
100008be: 9600 str r6, [sp, #0]
|
|
100008c0: 0023 movs r3, r4
|
|
100008c2: f7ff fee5 bl 10000690 <tft_push>
|
|
100008c6: 683a ldr r2, [r7, #0]
|
|
100008c8: 6869 ldr r1, [r5, #4]
|
|
100008ca: 6828 ldr r0, [r5, #0]
|
|
100008cc: 9600 str r6, [sp, #0]
|
|
100008ce: 0023 movs r3, r4
|
|
100008d0: f7ff fede bl 10000690 <tft_push>
|
|
100008d4: 0020 movs r0, r4
|
|
100008d6: f003 fe35 bl 10004544 <__wrap_free>
|
|
100008da: b003 add sp, #12
|
|
100008dc: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100008de: 46c0 nop @ (mov r8, r8)
|
|
100008e0: 20000d60 .word 0x20000d60
|
|
100008e4: 20000b24 .word 0x20000b24
|
|
|
|
100008e8 <set_sys_clock_pll>:
|
|
100008e8: b5f0 push {r4, r5, r6, r7, lr}
|
|
100008ea: b083 sub sp, #12
|
|
100008ec: 0004 movs r4, r0
|
|
100008ee: 000d movs r5, r1
|
|
100008f0: 0016 movs r6, r2
|
|
100008f2: f000 f8b1 bl 10000a58 <running_on_fpga>
|
|
100008f6: 2800 cmp r0, #0
|
|
100008f8: d001 beq.n 100008fe <set_sys_clock_pll+0x16>
|
|
100008fa: b003 add sp, #12
|
|
100008fc: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100008fe: 4f15 ldr r7, [pc, #84] @ (10000954 <set_sys_clock_pll+0x6c>)
|
|
10000900: 9700 str r7, [sp, #0]
|
|
10000902: 003b movs r3, r7
|
|
10000904: 2201 movs r2, #1
|
|
10000906: 2101 movs r1, #1
|
|
10000908: 3005 adds r0, #5
|
|
1000090a: f001 faf1 bl 10001ef0 <clock_configure>
|
|
1000090e: 9600 str r6, [sp, #0]
|
|
10000910: 002b movs r3, r5
|
|
10000912: 0022 movs r2, r4
|
|
10000914: 2101 movs r1, #1
|
|
10000916: 4810 ldr r0, [pc, #64] @ (10000958 <set_sys_clock_pll+0x70>)
|
|
10000918: f001 fbf2 bl 10002100 <pll_init>
|
|
1000091c: 0031 movs r1, r6
|
|
1000091e: 4369 muls r1, r5
|
|
10000920: 0020 movs r0, r4
|
|
10000922: f002 fea9 bl 10003678 <__wrap___aeabi_uidiv>
|
|
10000926: 0004 movs r4, r0
|
|
10000928: 4b0c ldr r3, [pc, #48] @ (1000095c <set_sys_clock_pll+0x74>)
|
|
1000092a: 9300 str r3, [sp, #0]
|
|
1000092c: 2200 movs r2, #0
|
|
1000092e: 2102 movs r1, #2
|
|
10000930: 2004 movs r0, #4
|
|
10000932: f001 fadd bl 10001ef0 <clock_configure>
|
|
10000936: 9400 str r4, [sp, #0]
|
|
10000938: 0023 movs r3, r4
|
|
1000093a: 2200 movs r2, #0
|
|
1000093c: 2101 movs r1, #1
|
|
1000093e: 2005 movs r0, #5
|
|
10000940: f001 fad6 bl 10001ef0 <clock_configure>
|
|
10000944: 9700 str r7, [sp, #0]
|
|
10000946: 003b movs r3, r7
|
|
10000948: 2202 movs r2, #2
|
|
1000094a: 2100 movs r1, #0
|
|
1000094c: 2006 movs r0, #6
|
|
1000094e: f001 facf bl 10001ef0 <clock_configure>
|
|
10000952: e7d2 b.n 100008fa <set_sys_clock_pll+0x12>
|
|
10000954: 02dc6c00 .word 0x02dc6c00
|
|
10000958: 40028000 .word 0x40028000
|
|
1000095c: 00b71b00 .word 0x00b71b00
|
|
|
|
10000960 <check_sys_clock_khz>:
|
|
10000960: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000962: 46de mov lr, fp
|
|
10000964: 4657 mov r7, sl
|
|
10000966: 464e mov r6, r9
|
|
10000968: 4645 mov r5, r8
|
|
1000096a: b5e0 push {r5, r6, r7, lr}
|
|
1000096c: b083 sub sp, #12
|
|
1000096e: 4680 mov r8, r0
|
|
10000970: 468b mov fp, r1
|
|
10000972: 9200 str r2, [sp, #0]
|
|
10000974: 9301 str r3, [sp, #4]
|
|
10000976: 2004 movs r0, #4
|
|
10000978: f001 fbbc bl 100020f4 <clock_get_hz>
|
|
1000097c: 21fa movs r1, #250 @ 0xfa
|
|
1000097e: 0089 lsls r1, r1, #2
|
|
10000980: f002 fe7a bl 10003678 <__wrap___aeabi_uidiv>
|
|
10000984: 4682 mov sl, r0
|
|
10000986: 23a0 movs r3, #160 @ 0xa0
|
|
10000988: 005b lsls r3, r3, #1
|
|
1000098a: 4699 mov r9, r3
|
|
1000098c: e02c b.n 100009e8 <check_sys_clock_khz+0x88>
|
|
1000098e: 3c01 subs r4, #1
|
|
10000990: 2c00 cmp r4, #0
|
|
10000992: d020 beq.n 100009d6 <check_sys_clock_khz+0x76>
|
|
10000994: 0025 movs r5, r4
|
|
10000996: 437d muls r5, r7
|
|
10000998: 0029 movs r1, r5
|
|
1000099a: 0030 movs r0, r6
|
|
1000099c: f002 fe6c bl 10003678 <__wrap___aeabi_uidiv>
|
|
100009a0: 4540 cmp r0, r8
|
|
100009a2: d1f4 bne.n 1000098e <check_sys_clock_khz+0x2e>
|
|
100009a4: 0029 movs r1, r5
|
|
100009a6: 0030 movs r0, r6
|
|
100009a8: f002 fe66 bl 10003678 <__wrap___aeabi_uidiv>
|
|
100009ac: 2900 cmp r1, #0
|
|
100009ae: d1ee bne.n 1000098e <check_sys_clock_khz+0x2e>
|
|
100009b0: 0173 lsls r3, r6, #5
|
|
100009b2: 1b9b subs r3, r3, r6
|
|
100009b4: 009b lsls r3, r3, #2
|
|
100009b6: 199b adds r3, r3, r6
|
|
100009b8: 00db lsls r3, r3, #3
|
|
100009ba: 465a mov r2, fp
|
|
100009bc: 6013 str r3, [r2, #0]
|
|
100009be: 9b00 ldr r3, [sp, #0]
|
|
100009c0: 601f str r7, [r3, #0]
|
|
100009c2: 9b01 ldr r3, [sp, #4]
|
|
100009c4: 601c str r4, [r3, #0]
|
|
100009c6: 2001 movs r0, #1
|
|
100009c8: b003 add sp, #12
|
|
100009ca: bcf0 pop {r4, r5, r6, r7}
|
|
100009cc: 46bb mov fp, r7
|
|
100009ce: 46b2 mov sl, r6
|
|
100009d0: 46a9 mov r9, r5
|
|
100009d2: 46a0 mov r8, r4
|
|
100009d4: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100009d6: 3f01 subs r7, #1
|
|
100009d8: 2f00 cmp r7, #0
|
|
100009da: d001 beq.n 100009e0 <check_sys_clock_khz+0x80>
|
|
100009dc: 003c movs r4, r7
|
|
100009de: e7d7 b.n 10000990 <check_sys_clock_khz+0x30>
|
|
100009e0: 2301 movs r3, #1
|
|
100009e2: 425b negs r3, r3
|
|
100009e4: 469c mov ip, r3
|
|
100009e6: 44e1 add r9, ip
|
|
100009e8: 464b mov r3, r9
|
|
100009ea: 2b0f cmp r3, #15
|
|
100009ec: d909 bls.n 10000a02 <check_sys_clock_khz+0xa2>
|
|
100009ee: 4656 mov r6, sl
|
|
100009f0: 464b mov r3, r9
|
|
100009f2: 435e muls r6, r3
|
|
100009f4: 4b04 ldr r3, [pc, #16] @ (10000a08 <check_sys_clock_khz+0xa8>)
|
|
100009f6: 18f2 adds r2, r6, r3
|
|
100009f8: 4b04 ldr r3, [pc, #16] @ (10000a0c <check_sys_clock_khz+0xac>)
|
|
100009fa: 429a cmp r2, r3
|
|
100009fc: d8f0 bhi.n 100009e0 <check_sys_clock_khz+0x80>
|
|
100009fe: 2707 movs r7, #7
|
|
10000a00: e7ea b.n 100009d8 <check_sys_clock_khz+0x78>
|
|
10000a02: 2000 movs r0, #0
|
|
10000a04: e7e0 b.n 100009c8 <check_sys_clock_khz+0x68>
|
|
10000a06: 46c0 nop @ (mov r8, r8)
|
|
10000a08: fff48e50 .word 0xfff48e50
|
|
10000a0c: 000cf850 .word 0x000cf850
|
|
|
|
10000a10 <gpio_set_function>:
|
|
10000a10: b510 push {r4, lr}
|
|
10000a12: 0083 lsls r3, r0, #2
|
|
10000a14: 4a08 ldr r2, [pc, #32] @ (10000a38 <gpio_set_function+0x28>)
|
|
10000a16: 4694 mov ip, r2
|
|
10000a18: 4463 add r3, ip
|
|
10000a1a: 681a ldr r2, [r3, #0]
|
|
10000a1c: 2440 movs r4, #64 @ 0x40
|
|
10000a1e: 4062 eors r2, r4
|
|
10000a20: 3480 adds r4, #128 @ 0x80
|
|
10000a22: 4014 ands r4, r2
|
|
10000a24: 2280 movs r2, #128 @ 0x80
|
|
10000a26: 0152 lsls r2, r2, #5
|
|
10000a28: 4313 orrs r3, r2
|
|
10000a2a: 601c str r4, [r3, #0]
|
|
10000a2c: 00c0 lsls r0, r0, #3
|
|
10000a2e: 4b03 ldr r3, [pc, #12] @ (10000a3c <gpio_set_function+0x2c>)
|
|
10000a30: 469c mov ip, r3
|
|
10000a32: 4460 add r0, ip
|
|
10000a34: 6041 str r1, [r0, #4]
|
|
10000a36: bd10 pop {r4, pc}
|
|
10000a38: 4001c004 .word 0x4001c004
|
|
10000a3c: 40014000 .word 0x40014000
|
|
|
|
10000a40 <gpio_init>:
|
|
10000a40: b510 push {r4, lr}
|
|
10000a42: 2301 movs r3, #1
|
|
10000a44: 4083 lsls r3, r0
|
|
10000a46: 22d0 movs r2, #208 @ 0xd0
|
|
10000a48: 0612 lsls r2, r2, #24
|
|
10000a4a: 6293 str r3, [r2, #40] @ 0x28
|
|
10000a4c: 6193 str r3, [r2, #24]
|
|
10000a4e: 2105 movs r1, #5
|
|
10000a50: f7ff ffde bl 10000a10 <gpio_set_function>
|
|
10000a54: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10000a58 <running_on_fpga>:
|
|
10000a58: 4b03 ldr r3, [pc, #12] @ (10000a68 <running_on_fpga+0x10>)
|
|
10000a5a: 681b ldr r3, [r3, #0]
|
|
10000a5c: 2002 movs r0, #2
|
|
10000a5e: 4018 ands r0, r3
|
|
10000a60: 1e43 subs r3, r0, #1
|
|
10000a62: 4198 sbcs r0, r3
|
|
10000a64: b2c0 uxtb r0, r0
|
|
10000a66: 4770 bx lr
|
|
10000a68: 4006c000 .word 0x4006c000
|
|
|
|
10000a6c <hw_claim_lock>:
|
|
10000a6c: f3ef 8010 mrs r0, PRIMASK
|
|
10000a70: b672 cpsid i
|
|
10000a72: 4b03 ldr r3, [pc, #12] @ (10000a80 <hw_claim_lock+0x14>)
|
|
10000a74: 681b ldr r3, [r3, #0]
|
|
10000a76: 2b00 cmp r3, #0
|
|
10000a78: d0fb beq.n 10000a72 <hw_claim_lock+0x6>
|
|
10000a7a: f3bf 8f5f dmb sy
|
|
10000a7e: 4770 bx lr
|
|
10000a80: d000012c .word 0xd000012c
|
|
|
|
10000a84 <hw_claim_unlock>:
|
|
10000a84: f3bf 8f5f dmb sy
|
|
10000a88: 4b02 ldr r3, [pc, #8] @ (10000a94 <hw_claim_unlock+0x10>)
|
|
10000a8a: 2200 movs r2, #0
|
|
10000a8c: 601a str r2, [r3, #0]
|
|
10000a8e: f380 8810 msr PRIMASK, r0
|
|
10000a92: 4770 bx lr
|
|
10000a94: d000012c .word 0xd000012c
|
|
|
|
10000a98 <hw_claim_or_assert>:
|
|
10000a98: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10000a9a: 0006 movs r6, r0
|
|
10000a9c: 000c movs r4, r1
|
|
10000a9e: 0015 movs r5, r2
|
|
10000aa0: f7ff ffe4 bl 10000a6c <hw_claim_lock>
|
|
10000aa4: 08e3 lsrs r3, r4, #3
|
|
10000aa6: 18f7 adds r7, r6, r3
|
|
10000aa8: 5cf1 ldrb r1, [r6, r3]
|
|
10000aaa: 2207 movs r2, #7
|
|
10000aac: 4022 ands r2, r4
|
|
10000aae: 2301 movs r3, #1
|
|
10000ab0: 4093 lsls r3, r2
|
|
10000ab2: 420b tst r3, r1
|
|
10000ab4: d105 bne.n 10000ac2 <hw_claim_or_assert+0x2a>
|
|
10000ab6: b2db uxtb r3, r3
|
|
10000ab8: 430b orrs r3, r1
|
|
10000aba: 703b strb r3, [r7, #0]
|
|
10000abc: f7ff ffe2 bl 10000a84 <hw_claim_unlock>
|
|
10000ac0: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10000ac2: 0021 movs r1, r4
|
|
10000ac4: 0028 movs r0, r5
|
|
10000ac6: f001 fc87 bl 100023d8 <panic>
|
|
|
|
10000aca <hw_claim_unused_from_range>:
|
|
10000aca: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000acc: b083 sub sp, #12
|
|
10000ace: 0006 movs r6, r0
|
|
10000ad0: 9101 str r1, [sp, #4]
|
|
10000ad2: 0014 movs r4, r2
|
|
10000ad4: 001f movs r7, r3
|
|
10000ad6: f7ff ffc9 bl 10000a6c <hw_claim_lock>
|
|
10000ada: e000 b.n 10000ade <hw_claim_unused_from_range+0x14>
|
|
10000adc: 3401 adds r4, #1
|
|
10000ade: 42bc cmp r4, r7
|
|
10000ae0: d80c bhi.n 10000afc <hw_claim_unused_from_range+0x32>
|
|
10000ae2: 08e3 lsrs r3, r4, #3
|
|
10000ae4: 18f5 adds r5, r6, r3
|
|
10000ae6: 5cf3 ldrb r3, [r6, r3]
|
|
10000ae8: 2107 movs r1, #7
|
|
10000aea: 4021 ands r1, r4
|
|
10000aec: 2201 movs r2, #1
|
|
10000aee: 408a lsls r2, r1
|
|
10000af0: 421a tst r2, r3
|
|
10000af2: d1f3 bne.n 10000adc <hw_claim_unused_from_range+0x12>
|
|
10000af4: b2d2 uxtb r2, r2
|
|
10000af6: 431a orrs r2, r3
|
|
10000af8: 702a strb r2, [r5, #0]
|
|
10000afa: e001 b.n 10000b00 <hw_claim_unused_from_range+0x36>
|
|
10000afc: 2401 movs r4, #1
|
|
10000afe: 4264 negs r4, r4
|
|
10000b00: f7ff ffc0 bl 10000a84 <hw_claim_unlock>
|
|
10000b04: 2c00 cmp r4, #0
|
|
10000b06: db02 blt.n 10000b0e <hw_claim_unused_from_range+0x44>
|
|
10000b08: 0020 movs r0, r4
|
|
10000b0a: b003 add sp, #12
|
|
10000b0c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10000b0e: 9b01 ldr r3, [sp, #4]
|
|
10000b10: 2b00 cmp r3, #0
|
|
10000b12: d0f9 beq.n 10000b08 <hw_claim_unused_from_range+0x3e>
|
|
10000b14: 9808 ldr r0, [sp, #32]
|
|
10000b16: f001 fc5f bl 100023d8 <panic>
|
|
...
|
|
|
|
10000b1c <spin_locks_reset>:
|
|
10000b1c: 2300 movs r3, #0
|
|
10000b1e: e007 b.n 10000b30 <spin_locks_reset+0x14>
|
|
10000b20: 4a05 ldr r2, [pc, #20] @ (10000b38 <spin_locks_reset+0x1c>)
|
|
10000b22: 189a adds r2, r3, r2
|
|
10000b24: 0092 lsls r2, r2, #2
|
|
10000b26: f3bf 8f5f dmb sy
|
|
10000b2a: 2100 movs r1, #0
|
|
10000b2c: 6011 str r1, [r2, #0]
|
|
10000b2e: 3301 adds r3, #1
|
|
10000b30: 2b1f cmp r3, #31
|
|
10000b32: d9f5 bls.n 10000b20 <spin_locks_reset+0x4>
|
|
10000b34: 4770 bx lr
|
|
10000b36: 46c0 nop @ (mov r8, r8)
|
|
10000b38: 34000040 .word 0x34000040
|
|
|
|
10000b3c <next_striped_spin_lock_num>:
|
|
10000b3c: 4a05 ldr r2, [pc, #20] @ (10000b54 <next_striped_spin_lock_num+0x18>)
|
|
10000b3e: 7810 ldrb r0, [r2, #0]
|
|
10000b40: 1c43 adds r3, r0, #1
|
|
10000b42: b2db uxtb r3, r3
|
|
10000b44: 7013 strb r3, [r2, #0]
|
|
10000b46: 2b17 cmp r3, #23
|
|
10000b48: d902 bls.n 10000b50 <next_striped_spin_lock_num+0x14>
|
|
10000b4a: 0013 movs r3, r2
|
|
10000b4c: 2210 movs r2, #16
|
|
10000b4e: 701a strb r2, [r3, #0]
|
|
10000b50: 4770 bx lr
|
|
10000b52: 46c0 nop @ (mov r8, r8)
|
|
10000b54: 20000238 .word 0x20000238
|
|
|
|
10000b58 <set_raw_irq_handler_and_unlock>:
|
|
10000b58: 4b07 ldr r3, [pc, #28] @ (10000b78 <set_raw_irq_handler_and_unlock+0x20>)
|
|
10000b5a: 689b ldr r3, [r3, #8]
|
|
10000b5c: 3010 adds r0, #16
|
|
10000b5e: 0080 lsls r0, r0, #2
|
|
10000b60: 5019 str r1, [r3, r0]
|
|
10000b62: f3bf 8f5f dmb sy
|
|
10000b66: f3bf 8f5f dmb sy
|
|
10000b6a: 4b04 ldr r3, [pc, #16] @ (10000b7c <set_raw_irq_handler_and_unlock+0x24>)
|
|
10000b6c: 2100 movs r1, #0
|
|
10000b6e: 6019 str r1, [r3, #0]
|
|
10000b70: f382 8810 msr PRIMASK, r2
|
|
10000b74: 4770 bx lr
|
|
10000b76: 46c0 nop @ (mov r8, r8)
|
|
10000b78: e000ed00 .word 0xe000ed00
|
|
10000b7c: d0000124 .word 0xd0000124
|
|
|
|
10000b80 <resolve_branch>:
|
|
10000b80: b510 push {r4, lr}
|
|
10000b82: 8803 ldrh r3, [r0, #0]
|
|
10000b84: 0ada lsrs r2, r3, #11
|
|
10000b86: 2a1c cmp r2, #28
|
|
10000b88: d105 bne.n 10000b96 <resolve_branch+0x16>
|
|
10000b8a: 055b lsls r3, r3, #21
|
|
10000b8c: 155b asrs r3, r3, #21
|
|
10000b8e: 3302 adds r3, #2
|
|
10000b90: 005b lsls r3, r3, #1
|
|
10000b92: 18c0 adds r0, r0, r3
|
|
10000b94: bd10 pop {r4, pc}
|
|
10000b96: 4b03 ldr r3, [pc, #12] @ (10000ba4 <resolve_branch+0x24>)
|
|
10000b98: 4a03 ldr r2, [pc, #12] @ (10000ba8 <resolve_branch+0x28>)
|
|
10000b9a: 4804 ldr r0, [pc, #16] @ (10000bac <resolve_branch+0x2c>)
|
|
10000b9c: 21b1 movs r1, #177 @ 0xb1
|
|
10000b9e: f001 fb83 bl 100022a8 <__assert_func>
|
|
10000ba2: 46c0 nop @ (mov r8, r8)
|
|
10000ba4: 10005688 .word 0x10005688
|
|
10000ba8: 1000582c .word 0x1000582c
|
|
10000bac: 100056a0 .word 0x100056a0
|
|
|
|
10000bb0 <make_branch>:
|
|
10000bb0: b510 push {r4, lr}
|
|
10000bb2: 1a09 subs r1, r1, r0
|
|
10000bb4: 1f0b subs r3, r1, #4
|
|
10000bb6: 4a0a ldr r2, [pc, #40] @ (10000be0 <make_branch+0x30>)
|
|
10000bb8: 1888 adds r0, r1, r2
|
|
10000bba: 4a0a ldr r2, [pc, #40] @ (10000be4 <make_branch+0x34>)
|
|
10000bbc: 4290 cmp r0, r2
|
|
10000bbe: d808 bhi.n 10000bd2 <make_branch+0x22>
|
|
10000bc0: 07c9 lsls r1, r1, #31
|
|
10000bc2: d406 bmi.n 10000bd2 <make_branch+0x22>
|
|
10000bc4: 105b asrs r3, r3, #1
|
|
10000bc6: 055b lsls r3, r3, #21
|
|
10000bc8: 0d5b lsrs r3, r3, #21
|
|
10000bca: 4807 ldr r0, [pc, #28] @ (10000be8 <make_branch+0x38>)
|
|
10000bcc: 4318 orrs r0, r3
|
|
10000bce: b280 uxth r0, r0
|
|
10000bd0: bd10 pop {r4, pc}
|
|
10000bd2: 4b06 ldr r3, [pc, #24] @ (10000bec <make_branch+0x3c>)
|
|
10000bd4: 4a06 ldr r2, [pc, #24] @ (10000bf0 <make_branch+0x40>)
|
|
10000bd6: 4807 ldr r0, [pc, #28] @ (10000bf4 <make_branch+0x44>)
|
|
10000bd8: 21a3 movs r1, #163 @ 0xa3
|
|
10000bda: f001 fb65 bl 100022a8 <__assert_func>
|
|
10000bde: 46c0 nop @ (mov r8, r8)
|
|
10000be0: 000007fc .word 0x000007fc
|
|
10000be4: 00000ffe .word 0x00000ffe
|
|
10000be8: ffffe000 .word 0xffffe000
|
|
10000bec: 100056e8 .word 0x100056e8
|
|
10000bf0: 10005820 .word 0x10005820
|
|
10000bf4: 100056a0 .word 0x100056a0
|
|
|
|
10000bf8 <insert_branch_and_link>:
|
|
10000bf8: b510 push {r4, lr}
|
|
10000bfa: 1a09 subs r1, r1, r0
|
|
10000bfc: 3904 subs r1, #4
|
|
10000bfe: 084a lsrs r2, r1, #1
|
|
10000c00: 0b09 lsrs r1, r1, #12
|
|
10000c02: d108 bne.n 10000c16 <insert_branch_and_link+0x1e>
|
|
10000c04: 0549 lsls r1, r1, #21
|
|
10000c06: 0d49 lsrs r1, r1, #21
|
|
10000c08: 4b06 ldr r3, [pc, #24] @ (10000c24 <insert_branch_and_link+0x2c>)
|
|
10000c0a: 430b orrs r3, r1
|
|
10000c0c: 8003 strh r3, [r0, #0]
|
|
10000c0e: 4b06 ldr r3, [pc, #24] @ (10000c28 <insert_branch_and_link+0x30>)
|
|
10000c10: 4313 orrs r3, r2
|
|
10000c12: 8043 strh r3, [r0, #2]
|
|
10000c14: bd10 pop {r4, pc}
|
|
10000c16: 4b05 ldr r3, [pc, #20] @ (10000c2c <insert_branch_and_link+0x34>)
|
|
10000c18: 4a05 ldr r2, [pc, #20] @ (10000c30 <insert_branch_and_link+0x38>)
|
|
10000c1a: 4806 ldr r0, [pc, #24] @ (10000c34 <insert_branch_and_link+0x3c>)
|
|
10000c1c: 21ab movs r1, #171 @ 0xab
|
|
10000c1e: f001 fb43 bl 100022a8 <__assert_func>
|
|
10000c22: 46c0 nop @ (mov r8, r8)
|
|
10000c24: fffff000 .word 0xfffff000
|
|
10000c28: fffff800 .word 0xfffff800
|
|
10000c2c: 10005718 .word 0x10005718
|
|
10000c30: 100057f4 .word 0x100057f4
|
|
10000c34: 100056a0 .word 0x100056a0
|
|
|
|
10000c38 <irq_is_enabled>:
|
|
10000c38: 2301 movs r3, #1
|
|
10000c3a: 4083 lsls r3, r0
|
|
10000c3c: 4a03 ldr r2, [pc, #12] @ (10000c4c <irq_is_enabled+0x14>)
|
|
10000c3e: 6810 ldr r0, [r2, #0]
|
|
10000c40: 4018 ands r0, r3
|
|
10000c42: 1e43 subs r3, r0, #1
|
|
10000c44: 4198 sbcs r0, r3
|
|
10000c46: b2c0 uxtb r0, r0
|
|
10000c48: 4770 bx lr
|
|
10000c4a: 46c0 nop @ (mov r8, r8)
|
|
10000c4c: e000e100 .word 0xe000e100
|
|
|
|
10000c50 <irq_set_mask_enabled>:
|
|
10000c50: 2900 cmp r1, #0
|
|
10000c52: d004 beq.n 10000c5e <irq_set_mask_enabled+0xe>
|
|
10000c54: 4b03 ldr r3, [pc, #12] @ (10000c64 <irq_set_mask_enabled+0x14>)
|
|
10000c56: 6018 str r0, [r3, #0]
|
|
10000c58: 4b03 ldr r3, [pc, #12] @ (10000c68 <irq_set_mask_enabled+0x18>)
|
|
10000c5a: 6018 str r0, [r3, #0]
|
|
10000c5c: 4770 bx lr
|
|
10000c5e: 4b03 ldr r3, [pc, #12] @ (10000c6c <irq_set_mask_enabled+0x1c>)
|
|
10000c60: 6018 str r0, [r3, #0]
|
|
10000c62: e7fb b.n 10000c5c <irq_set_mask_enabled+0xc>
|
|
10000c64: e000e280 .word 0xe000e280
|
|
10000c68: e000e100 .word 0xe000e100
|
|
10000c6c: e000e180 .word 0xe000e180
|
|
|
|
10000c70 <irq_set_enabled>:
|
|
10000c70: b510 push {r4, lr}
|
|
10000c72: 2301 movs r3, #1
|
|
10000c74: 4083 lsls r3, r0
|
|
10000c76: 0018 movs r0, r3
|
|
10000c78: f7ff ffea bl 10000c50 <irq_set_mask_enabled>
|
|
10000c7c: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10000c80 <irq_get_vtable_handler>:
|
|
10000c80: 4b02 ldr r3, [pc, #8] @ (10000c8c <irq_get_vtable_handler+0xc>)
|
|
10000c82: 689b ldr r3, [r3, #8]
|
|
10000c84: 3010 adds r0, #16
|
|
10000c86: 0080 lsls r0, r0, #2
|
|
10000c88: 58c0 ldr r0, [r0, r3]
|
|
10000c8a: 4770 bx lr
|
|
10000c8c: e000ed00 .word 0xe000ed00
|
|
|
|
10000c90 <irq_set_exclusive_handler>:
|
|
10000c90: b570 push {r4, r5, r6, lr}
|
|
10000c92: 0004 movs r4, r0
|
|
10000c94: 000d movs r5, r1
|
|
10000c96: f3ef 8610 mrs r6, PRIMASK
|
|
10000c9a: b672 cpsid i
|
|
10000c9c: 4b0c ldr r3, [pc, #48] @ (10000cd0 <irq_set_exclusive_handler+0x40>)
|
|
10000c9e: 681b ldr r3, [r3, #0]
|
|
10000ca0: 2b00 cmp r3, #0
|
|
10000ca2: d0fb beq.n 10000c9c <irq_set_exclusive_handler+0xc>
|
|
10000ca4: f3bf 8f5f dmb sy
|
|
10000ca8: 0020 movs r0, r4
|
|
10000caa: f7ff ffe9 bl 10000c80 <irq_get_vtable_handler>
|
|
10000cae: 4b09 ldr r3, [pc, #36] @ (10000cd4 <irq_set_exclusive_handler+0x44>)
|
|
10000cb0: 4298 cmp r0, r3
|
|
10000cb2: d001 beq.n 10000cb8 <irq_set_exclusive_handler+0x28>
|
|
10000cb4: 42a8 cmp r0, r5
|
|
10000cb6: d105 bne.n 10000cc4 <irq_set_exclusive_handler+0x34>
|
|
10000cb8: 0032 movs r2, r6
|
|
10000cba: 0029 movs r1, r5
|
|
10000cbc: 0020 movs r0, r4
|
|
10000cbe: f7ff ff4b bl 10000b58 <set_raw_irq_handler_and_unlock>
|
|
10000cc2: bd70 pop {r4, r5, r6, pc}
|
|
10000cc4: 4b04 ldr r3, [pc, #16] @ (10000cd8 <irq_set_exclusive_handler+0x48>)
|
|
10000cc6: 4a05 ldr r2, [pc, #20] @ (10000cdc <irq_set_exclusive_handler+0x4c>)
|
|
10000cc8: 4805 ldr r0, [pc, #20] @ (10000ce0 <irq_set_exclusive_handler+0x50>)
|
|
10000cca: 2186 movs r1, #134 @ 0x86
|
|
10000ccc: f001 faec bl 100022a8 <__assert_func>
|
|
10000cd0: d0000124 .word 0xd0000124
|
|
10000cd4: 100001cd .word 0x100001cd
|
|
10000cd8: 10005728 .word 0x10005728
|
|
10000cdc: 1000583c .word 0x1000583c
|
|
10000ce0: 100056a0 .word 0x100056a0
|
|
|
|
10000ce4 <irq_remove_handler>:
|
|
10000ce4: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000ce6: 46ce mov lr, r9
|
|
10000ce8: 4647 mov r7, r8
|
|
10000cea: b580 push {r7, lr}
|
|
10000cec: b083 sub sp, #12
|
|
10000cee: 0006 movs r6, r0
|
|
10000cf0: 000d movs r5, r1
|
|
10000cf2: f3ef 8810 mrs r8, PRIMASK
|
|
10000cf6: b672 cpsid i
|
|
10000cf8: 4b4f ldr r3, [pc, #316] @ (10000e38 <irq_remove_handler+0x154>)
|
|
10000cfa: 681b ldr r3, [r3, #0]
|
|
10000cfc: 2b00 cmp r3, #0
|
|
10000cfe: d0fb beq.n 10000cf8 <irq_remove_handler+0x14>
|
|
10000d00: f3bf 8f5f dmb sy
|
|
10000d04: 4b4d ldr r3, [pc, #308] @ (10000e3c <irq_remove_handler+0x158>)
|
|
10000d06: 689a ldr r2, [r3, #8]
|
|
10000d08: 0034 movs r4, r6
|
|
10000d0a: 3410 adds r4, #16
|
|
10000d0c: 00a3 lsls r3, r4, #2
|
|
10000d0e: 58d7 ldr r7, [r2, r3]
|
|
10000d10: 4b4b ldr r3, [pc, #300] @ (10000e40 <irq_remove_handler+0x15c>)
|
|
10000d12: 429f cmp r7, r3
|
|
10000d14: d007 beq.n 10000d26 <irq_remove_handler+0x42>
|
|
10000d16: 42af cmp r7, r5
|
|
10000d18: d100 bne.n 10000d1c <irq_remove_handler+0x38>
|
|
10000d1a: e08b b.n 10000e34 <irq_remove_handler+0x150>
|
|
10000d1c: 9701 str r7, [sp, #4]
|
|
10000d1e: 4b49 ldr r3, [pc, #292] @ (10000e44 <irq_remove_handler+0x160>)
|
|
10000d20: 1afb subs r3, r7, r3
|
|
10000d22: 2b2f cmp r3, #47 @ 0x2f
|
|
10000d24: d909 bls.n 10000d3a <irq_remove_handler+0x56>
|
|
10000d26: 4642 mov r2, r8
|
|
10000d28: 0039 movs r1, r7
|
|
10000d2a: 0030 movs r0, r6
|
|
10000d2c: f7ff ff14 bl 10000b58 <set_raw_irq_handler_and_unlock>
|
|
10000d30: b003 add sp, #12
|
|
10000d32: bcc0 pop {r6, r7}
|
|
10000d34: 46b9 mov r9, r7
|
|
10000d36: 46b0 mov r8, r6
|
|
10000d38: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10000d3a: 0030 movs r0, r6
|
|
10000d3c: f7ff ff7c bl 10000c38 <irq_is_enabled>
|
|
10000d40: 4681 mov r9, r0
|
|
10000d42: 2100 movs r1, #0
|
|
10000d44: 0030 movs r0, r6
|
|
10000d46: f7ff ff93 bl 10000c70 <irq_set_enabled>
|
|
10000d4a: f3bf 8f5f dmb sy
|
|
10000d4e: f3ef 8105 mrs r1, IPSR
|
|
10000d52: 2900 cmp r1, #0
|
|
10000d54: d001 beq.n 10000d5a <irq_remove_handler+0x76>
|
|
10000d56: 428c cmp r4, r1
|
|
10000d58: d111 bne.n 10000d7e <irq_remove_handler+0x9a>
|
|
10000d5a: 2301 movs r3, #1
|
|
10000d5c: 9c01 ldr r4, [sp, #4]
|
|
10000d5e: 439c bics r4, r3
|
|
10000d60: 2000 movs r0, #0
|
|
10000d62: 68a3 ldr r3, [r4, #8]
|
|
10000d64: 42ab cmp r3, r5
|
|
10000d66: d012 beq.n 10000d8e <irq_remove_handler+0xaa>
|
|
10000d68: 2206 movs r2, #6
|
|
10000d6a: 56a2 ldrsb r2, [r4, r2]
|
|
10000d6c: 2a00 cmp r2, #0
|
|
10000d6e: db0d blt.n 10000d8c <irq_remove_handler+0xa8>
|
|
10000d70: 0053 lsls r3, r2, #1
|
|
10000d72: 189b adds r3, r3, r2
|
|
10000d74: 009b lsls r3, r3, #2
|
|
10000d76: 4a33 ldr r2, [pc, #204] @ (10000e44 <irq_remove_handler+0x160>)
|
|
10000d78: 0020 movs r0, r4
|
|
10000d7a: 18d4 adds r4, r2, r3
|
|
10000d7c: e7f1 b.n 10000d62 <irq_remove_handler+0x7e>
|
|
10000d7e: 4b32 ldr r3, [pc, #200] @ (10000e48 <irq_remove_handler+0x164>)
|
|
10000d80: 4a32 ldr r2, [pc, #200] @ (10000e4c <irq_remove_handler+0x168>)
|
|
10000d82: 2136 movs r1, #54 @ 0x36
|
|
10000d84: 4832 ldr r0, [pc, #200] @ (10000e50 <irq_remove_handler+0x16c>)
|
|
10000d86: 31ff adds r1, #255 @ 0xff
|
|
10000d88: f001 fa8e bl 100022a8 <__assert_func>
|
|
10000d8c: 0020 movs r0, r4
|
|
10000d8e: 42ab cmp r3, r5
|
|
10000d90: d149 bne.n 10000e26 <irq_remove_handler+0x142>
|
|
10000d92: 2506 movs r5, #6
|
|
10000d94: 5765 ldrsb r5, [r4, r5]
|
|
10000d96: 2d00 cmp r5, #0
|
|
10000d98: db2b blt.n 10000df2 <irq_remove_handler+0x10e>
|
|
10000d9a: 4b2a ldr r3, [pc, #168] @ (10000e44 <irq_remove_handler+0x160>)
|
|
10000d9c: 006a lsls r2, r5, #1
|
|
10000d9e: 1952 adds r2, r2, r5
|
|
10000da0: 0092 lsls r2, r2, #2
|
|
10000da2: 189b adds r3, r3, r2
|
|
10000da4: 689a ldr r2, [r3, #8]
|
|
10000da6: 60a2 str r2, [r4, #8]
|
|
10000da8: 79da ldrb r2, [r3, #7]
|
|
10000daa: 71e2 strb r2, [r4, #7]
|
|
10000dac: 799b ldrb r3, [r3, #6]
|
|
10000dae: b25b sxtb r3, r3
|
|
10000db0: 71a3 strb r3, [r4, #6]
|
|
10000db2: 2b00 cmp r3, #0
|
|
10000db4: da0f bge.n 10000dd6 <irq_remove_handler+0xf2>
|
|
10000db6: 4827 ldr r0, [pc, #156] @ (10000e54 <irq_remove_handler+0x170>)
|
|
10000db8: 80a0 strh r0, [r4, #4]
|
|
10000dba: 4b22 ldr r3, [pc, #136] @ (10000e44 <irq_remove_handler+0x160>)
|
|
10000dbc: 006a lsls r2, r5, #1
|
|
10000dbe: 1952 adds r2, r2, r5
|
|
10000dc0: 0092 lsls r2, r2, #2
|
|
10000dc2: 189b adds r3, r3, r2
|
|
10000dc4: 4a24 ldr r2, [pc, #144] @ (10000e58 <irq_remove_handler+0x174>)
|
|
10000dc6: 7811 ldrb r1, [r2, #0]
|
|
10000dc8: 7199 strb r1, [r3, #6]
|
|
10000dca: 7015 strb r5, [r2, #0]
|
|
10000dcc: 4649 mov r1, r9
|
|
10000dce: 0030 movs r0, r6
|
|
10000dd0: f7ff ff4e bl 10000c70 <irq_set_enabled>
|
|
10000dd4: e7a7 b.n 10000d26 <irq_remove_handler+0x42>
|
|
10000dd6: 0068 lsls r0, r5, #1
|
|
10000dd8: 1940 adds r0, r0, r5
|
|
10000dda: 0080 lsls r0, r0, #2
|
|
10000ddc: 4b19 ldr r3, [pc, #100] @ (10000e44 <irq_remove_handler+0x160>)
|
|
10000dde: 18c0 adds r0, r0, r3
|
|
10000de0: 3004 adds r0, #4
|
|
10000de2: f7ff fecd bl 10000b80 <resolve_branch>
|
|
10000de6: 0001 movs r1, r0
|
|
10000de8: 1d23 adds r3, r4, #4
|
|
10000dea: 0018 movs r0, r3
|
|
10000dec: f7ff fee0 bl 10000bb0 <make_branch>
|
|
10000df0: e7e2 b.n 10000db8 <irq_remove_handler+0xd4>
|
|
10000df2: 2900 cmp r1, #0
|
|
10000df4: d112 bne.n 10000e1c <irq_remove_handler+0x138>
|
|
10000df6: 2800 cmp r0, #0
|
|
10000df8: d00e beq.n 10000e18 <irq_remove_handler+0x134>
|
|
10000dfa: 23ff movs r3, #255 @ 0xff
|
|
10000dfc: 7183 strb r3, [r0, #6]
|
|
10000dfe: 4b17 ldr r3, [pc, #92] @ (10000e5c <irq_remove_handler+0x178>)
|
|
10000e00: 8083 strh r3, [r0, #4]
|
|
10000e02: 4915 ldr r1, [pc, #84] @ (10000e58 <irq_remove_handler+0x174>)
|
|
10000e04: 780b ldrb r3, [r1, #0]
|
|
10000e06: 71a3 strb r3, [r4, #6]
|
|
10000e08: 4a0e ldr r2, [pc, #56] @ (10000e44 <irq_remove_handler+0x160>)
|
|
10000e0a: 4b15 ldr r3, [pc, #84] @ (10000e60 <irq_remove_handler+0x17c>)
|
|
10000e0c: 1aa4 subs r4, r4, r2
|
|
10000e0e: 4164 adcs r4, r4
|
|
10000e10: 4363 muls r3, r4
|
|
10000e12: 0d1b lsrs r3, r3, #20
|
|
10000e14: 700b strb r3, [r1, #0]
|
|
10000e16: e7d9 b.n 10000dcc <irq_remove_handler+0xe8>
|
|
10000e18: 4f09 ldr r7, [pc, #36] @ (10000e40 <irq_remove_handler+0x15c>)
|
|
10000e1a: e7f2 b.n 10000e02 <irq_remove_handler+0x11e>
|
|
10000e1c: 4911 ldr r1, [pc, #68] @ (10000e64 <irq_remove_handler+0x180>)
|
|
10000e1e: 1d20 adds r0, r4, #4
|
|
10000e20: f7ff feea bl 10000bf8 <insert_branch_and_link>
|
|
10000e24: e7d2 b.n 10000dcc <irq_remove_handler+0xe8>
|
|
10000e26: 4b10 ldr r3, [pc, #64] @ (10000e68 <irq_remove_handler+0x184>)
|
|
10000e28: 4a08 ldr r2, [pc, #32] @ (10000e4c <irq_remove_handler+0x168>)
|
|
10000e2a: 216a movs r1, #106 @ 0x6a
|
|
10000e2c: 4808 ldr r0, [pc, #32] @ (10000e50 <irq_remove_handler+0x16c>)
|
|
10000e2e: 31ff adds r1, #255 @ 0xff
|
|
10000e30: f001 fa3a bl 100022a8 <__assert_func>
|
|
10000e34: 4f02 ldr r7, [pc, #8] @ (10000e40 <irq_remove_handler+0x15c>)
|
|
10000e36: e776 b.n 10000d26 <irq_remove_handler+0x42>
|
|
10000e38: d0000124 .word 0xd0000124
|
|
10000e3c: e000ed00 .word 0xe000ed00
|
|
10000e40: 100001cd .word 0x100001cd
|
|
10000e44: 2000023c .word 0x2000023c
|
|
10000e48: 10005760 .word 0x10005760
|
|
10000e4c: 1000580c .word 0x1000580c
|
|
10000e50: 100056a0 .word 0x100056a0
|
|
10000e54: 0000bd01 .word 0x0000bd01
|
|
10000e58: 20000d87 .word 0x20000d87
|
|
10000e5c: ffffbd01 .word 0xffffbd01
|
|
10000e60: 0000aaaa .word 0x0000aaaa
|
|
10000e64: 20000276 .word 0x20000276
|
|
10000e68: 10005794 .word 0x10005794
|
|
|
|
10000e6c <irq_add_tail_to_free_list>:
|
|
10000e6c: b570 push {r4, r5, r6, lr}
|
|
10000e6e: 2201 movs r2, #1
|
|
10000e70: 4302 orrs r2, r0
|
|
10000e72: 4b2e ldr r3, [pc, #184] @ (10000f2c <irq_add_tail_to_free_list+0xc0>)
|
|
10000e74: 1ad3 subs r3, r2, r3
|
|
10000e76: 2b2f cmp r3, #47 @ 0x2f
|
|
10000e78: d828 bhi.n 10000ecc <irq_add_tail_to_free_list+0x60>
|
|
10000e7a: f3ef 8305 mrs r3, IPSR
|
|
10000e7e: 2b00 cmp r3, #0
|
|
10000e80: d02b beq.n 10000eda <irq_add_tail_to_free_list+0x6e>
|
|
10000e82: f3ef 8c10 mrs ip, PRIMASK
|
|
10000e86: b672 cpsid i
|
|
10000e88: 4929 ldr r1, [pc, #164] @ (10000f30 <irq_add_tail_to_free_list+0xc4>)
|
|
10000e8a: 6809 ldr r1, [r1, #0]
|
|
10000e8c: 2900 cmp r1, #0
|
|
10000e8e: d0fb beq.n 10000e88 <irq_add_tail_to_free_list+0x1c>
|
|
10000e90: f3bf 8f5f dmb sy
|
|
10000e94: 4c25 ldr r4, [pc, #148] @ (10000f2c <irq_add_tail_to_free_list+0xc0>)
|
|
10000e96: 4927 ldr r1, [pc, #156] @ (10000f34 <irq_add_tail_to_free_list+0xc8>)
|
|
10000e98: 0005 movs r5, r0
|
|
10000e9a: 1b2d subs r5, r5, r4
|
|
10000e9c: 416d adcs r5, r5
|
|
10000e9e: 4369 muls r1, r5
|
|
10000ea0: 0d09 lsrs r1, r1, #20
|
|
10000ea2: b24c sxtb r4, r1
|
|
10000ea4: 4924 ldr r1, [pc, #144] @ (10000f38 <irq_add_tail_to_free_list+0xcc>)
|
|
10000ea6: 6889 ldr r1, [r1, #8]
|
|
10000ea8: 009b lsls r3, r3, #2
|
|
10000eaa: 58c9 ldr r1, [r1, r3]
|
|
10000eac: 4291 cmp r1, r2
|
|
10000eae: d01b beq.n 10000ee8 <irq_add_tail_to_free_list+0x7c>
|
|
10000eb0: 2100 movs r1, #0
|
|
10000eb2: 2903 cmp r1, #3
|
|
10000eb4: d832 bhi.n 10000f1c <irq_add_tail_to_free_list+0xb0>
|
|
10000eb6: 4b1d ldr r3, [pc, #116] @ (10000f2c <irq_add_tail_to_free_list+0xc0>)
|
|
10000eb8: 004a lsls r2, r1, #1
|
|
10000eba: 1852 adds r2, r2, r1
|
|
10000ebc: 0092 lsls r2, r2, #2
|
|
10000ebe: 189b adds r3, r3, r2
|
|
10000ec0: 799b ldrb r3, [r3, #6]
|
|
10000ec2: b25b sxtb r3, r3
|
|
10000ec4: 42a3 cmp r3, r4
|
|
10000ec6: d01f beq.n 10000f08 <irq_add_tail_to_free_list+0x9c>
|
|
10000ec8: 3101 adds r1, #1
|
|
10000eca: e7f2 b.n 10000eb2 <irq_add_tail_to_free_list+0x46>
|
|
10000ecc: 4b1b ldr r3, [pc, #108] @ (10000f3c <irq_add_tail_to_free_list+0xd0>)
|
|
10000ece: 4a1c ldr r2, [pc, #112] @ (10000f40 <irq_add_tail_to_free_list+0xd4>)
|
|
10000ed0: 21c7 movs r1, #199 @ 0xc7
|
|
10000ed2: 481c ldr r0, [pc, #112] @ (10000f44 <irq_add_tail_to_free_list+0xd8>)
|
|
10000ed4: 0049 lsls r1, r1, #1
|
|
10000ed6: f001 f9e7 bl 100022a8 <__assert_func>
|
|
10000eda: 4b1b ldr r3, [pc, #108] @ (10000f48 <irq_add_tail_to_free_list+0xdc>)
|
|
10000edc: 4a18 ldr r2, [pc, #96] @ (10000f40 <irq_add_tail_to_free_list+0xd4>)
|
|
10000ede: 2192 movs r1, #146 @ 0x92
|
|
10000ee0: 4818 ldr r0, [pc, #96] @ (10000f44 <irq_add_tail_to_free_list+0xd8>)
|
|
10000ee2: 31ff adds r1, #255 @ 0xff
|
|
10000ee4: f001 f9e0 bl 100022a8 <__assert_func>
|
|
10000ee8: 4a13 ldr r2, [pc, #76] @ (10000f38 <irq_add_tail_to_free_list+0xcc>)
|
|
10000eea: 6892 ldr r2, [r2, #8]
|
|
10000eec: 4917 ldr r1, [pc, #92] @ (10000f4c <irq_add_tail_to_free_list+0xe0>)
|
|
10000eee: 50d1 str r1, [r2, r3]
|
|
10000ef0: 4b17 ldr r3, [pc, #92] @ (10000f50 <irq_add_tail_to_free_list+0xe4>)
|
|
10000ef2: 781a ldrb r2, [r3, #0]
|
|
10000ef4: 7182 strb r2, [r0, #6]
|
|
10000ef6: 701c strb r4, [r3, #0]
|
|
10000ef8: f3bf 8f5f dmb sy
|
|
10000efc: 4b0c ldr r3, [pc, #48] @ (10000f30 <irq_add_tail_to_free_list+0xc4>)
|
|
10000efe: 2200 movs r2, #0
|
|
10000f00: 601a str r2, [r3, #0]
|
|
10000f02: f38c 8810 msr PRIMASK, ip
|
|
10000f06: bd70 pop {r4, r5, r6, pc}
|
|
10000f08: 4b08 ldr r3, [pc, #32] @ (10000f2c <irq_add_tail_to_free_list+0xc0>)
|
|
10000f0a: 004a lsls r2, r1, #1
|
|
10000f0c: 1855 adds r5, r2, r1
|
|
10000f0e: 00ad lsls r5, r5, #2
|
|
10000f10: 195d adds r5, r3, r5
|
|
10000f12: 26ff movs r6, #255 @ 0xff
|
|
10000f14: 71ae strb r6, [r5, #6]
|
|
10000f16: 4a0f ldr r2, [pc, #60] @ (10000f54 <irq_add_tail_to_free_list+0xe8>)
|
|
10000f18: 80aa strh r2, [r5, #4]
|
|
10000f1a: e7e9 b.n 10000ef0 <irq_add_tail_to_free_list+0x84>
|
|
10000f1c: 4b0e ldr r3, [pc, #56] @ (10000f58 <irq_add_tail_to_free_list+0xec>)
|
|
10000f1e: 4a08 ldr r2, [pc, #32] @ (10000f40 <irq_add_tail_to_free_list+0xd4>)
|
|
10000f20: 21d1 movs r1, #209 @ 0xd1
|
|
10000f22: 4808 ldr r0, [pc, #32] @ (10000f44 <irq_add_tail_to_free_list+0xd8>)
|
|
10000f24: 0049 lsls r1, r1, #1
|
|
10000f26: f001 f9bf bl 100022a8 <__assert_func>
|
|
10000f2a: 46c0 nop @ (mov r8, r8)
|
|
10000f2c: 2000023c .word 0x2000023c
|
|
10000f30: d0000124 .word 0xd0000124
|
|
10000f34: 0000aaaa .word 0x0000aaaa
|
|
10000f38: e000ed00 .word 0xe000ed00
|
|
10000f3c: 1000579c .word 0x1000579c
|
|
10000f40: 100057d8 .word 0x100057d8
|
|
10000f44: 100056a0 .word 0x100056a0
|
|
10000f48: 100057c4 .word 0x100057c4
|
|
10000f4c: 100001cd .word 0x100001cd
|
|
10000f50: 20000d87 .word 0x20000d87
|
|
10000f54: ffffbd01 .word 0xffffbd01
|
|
10000f58: 100057d0 .word 0x100057d0
|
|
|
|
10000f5c <irq_init_priorities>:
|
|
10000f5c: 2200 movs r2, #0
|
|
10000f5e: 4b04 ldr r3, [pc, #16] @ (10000f70 <irq_init_priorities+0x14>)
|
|
10000f60: e002 b.n 10000f68 <irq_init_priorities+0xc>
|
|
10000f62: 4904 ldr r1, [pc, #16] @ (10000f74 <irq_init_priorities+0x18>)
|
|
10000f64: c302 stmia r3!, {r1}
|
|
10000f66: 3201 adds r2, #1
|
|
10000f68: 2a07 cmp r2, #7
|
|
10000f6a: d9fa bls.n 10000f62 <irq_init_priorities+0x6>
|
|
10000f6c: 4770 bx lr
|
|
10000f6e: 46c0 nop @ (mov r8, r8)
|
|
10000f70: e000e400 .word 0xe000e400
|
|
10000f74: 80808080 .word 0x80808080
|
|
|
|
10000f78 <lock_init>:
|
|
10000f78: 4b02 ldr r3, [pc, #8] @ (10000f84 <lock_init+0xc>)
|
|
10000f7a: 469c mov ip, r3
|
|
10000f7c: 4461 add r1, ip
|
|
10000f7e: 0089 lsls r1, r1, #2
|
|
10000f80: 6001 str r1, [r0, #0]
|
|
10000f82: 4770 bx lr
|
|
10000f84: 34000040 .word 0x34000040
|
|
|
|
10000f88 <mutex_init>:
|
|
10000f88: b510 push {r4, lr}
|
|
10000f8a: 0004 movs r4, r0
|
|
10000f8c: f7ff fdd6 bl 10000b3c <next_striped_spin_lock_num>
|
|
10000f90: 0001 movs r1, r0
|
|
10000f92: 0020 movs r0, r4
|
|
10000f94: f7ff fff0 bl 10000f78 <lock_init>
|
|
10000f98: 23ff movs r3, #255 @ 0xff
|
|
10000f9a: 7123 strb r3, [r4, #4]
|
|
10000f9c: f3bf 8f5f dmb sy
|
|
10000fa0: bd10 pop {r4, pc}
|
|
|
|
10000fa2 <recursive_mutex_init>:
|
|
10000fa2: b510 push {r4, lr}
|
|
10000fa4: 0004 movs r4, r0
|
|
10000fa6: f7ff fdc9 bl 10000b3c <next_striped_spin_lock_num>
|
|
10000faa: 0001 movs r1, r0
|
|
10000fac: 0020 movs r0, r4
|
|
10000fae: f7ff ffe3 bl 10000f78 <lock_init>
|
|
10000fb2: 23ff movs r3, #255 @ 0xff
|
|
10000fb4: 7123 strb r3, [r4, #4]
|
|
10000fb6: 2300 movs r3, #0
|
|
10000fb8: 7163 strb r3, [r4, #5]
|
|
10000fba: f3bf 8f5f dmb sy
|
|
10000fbe: bd10 pop {r4, pc}
|
|
|
|
10000fc0 <time_reached>:
|
|
10000fc0: 4b08 ldr r3, [pc, #32] @ (10000fe4 <time_reached+0x24>)
|
|
10000fc2: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10000fc4: 4299 cmp r1, r3
|
|
10000fc6: d809 bhi.n 10000fdc <time_reached+0x1c>
|
|
10000fc8: 4a06 ldr r2, [pc, #24] @ (10000fe4 <time_reached+0x24>)
|
|
10000fca: 6a92 ldr r2, [r2, #40] @ 0x28
|
|
10000fcc: 4282 cmp r2, r0
|
|
10000fce: d207 bcs.n 10000fe0 <time_reached+0x20>
|
|
10000fd0: 4299 cmp r1, r3
|
|
10000fd2: d001 beq.n 10000fd8 <time_reached+0x18>
|
|
10000fd4: 2001 movs r0, #1
|
|
10000fd6: e002 b.n 10000fde <time_reached+0x1e>
|
|
10000fd8: 2000 movs r0, #0
|
|
10000fda: e000 b.n 10000fde <time_reached+0x1e>
|
|
10000fdc: 2000 movs r0, #0
|
|
10000fde: 4770 bx lr
|
|
10000fe0: 2001 movs r0, #1
|
|
10000fe2: e7fc b.n 10000fde <time_reached+0x1e>
|
|
10000fe4: 40054000 .word 0x40054000
|
|
|
|
10000fe8 <get_entry>:
|
|
10000fe8: b510 push {r4, lr}
|
|
10000fea: 2900 cmp r1, #0
|
|
10000fec: d00a beq.n 10001004 <get_entry+0x1c>
|
|
10000fee: 6803 ldr r3, [r0, #0]
|
|
10000ff0: 7b1b ldrb r3, [r3, #12]
|
|
10000ff2: 428b cmp r3, r1
|
|
10000ff4: d306 bcc.n 10001004 <get_entry+0x1c>
|
|
10000ff6: 6880 ldr r0, [r0, #8]
|
|
10000ff8: 4b05 ldr r3, [pc, #20] @ (10001010 <get_entry+0x28>)
|
|
10000ffa: 469c mov ip, r3
|
|
10000ffc: 4461 add r1, ip
|
|
10000ffe: 0109 lsls r1, r1, #4
|
|
10001000: 1840 adds r0, r0, r1
|
|
10001002: bd10 pop {r4, pc}
|
|
10001004: 4b03 ldr r3, [pc, #12] @ (10001014 <get_entry+0x2c>)
|
|
10001006: 4a04 ldr r2, [pc, #16] @ (10001018 <get_entry+0x30>)
|
|
10001008: 4804 ldr r0, [pc, #16] @ (1000101c <get_entry+0x34>)
|
|
1000100a: 213c movs r1, #60 @ 0x3c
|
|
1000100c: f001 f94c bl 100022a8 <__assert_func>
|
|
10001010: 0fffffff .word 0x0fffffff
|
|
10001014: 10005914 .word 0x10005914
|
|
10001018: 10005c4c .word 0x10005c4c
|
|
1000101c: 10005938 .word 0x10005938
|
|
|
|
10001020 <timer_pool_entry_comparator>:
|
|
10001020: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10001022: 0004 movs r4, r0
|
|
10001024: 0017 movs r7, r2
|
|
10001026: f7ff ffdf bl 10000fe8 <get_entry>
|
|
1000102a: 6806 ldr r6, [r0, #0]
|
|
1000102c: 6845 ldr r5, [r0, #4]
|
|
1000102e: 0039 movs r1, r7
|
|
10001030: 0020 movs r0, r4
|
|
10001032: f7ff ffd9 bl 10000fe8 <get_entry>
|
|
10001036: 6802 ldr r2, [r0, #0]
|
|
10001038: 6843 ldr r3, [r0, #4]
|
|
1000103a: 2001 movs r0, #1
|
|
1000103c: 42ab cmp r3, r5
|
|
1000103e: d801 bhi.n 10001044 <timer_pool_entry_comparator+0x24>
|
|
10001040: d002 beq.n 10001048 <timer_pool_entry_comparator+0x28>
|
|
10001042: 2000 movs r0, #0
|
|
10001044: b2c0 uxtb r0, r0
|
|
10001046: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10001048: 42b2 cmp r2, r6
|
|
1000104a: d8fb bhi.n 10001044 <timer_pool_entry_comparator+0x24>
|
|
1000104c: e7f9 b.n 10001042 <timer_pool_entry_comparator+0x22>
|
|
...
|
|
|
|
10001050 <update_us_since_boot>:
|
|
10001050: b510 push {r4, lr}
|
|
10001052: 2b00 cmp r3, #0
|
|
10001054: db02 blt.n 1000105c <update_us_since_boot+0xc>
|
|
10001056: 6002 str r2, [r0, #0]
|
|
10001058: 6043 str r3, [r0, #4]
|
|
1000105a: bd10 pop {r4, pc}
|
|
1000105c: 4b02 ldr r3, [pc, #8] @ (10001068 <update_us_since_boot+0x18>)
|
|
1000105e: 4a03 ldr r2, [pc, #12] @ (1000106c <update_us_since_boot+0x1c>)
|
|
10001060: 4803 ldr r0, [pc, #12] @ (10001070 <update_us_since_boot+0x20>)
|
|
10001062: 213f movs r1, #63 @ 0x3f
|
|
10001064: f001 f920 bl 100022a8 <__assert_func>
|
|
10001068: 10005594 .word 0x10005594
|
|
1000106c: 10005c18 .word 0x10005c18
|
|
10001070: 100055b0 .word 0x100055b0
|
|
|
|
10001074 <delayed_by_us>:
|
|
10001074: b510 push {r4, lr}
|
|
10001076: b082 sub sp, #8
|
|
10001078: 0004 movs r4, r0
|
|
1000107a: 9804 ldr r0, [sp, #16]
|
|
1000107c: 9905 ldr r1, [sp, #20]
|
|
1000107e: 1812 adds r2, r2, r0
|
|
10001080: 414b adcs r3, r1
|
|
10001082: 2b00 cmp r3, #0
|
|
10001084: db09 blt.n 1000109a <delayed_by_us+0x26>
|
|
10001086: 4668 mov r0, sp
|
|
10001088: f7ff ffe2 bl 10001050 <update_us_since_boot>
|
|
1000108c: 9a00 ldr r2, [sp, #0]
|
|
1000108e: 9b01 ldr r3, [sp, #4]
|
|
10001090: 6022 str r2, [r4, #0]
|
|
10001092: 6063 str r3, [r4, #4]
|
|
10001094: 0020 movs r0, r4
|
|
10001096: b002 add sp, #8
|
|
10001098: bd10 pop {r4, pc}
|
|
1000109a: 2201 movs r2, #1
|
|
1000109c: 4252 negs r2, r2
|
|
1000109e: 4b01 ldr r3, [pc, #4] @ (100010a4 <delayed_by_us+0x30>)
|
|
100010a0: e7f1 b.n 10001086 <delayed_by_us+0x12>
|
|
100010a2: 46c0 nop @ (mov r8, r8)
|
|
100010a4: 7fffffff .word 0x7fffffff
|
|
|
|
100010a8 <ph_get_node>:
|
|
100010a8: b510 push {r4, lr}
|
|
100010aa: 2900 cmp r1, #0
|
|
100010ac: d008 beq.n 100010c0 <ph_get_node+0x18>
|
|
100010ae: 7b03 ldrb r3, [r0, #12]
|
|
100010b0: 428b cmp r3, r1
|
|
100010b2: d305 bcc.n 100010c0 <ph_get_node+0x18>
|
|
100010b4: 6800 ldr r0, [r0, #0]
|
|
100010b6: 004b lsls r3, r1, #1
|
|
100010b8: 185b adds r3, r3, r1
|
|
100010ba: 3b03 subs r3, #3
|
|
100010bc: 18c0 adds r0, r0, r3
|
|
100010be: bd10 pop {r4, pc}
|
|
100010c0: 4b02 ldr r3, [pc, #8] @ (100010cc <ph_get_node+0x24>)
|
|
100010c2: 4a03 ldr r2, [pc, #12] @ (100010d0 <ph_get_node+0x28>)
|
|
100010c4: 4803 ldr r0, [pc, #12] @ (100010d4 <ph_get_node+0x2c>)
|
|
100010c6: 2168 movs r1, #104 @ 0x68
|
|
100010c8: f001 f8ee bl 100022a8 <__assert_func>
|
|
100010cc: 1000597c .word 0x1000597c
|
|
100010d0: 10005bf4 .word 0x10005bf4
|
|
100010d4: 10005998 .word 0x10005998
|
|
|
|
100010d8 <ph_contains_node>:
|
|
100010d8: b510 push {r4, lr}
|
|
100010da: 7b43 ldrb r3, [r0, #13]
|
|
100010dc: 428b cmp r3, r1
|
|
100010de: d101 bne.n 100010e4 <ph_contains_node+0xc>
|
|
100010e0: 2001 movs r0, #1
|
|
100010e2: bd10 pop {r4, pc}
|
|
100010e4: f7ff ffe0 bl 100010a8 <ph_get_node>
|
|
100010e8: 7883 ldrb r3, [r0, #2]
|
|
100010ea: 2b00 cmp r3, #0
|
|
100010ec: d101 bne.n 100010f2 <ph_contains_node+0x1a>
|
|
100010ee: 2000 movs r0, #0
|
|
100010f0: e7f7 b.n 100010e2 <ph_contains_node+0xa>
|
|
100010f2: 2001 movs r0, #1
|
|
100010f4: e7f5 b.n 100010e2 <ph_contains_node+0xa>
|
|
|
|
100010f6 <ph_new_node>:
|
|
100010f6: b570 push {r4, r5, r6, lr}
|
|
100010f8: 0004 movs r4, r0
|
|
100010fa: 7b85 ldrb r5, [r0, #14]
|
|
100010fc: 2d00 cmp r5, #0
|
|
100010fe: d101 bne.n 10001104 <ph_new_node+0xe>
|
|
10001100: 0028 movs r0, r5
|
|
10001102: bd70 pop {r4, r5, r6, pc}
|
|
10001104: 0029 movs r1, r5
|
|
10001106: f7ff ffcf bl 100010a8 <ph_get_node>
|
|
1000110a: 7843 ldrb r3, [r0, #1]
|
|
1000110c: 73a3 strb r3, [r4, #14]
|
|
1000110e: 2b00 cmp r3, #0
|
|
10001110: d100 bne.n 10001114 <ph_new_node+0x1e>
|
|
10001112: 73e3 strb r3, [r4, #15]
|
|
10001114: 2300 movs r3, #0
|
|
10001116: 7083 strb r3, [r0, #2]
|
|
10001118: 7043 strb r3, [r0, #1]
|
|
1000111a: 7003 strb r3, [r0, #0]
|
|
1000111c: e7f0 b.n 10001100 <ph_new_node+0xa>
|
|
...
|
|
|
|
10001120 <ph_add_child_node>:
|
|
10001120: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10001122: 0006 movs r6, r0
|
|
10001124: 000c movs r4, r1
|
|
10001126: 0015 movs r5, r2
|
|
10001128: f7ff ffbe bl 100010a8 <ph_get_node>
|
|
1000112c: 0007 movs r7, r0
|
|
1000112e: 2c00 cmp r4, #0
|
|
10001130: d00d beq.n 1000114e <ph_add_child_node+0x2e>
|
|
10001132: 2d00 cmp r5, #0
|
|
10001134: d011 beq.n 1000115a <ph_add_child_node+0x3a>
|
|
10001136: 42ac cmp r4, r5
|
|
10001138: d015 beq.n 10001166 <ph_add_child_node+0x46>
|
|
1000113a: 0029 movs r1, r5
|
|
1000113c: 0030 movs r0, r6
|
|
1000113e: f7ff ffb3 bl 100010a8 <ph_get_node>
|
|
10001142: 7084 strb r4, [r0, #2]
|
|
10001144: 783b ldrb r3, [r7, #0]
|
|
10001146: 2b00 cmp r3, #0
|
|
10001148: d113 bne.n 10001172 <ph_add_child_node+0x52>
|
|
1000114a: 703d strb r5, [r7, #0]
|
|
1000114c: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
1000114e: 4b0a ldr r3, [pc, #40] @ (10001178 <ph_add_child_node+0x58>)
|
|
10001150: 4a0a ldr r2, [pc, #40] @ (1000117c <ph_add_child_node+0x5c>)
|
|
10001152: 480b ldr r0, [pc, #44] @ (10001180 <ph_add_child_node+0x60>)
|
|
10001154: 216f movs r1, #111 @ 0x6f
|
|
10001156: f001 f8a7 bl 100022a8 <__assert_func>
|
|
1000115a: 4b0a ldr r3, [pc, #40] @ (10001184 <ph_add_child_node+0x64>)
|
|
1000115c: 4a07 ldr r2, [pc, #28] @ (1000117c <ph_add_child_node+0x5c>)
|
|
1000115e: 4808 ldr r0, [pc, #32] @ (10001180 <ph_add_child_node+0x60>)
|
|
10001160: 2170 movs r1, #112 @ 0x70
|
|
10001162: f001 f8a1 bl 100022a8 <__assert_func>
|
|
10001166: 4b08 ldr r3, [pc, #32] @ (10001188 <ph_add_child_node+0x68>)
|
|
10001168: 4a04 ldr r2, [pc, #16] @ (1000117c <ph_add_child_node+0x5c>)
|
|
1000116a: 4805 ldr r0, [pc, #20] @ (10001180 <ph_add_child_node+0x60>)
|
|
1000116c: 2171 movs r1, #113 @ 0x71
|
|
1000116e: f001 f89b bl 100022a8 <__assert_func>
|
|
10001172: 7043 strb r3, [r0, #1]
|
|
10001174: 703d strb r5, [r7, #0]
|
|
10001176: e7e9 b.n 1000114c <ph_add_child_node+0x2c>
|
|
10001178: 100059ec .word 0x100059ec
|
|
1000117c: 10005bd0 .word 0x10005bd0
|
|
10001180: 10005998 .word 0x10005998
|
|
10001184: 100059f8 .word 0x100059f8
|
|
10001188: 10005a04 .word 0x10005a04
|
|
|
|
1000118c <ph_merge_nodes>:
|
|
1000118c: b570 push {r4, r5, r6, lr}
|
|
1000118e: 0006 movs r6, r0
|
|
10001190: 000d movs r5, r1
|
|
10001192: 0014 movs r4, r2
|
|
10001194: 2900 cmp r1, #0
|
|
10001196: d014 beq.n 100011c2 <ph_merge_nodes+0x36>
|
|
10001198: 2a00 cmp r2, #0
|
|
1000119a: d014 beq.n 100011c6 <ph_merge_nodes+0x3a>
|
|
1000119c: 6843 ldr r3, [r0, #4]
|
|
1000119e: 6880 ldr r0, [r0, #8]
|
|
100011a0: 4798 blx r3
|
|
100011a2: 2800 cmp r0, #0
|
|
100011a4: d006 beq.n 100011b4 <ph_merge_nodes+0x28>
|
|
100011a6: 0022 movs r2, r4
|
|
100011a8: 0029 movs r1, r5
|
|
100011aa: 0030 movs r0, r6
|
|
100011ac: f7ff ffb8 bl 10001120 <ph_add_child_node>
|
|
100011b0: 0028 movs r0, r5
|
|
100011b2: e007 b.n 100011c4 <ph_merge_nodes+0x38>
|
|
100011b4: 002a movs r2, r5
|
|
100011b6: 0021 movs r1, r4
|
|
100011b8: 0030 movs r0, r6
|
|
100011ba: f7ff ffb1 bl 10001120 <ph_add_child_node>
|
|
100011be: 0020 movs r0, r4
|
|
100011c0: e000 b.n 100011c4 <ph_merge_nodes+0x38>
|
|
100011c2: 0010 movs r0, r2
|
|
100011c4: bd70 pop {r4, r5, r6, pc}
|
|
100011c6: 0008 movs r0, r1
|
|
100011c8: e7fc b.n 100011c4 <ph_merge_nodes+0x38>
|
|
...
|
|
|
|
100011cc <ph_insert_node>:
|
|
100011cc: b570 push {r4, r5, r6, lr}
|
|
100011ce: 0004 movs r4, r0
|
|
100011d0: 1e0d subs r5, r1, #0
|
|
100011d2: d00c beq.n 100011ee <ph_insert_node+0x22>
|
|
100011d4: f7ff ff68 bl 100010a8 <ph_get_node>
|
|
100011d8: 2300 movs r3, #0
|
|
100011da: 7083 strb r3, [r0, #2]
|
|
100011dc: 7043 strb r3, [r0, #1]
|
|
100011de: 7003 strb r3, [r0, #0]
|
|
100011e0: 7b61 ldrb r1, [r4, #13]
|
|
100011e2: 002a movs r2, r5
|
|
100011e4: 0020 movs r0, r4
|
|
100011e6: f7ff ffd1 bl 1000118c <ph_merge_nodes>
|
|
100011ea: 7360 strb r0, [r4, #13]
|
|
100011ec: bd70 pop {r4, r5, r6, pc}
|
|
100011ee: 4b03 ldr r3, [pc, #12] @ (100011fc <ph_insert_node+0x30>)
|
|
100011f0: 4a03 ldr r2, [pc, #12] @ (10001200 <ph_insert_node+0x34>)
|
|
100011f2: 4804 ldr r0, [pc, #16] @ (10001204 <ph_insert_node+0x38>)
|
|
100011f4: 21a5 movs r1, #165 @ 0xa5
|
|
100011f6: f001 f857 bl 100022a8 <__assert_func>
|
|
100011fa: 46c0 nop @ (mov r8, r8)
|
|
100011fc: 10005a1c .word 0x10005a1c
|
|
10001200: 10005be4 .word 0x10005be4
|
|
10001204: 10005998 .word 0x10005998
|
|
|
|
10001208 <ph_free_node>:
|
|
10001208: b570 push {r4, r5, r6, lr}
|
|
1000120a: 0004 movs r4, r0
|
|
1000120c: 1e0d subs r5, r1, #0
|
|
1000120e: d00f beq.n 10001230 <ph_free_node+0x28>
|
|
10001210: f7ff ff62 bl 100010d8 <ph_contains_node>
|
|
10001214: 2800 cmp r0, #0
|
|
10001216: d10b bne.n 10001230 <ph_free_node+0x28>
|
|
10001218: 7be1 ldrb r1, [r4, #15]
|
|
1000121a: 2900 cmp r1, #0
|
|
1000121c: d10e bne.n 1000123c <ph_free_node+0x34>
|
|
1000121e: 7ba3 ldrb r3, [r4, #14]
|
|
10001220: 2b00 cmp r3, #0
|
|
10001222: d103 bne.n 1000122c <ph_free_node+0x24>
|
|
10001224: 7be3 ldrb r3, [r4, #15]
|
|
10001226: 2b00 cmp r3, #0
|
|
10001228: d10d bne.n 10001246 <ph_free_node+0x3e>
|
|
1000122a: 73a5 strb r5, [r4, #14]
|
|
1000122c: 73e5 strb r5, [r4, #15]
|
|
1000122e: bd70 pop {r4, r5, r6, pc}
|
|
10001230: 4b08 ldr r3, [pc, #32] @ (10001254 <ph_free_node+0x4c>)
|
|
10001232: 4a09 ldr r2, [pc, #36] @ (10001258 <ph_free_node+0x50>)
|
|
10001234: 4809 ldr r0, [pc, #36] @ (1000125c <ph_free_node+0x54>)
|
|
10001236: 21f6 movs r1, #246 @ 0xf6
|
|
10001238: f001 f836 bl 100022a8 <__assert_func>
|
|
1000123c: 0020 movs r0, r4
|
|
1000123e: f7ff ff33 bl 100010a8 <ph_get_node>
|
|
10001242: 7045 strb r5, [r0, #1]
|
|
10001244: e7eb b.n 1000121e <ph_free_node+0x16>
|
|
10001246: 4b06 ldr r3, [pc, #24] @ (10001260 <ph_free_node+0x58>)
|
|
10001248: 4a03 ldr r2, [pc, #12] @ (10001258 <ph_free_node+0x50>)
|
|
1000124a: 4804 ldr r0, [pc, #16] @ (1000125c <ph_free_node+0x54>)
|
|
1000124c: 21fb movs r1, #251 @ 0xfb
|
|
1000124e: f001 f82b bl 100022a8 <__assert_func>
|
|
10001252: 46c0 nop @ (mov r8, r8)
|
|
10001254: 10005a20 .word 0x10005a20
|
|
10001258: 10005bc0 .word 0x10005bc0
|
|
1000125c: 10005998 .word 0x10005998
|
|
10001260: 10005a44 .word 0x10005a44
|
|
|
|
10001264 <get_entry_id_high>:
|
|
10001264: b510 push {r4, lr}
|
|
10001266: 2900 cmp r1, #0
|
|
10001268: d007 beq.n 1000127a <get_entry_id_high+0x16>
|
|
1000126a: 6803 ldr r3, [r0, #0]
|
|
1000126c: 7b1b ldrb r3, [r3, #12]
|
|
1000126e: 428b cmp r3, r1
|
|
10001270: d303 bcc.n 1000127a <get_entry_id_high+0x16>
|
|
10001272: 68c0 ldr r0, [r0, #12]
|
|
10001274: 3901 subs r1, #1
|
|
10001276: 1840 adds r0, r0, r1
|
|
10001278: bd10 pop {r4, pc}
|
|
1000127a: 4b03 ldr r3, [pc, #12] @ (10001288 <get_entry_id_high+0x24>)
|
|
1000127c: 4a03 ldr r2, [pc, #12] @ (1000128c <get_entry_id_high+0x28>)
|
|
1000127e: 4804 ldr r0, [pc, #16] @ (10001290 <get_entry_id_high+0x2c>)
|
|
10001280: 2141 movs r1, #65 @ 0x41
|
|
10001282: f001 f811 bl 100022a8 <__assert_func>
|
|
10001286: 46c0 nop @ (mov r8, r8)
|
|
10001288: 10005914 .word 0x10005914
|
|
1000128c: 10005bac .word 0x10005bac
|
|
10001290: 10005938 .word 0x10005938
|
|
|
|
10001294 <alarm_pool_post_alloc_init>:
|
|
10001294: b570 push {r4, r5, r6, lr}
|
|
10001296: 0005 movs r5, r0
|
|
10001298: 000c movs r4, r1
|
|
1000129a: 0008 movs r0, r1
|
|
1000129c: f000 fc92 bl 10001bc4 <hardware_alarm_cancel>
|
|
100012a0: 4909 ldr r1, [pc, #36] @ (100012c8 <alarm_pool_post_alloc_init+0x34>)
|
|
100012a2: 0020 movs r0, r4
|
|
100012a4: f000 fbd2 bl 10001a4c <hardware_alarm_set_callback>
|
|
100012a8: f7ff fc48 bl 10000b3c <next_striped_spin_lock_num>
|
|
100012ac: 4b07 ldr r3, [pc, #28] @ (100012cc <alarm_pool_post_alloc_init+0x38>)
|
|
100012ae: 469c mov ip, r3
|
|
100012b0: 4460 add r0, ip
|
|
100012b2: 0080 lsls r0, r0, #2
|
|
100012b4: 6068 str r0, [r5, #4]
|
|
100012b6: 752c strb r4, [r5, #20]
|
|
100012b8: 23d0 movs r3, #208 @ 0xd0
|
|
100012ba: 061b lsls r3, r3, #24
|
|
100012bc: 781b ldrb r3, [r3, #0]
|
|
100012be: 756b strb r3, [r5, #21]
|
|
100012c0: 4b03 ldr r3, [pc, #12] @ (100012d0 <alarm_pool_post_alloc_init+0x3c>)
|
|
100012c2: 00a4 lsls r4, r4, #2
|
|
100012c4: 50e5 str r5, [r4, r3]
|
|
100012c6: bd70 pop {r4, r5, r6, pc}
|
|
100012c8: 100013e1 .word 0x100013e1
|
|
100012cc: 34000040 .word 0x34000040
|
|
100012d0: 20000b38 .word 0x20000b38
|
|
|
|
100012d4 <sleep_until_callback>:
|
|
100012d4: 4b0a ldr r3, [pc, #40] @ (10001300 <sleep_until_callback+0x2c>)
|
|
100012d6: 681a ldr r2, [r3, #0]
|
|
100012d8: f3ef 8110 mrs r1, PRIMASK
|
|
100012dc: b672 cpsid i
|
|
100012de: 6813 ldr r3, [r2, #0]
|
|
100012e0: 2b00 cmp r3, #0
|
|
100012e2: d0fc beq.n 100012de <sleep_until_callback+0xa>
|
|
100012e4: f3bf 8f5f dmb sy
|
|
100012e8: 4b05 ldr r3, [pc, #20] @ (10001300 <sleep_until_callback+0x2c>)
|
|
100012ea: 681b ldr r3, [r3, #0]
|
|
100012ec: f3bf 8f5f dmb sy
|
|
100012f0: 2200 movs r2, #0
|
|
100012f2: 601a str r2, [r3, #0]
|
|
100012f4: f381 8810 msr PRIMASK, r1
|
|
100012f8: bf40 sev
|
|
100012fa: 2000 movs r0, #0
|
|
100012fc: 2100 movs r1, #0
|
|
100012fe: 4770 bx lr
|
|
10001300: 20000d4c .word 0x20000d4c
|
|
|
|
10001304 <get_absolute_time>:
|
|
10001304: b510 push {r4, lr}
|
|
10001306: b082 sub sp, #8
|
|
10001308: 0004 movs r4, r0
|
|
1000130a: f000 fb7f bl 10001a0c <time_us_64>
|
|
1000130e: 0002 movs r2, r0
|
|
10001310: 000b movs r3, r1
|
|
10001312: 4668 mov r0, sp
|
|
10001314: f7ff fe9c bl 10001050 <update_us_since_boot>
|
|
10001318: 9a00 ldr r2, [sp, #0]
|
|
1000131a: 9b01 ldr r3, [sp, #4]
|
|
1000131c: 6022 str r2, [r4, #0]
|
|
1000131e: 6063 str r3, [r4, #4]
|
|
10001320: 0020 movs r0, r4
|
|
10001322: b002 add sp, #8
|
|
10001324: bd10 pop {r4, pc}
|
|
|
|
10001326 <make_timeout_time_us>:
|
|
10001326: b570 push {r4, r5, r6, lr}
|
|
10001328: b084 sub sp, #16
|
|
1000132a: 0004 movs r4, r0
|
|
1000132c: 0016 movs r6, r2
|
|
1000132e: 001d movs r5, r3
|
|
10001330: a802 add r0, sp, #8
|
|
10001332: f7ff ffe7 bl 10001304 <get_absolute_time>
|
|
10001336: 9a02 ldr r2, [sp, #8]
|
|
10001338: 9b03 ldr r3, [sp, #12]
|
|
1000133a: 9600 str r6, [sp, #0]
|
|
1000133c: 9501 str r5, [sp, #4]
|
|
1000133e: 0020 movs r0, r4
|
|
10001340: f7ff fe98 bl 10001074 <delayed_by_us>
|
|
10001344: 0020 movs r0, r4
|
|
10001346: b004 add sp, #16
|
|
10001348: bd70 pop {r4, r5, r6, pc}
|
|
...
|
|
|
|
1000134c <add_alarm_under_lock>:
|
|
1000134c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000134e: b083 sub sp, #12
|
|
10001350: 0007 movs r7, r0
|
|
10001352: 9201 str r2, [sp, #4]
|
|
10001354: 001d movs r5, r3
|
|
10001356: ab0a add r3, sp, #40 @ 0x28
|
|
10001358: 781c ldrb r4, [r3, #0]
|
|
1000135a: ab0b add r3, sp, #44 @ 0x2c
|
|
1000135c: 781e ldrb r6, [r3, #0]
|
|
1000135e: 2c00 cmp r4, #0
|
|
10001360: d00b beq.n 1000137a <add_alarm_under_lock+0x2e>
|
|
10001362: 6800 ldr r0, [r0, #0]
|
|
10001364: 0021 movs r1, r4
|
|
10001366: f7ff feb7 bl 100010d8 <ph_contains_node>
|
|
1000136a: 2800 cmp r0, #0
|
|
1000136c: d009 beq.n 10001382 <add_alarm_under_lock+0x36>
|
|
1000136e: 4b19 ldr r3, [pc, #100] @ (100013d4 <add_alarm_under_lock+0x88>)
|
|
10001370: 4a19 ldr r2, [pc, #100] @ (100013d8 <add_alarm_under_lock+0x8c>)
|
|
10001372: 481a ldr r0, [pc, #104] @ (100013dc <add_alarm_under_lock+0x90>)
|
|
10001374: 2167 movs r1, #103 @ 0x67
|
|
10001376: f000 ff97 bl 100022a8 <__assert_func>
|
|
1000137a: 6800 ldr r0, [r0, #0]
|
|
1000137c: f7ff febb bl 100010f6 <ph_new_node>
|
|
10001380: 0004 movs r4, r0
|
|
10001382: 2c00 cmp r4, #0
|
|
10001384: d102 bne.n 1000138c <add_alarm_under_lock+0x40>
|
|
10001386: 0020 movs r0, r4
|
|
10001388: b003 add sp, #12
|
|
1000138a: bdf0 pop {r4, r5, r6, r7, pc}
|
|
1000138c: 0021 movs r1, r4
|
|
1000138e: 0038 movs r0, r7
|
|
10001390: f7ff fe2a bl 10000fe8 <get_entry>
|
|
10001394: 9b01 ldr r3, [sp, #4]
|
|
10001396: 6003 str r3, [r0, #0]
|
|
10001398: 6045 str r5, [r0, #4]
|
|
1000139a: 9b08 ldr r3, [sp, #32]
|
|
1000139c: 6083 str r3, [r0, #8]
|
|
1000139e: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
100013a0: 60c3 str r3, [r0, #12]
|
|
100013a2: 6838 ldr r0, [r7, #0]
|
|
100013a4: 0021 movs r1, r4
|
|
100013a6: f7ff ff11 bl 100011cc <ph_insert_node>
|
|
100013aa: 42a0 cmp r0, r4
|
|
100013ac: d1eb bne.n 10001386 <add_alarm_under_lock+0x3a>
|
|
100013ae: 7d38 ldrb r0, [r7, #20]
|
|
100013b0: 9a01 ldr r2, [sp, #4]
|
|
100013b2: 002b movs r3, r5
|
|
100013b4: f000 fb92 bl 10001adc <hardware_alarm_set_target>
|
|
100013b8: 1e05 subs r5, r0, #0
|
|
100013ba: d001 beq.n 100013c0 <add_alarm_under_lock+0x74>
|
|
100013bc: 2e00 cmp r6, #0
|
|
100013be: d004 beq.n 100013ca <add_alarm_under_lock+0x7e>
|
|
100013c0: 9b0c ldr r3, [sp, #48] @ 0x30
|
|
100013c2: 2b00 cmp r3, #0
|
|
100013c4: d0df beq.n 10001386 <add_alarm_under_lock+0x3a>
|
|
100013c6: 701d strb r5, [r3, #0]
|
|
100013c8: e7dd b.n 10001386 <add_alarm_under_lock+0x3a>
|
|
100013ca: 6838 ldr r0, [r7, #0]
|
|
100013cc: 0021 movs r1, r4
|
|
100013ce: f000 fd3f bl 10001e50 <ph_remove_and_free_node>
|
|
100013d2: e7f5 b.n 100013c0 <add_alarm_under_lock+0x74>
|
|
100013d4: 10005a58 .word 0x10005a58
|
|
100013d8: 10005c00 .word 0x10005c00
|
|
100013dc: 10005938 .word 0x10005938
|
|
|
|
100013e0 <alarm_pool_alarm_callback>:
|
|
100013e0: b5f0 push {r4, r5, r6, r7, lr}
|
|
100013e2: 46de mov lr, fp
|
|
100013e4: 4657 mov r7, sl
|
|
100013e6: 464e mov r6, r9
|
|
100013e8: 4645 mov r5, r8
|
|
100013ea: b5e0 push {r5, r6, r7, lr}
|
|
100013ec: b08f sub sp, #60 @ 0x3c
|
|
100013ee: 900b str r0, [sp, #44] @ 0x2c
|
|
100013f0: 2100 movs r1, #0
|
|
100013f2: 4b78 ldr r3, [pc, #480] @ (100015d4 <alarm_pool_alarm_callback+0x1f4>)
|
|
100013f4: 0082 lsls r2, r0, #2
|
|
100013f6: 58d4 ldr r4, [r2, r3]
|
|
100013f8: 4689 mov r9, r1
|
|
100013fa: e082 b.n 10001502 <alarm_pool_alarm_callback+0x122>
|
|
100013fc: 0029 movs r1, r5
|
|
100013fe: 0020 movs r0, r4
|
|
10001400: f7ff fdf2 bl 10000fe8 <get_entry>
|
|
10001404: 4680 mov r8, r0
|
|
10001406: 6802 ldr r2, [r0, #0]
|
|
10001408: 6843 ldr r3, [r0, #4]
|
|
1000140a: 1b92 subs r2, r2, r6
|
|
1000140c: 41bb sbcs r3, r7
|
|
1000140e: 2b00 cmp r3, #0
|
|
10001410: dd09 ble.n 10001426 <alarm_pool_alarm_callback+0x46>
|
|
10001412: 4643 mov r3, r8
|
|
10001414: 681a ldr r2, [r3, #0]
|
|
10001416: 685b ldr r3, [r3, #4]
|
|
10001418: 980b ldr r0, [sp, #44] @ 0x2c
|
|
1000141a: f000 fb5f bl 10001adc <hardware_alarm_set_target>
|
|
1000141e: 2300 movs r3, #0
|
|
10001420: 4698 mov r8, r3
|
|
10001422: 2600 movs r6, #0
|
|
10001424: e089 b.n 1000153a <alarm_pool_alarm_callback+0x15a>
|
|
10001426: 2b00 cmp r3, #0
|
|
10001428: d101 bne.n 1000142e <alarm_pool_alarm_callback+0x4e>
|
|
1000142a: 2a00 cmp r2, #0
|
|
1000142c: d1f1 bne.n 10001412 <alarm_pool_alarm_callback+0x32>
|
|
1000142e: 2100 movs r1, #0
|
|
10001430: 4658 mov r0, fp
|
|
10001432: f000 fd03 bl 10001e3c <ph_remove_head>
|
|
10001436: 0007 movs r7, r0
|
|
10001438: 42a8 cmp r0, r5
|
|
1000143a: d115 bne.n 10001468 <alarm_pool_alarm_callback+0x88>
|
|
1000143c: 4643 mov r3, r8
|
|
1000143e: 681a ldr r2, [r3, #0]
|
|
10001440: 685b ldr r3, [r3, #4]
|
|
10001442: 9208 str r2, [sp, #32]
|
|
10001444: 9309 str r3, [sp, #36] @ 0x24
|
|
10001446: 4643 mov r3, r8
|
|
10001448: 689e ldr r6, [r3, #8]
|
|
1000144a: 68db ldr r3, [r3, #12]
|
|
1000144c: 4698 mov r8, r3
|
|
1000144e: 2e00 cmp r6, #0
|
|
10001450: d010 beq.n 10001474 <alarm_pool_alarm_callback+0x94>
|
|
10001452: 0029 movs r1, r5
|
|
10001454: 0020 movs r0, r4
|
|
10001456: f7ff ff05 bl 10001264 <get_entry_id_high>
|
|
1000145a: 7803 ldrb r3, [r0, #0]
|
|
1000145c: 4699 mov r9, r3
|
|
1000145e: 021b lsls r3, r3, #8
|
|
10001460: 431f orrs r7, r3
|
|
10001462: 6127 str r7, [r4, #16]
|
|
10001464: 2000 movs r0, #0
|
|
10001466: e068 b.n 1000153a <alarm_pool_alarm_callback+0x15a>
|
|
10001468: 4b5b ldr r3, [pc, #364] @ (100015d8 <alarm_pool_alarm_callback+0x1f8>)
|
|
1000146a: 4a5c ldr r2, [pc, #368] @ (100015dc <alarm_pool_alarm_callback+0x1fc>)
|
|
1000146c: 485c ldr r0, [pc, #368] @ (100015e0 <alarm_pool_alarm_callback+0x200>)
|
|
1000146e: 218e movs r1, #142 @ 0x8e
|
|
10001470: f000 ff1a bl 100022a8 <__assert_func>
|
|
10001474: 4b5b ldr r3, [pc, #364] @ (100015e4 <alarm_pool_alarm_callback+0x204>)
|
|
10001476: 4a59 ldr r2, [pc, #356] @ (100015dc <alarm_pool_alarm_callback+0x1fc>)
|
|
10001478: 4859 ldr r0, [pc, #356] @ (100015e0 <alarm_pool_alarm_callback+0x200>)
|
|
1000147a: 2192 movs r1, #146 @ 0x92
|
|
1000147c: f000 ff14 bl 100022a8 <__assert_func>
|
|
10001480: 6923 ldr r3, [r4, #16]
|
|
10001482: 2b00 cmp r3, #0
|
|
10001484: d077 beq.n 10001576 <alarm_pool_alarm_callback+0x196>
|
|
10001486: 42bb cmp r3, r7
|
|
10001488: d119 bne.n 100014be <alarm_pool_alarm_callback+0xde>
|
|
1000148a: 9806 ldr r0, [sp, #24]
|
|
1000148c: 9907 ldr r1, [sp, #28]
|
|
1000148e: 2300 movs r3, #0
|
|
10001490: 4242 negs r2, r0
|
|
10001492: 418b sbcs r3, r1
|
|
10001494: 9200 str r2, [sp, #0]
|
|
10001496: 9301 str r3, [sp, #4]
|
|
10001498: 9a08 ldr r2, [sp, #32]
|
|
1000149a: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
1000149c: a80c add r0, sp, #48 @ 0x30
|
|
1000149e: f7ff fde9 bl 10001074 <delayed_by_us>
|
|
100014a2: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
100014a4: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
100014a6: 2100 movs r1, #0
|
|
100014a8: 9104 str r1, [sp, #16]
|
|
100014aa: 3101 adds r1, #1
|
|
100014ac: 9103 str r1, [sp, #12]
|
|
100014ae: 9502 str r5, [sp, #8]
|
|
100014b0: 4641 mov r1, r8
|
|
100014b2: 9101 str r1, [sp, #4]
|
|
100014b4: 9600 str r6, [sp, #0]
|
|
100014b6: 0020 movs r0, r4
|
|
100014b8: f7ff ff48 bl 1000134c <add_alarm_under_lock>
|
|
100014bc: e016 b.n 100014ec <alarm_pool_alarm_callback+0x10c>
|
|
100014be: 4b4a ldr r3, [pc, #296] @ (100015e8 <alarm_pool_alarm_callback+0x208>)
|
|
100014c0: 4a46 ldr r2, [pc, #280] @ (100015dc <alarm_pool_alarm_callback+0x1fc>)
|
|
100014c2: 4847 ldr r0, [pc, #284] @ (100015e0 <alarm_pool_alarm_callback+0x200>)
|
|
100014c4: 21a1 movs r1, #161 @ 0xa1
|
|
100014c6: f000 feef bl 100022a8 <__assert_func>
|
|
100014ca: 9a06 ldr r2, [sp, #24]
|
|
100014cc: 9b07 ldr r3, [sp, #28]
|
|
100014ce: 2b00 cmp r3, #0
|
|
100014d0: d101 bne.n 100014d6 <alarm_pool_alarm_callback+0xf6>
|
|
100014d2: 2a00 cmp r2, #0
|
|
100014d4: d152 bne.n 1000157c <alarm_pool_alarm_callback+0x19c>
|
|
100014d6: 6820 ldr r0, [r4, #0]
|
|
100014d8: 0029 movs r1, r5
|
|
100014da: f7ff fe95 bl 10001208 <ph_free_node>
|
|
100014de: 0029 movs r1, r5
|
|
100014e0: 0020 movs r0, r4
|
|
100014e2: f7ff febf bl 10001264 <get_entry_id_high>
|
|
100014e6: 7803 ldrb r3, [r0, #0]
|
|
100014e8: 3301 adds r3, #1
|
|
100014ea: 7003 strb r3, [r0, #0]
|
|
100014ec: 2300 movs r3, #0
|
|
100014ee: 6123 str r3, [r4, #16]
|
|
100014f0: 6862 ldr r2, [r4, #4]
|
|
100014f2: f3bf 8f5f dmb sy
|
|
100014f6: 6013 str r3, [r2, #0]
|
|
100014f8: f38a 8810 msr PRIMASK, sl
|
|
100014fc: 2001 movs r0, #1
|
|
100014fe: 2800 cmp r0, #0
|
|
10001500: d061 beq.n 100015c6 <alarm_pool_alarm_callback+0x1e6>
|
|
10001502: a80c add r0, sp, #48 @ 0x30
|
|
10001504: f7ff fefe bl 10001304 <get_absolute_time>
|
|
10001508: 9e0c ldr r6, [sp, #48] @ 0x30
|
|
1000150a: 9f0d ldr r7, [sp, #52] @ 0x34
|
|
1000150c: 2200 movs r2, #0
|
|
1000150e: 2300 movs r3, #0
|
|
10001510: 9208 str r2, [sp, #32]
|
|
10001512: 9309 str r3, [sp, #36] @ 0x24
|
|
10001514: 6862 ldr r2, [r4, #4]
|
|
10001516: f3ef 8a10 mrs sl, PRIMASK
|
|
1000151a: b672 cpsid i
|
|
1000151c: 6813 ldr r3, [r2, #0]
|
|
1000151e: 2b00 cmp r3, #0
|
|
10001520: d0fc beq.n 1000151c <alarm_pool_alarm_callback+0x13c>
|
|
10001522: f3bf 8f5f dmb sy
|
|
10001526: 6823 ldr r3, [r4, #0]
|
|
10001528: 469b mov fp, r3
|
|
1000152a: 7b5d ldrb r5, [r3, #13]
|
|
1000152c: 2d00 cmp r5, #0
|
|
1000152e: d000 beq.n 10001532 <alarm_pool_alarm_callback+0x152>
|
|
10001530: e764 b.n 100013fc <alarm_pool_alarm_callback+0x1c>
|
|
10001532: 2300 movs r3, #0
|
|
10001534: 4698 mov r8, r3
|
|
10001536: 2600 movs r6, #0
|
|
10001538: 2000 movs r0, #0
|
|
1000153a: 6863 ldr r3, [r4, #4]
|
|
1000153c: f3bf 8f5f dmb sy
|
|
10001540: 2200 movs r2, #0
|
|
10001542: 601a str r2, [r3, #0]
|
|
10001544: f38a 8810 msr PRIMASK, sl
|
|
10001548: 2e00 cmp r6, #0
|
|
1000154a: d0d8 beq.n 100014fe <alarm_pool_alarm_callback+0x11e>
|
|
1000154c: 464b mov r3, r9
|
|
1000154e: 021f lsls r7, r3, #8
|
|
10001550: 432f orrs r7, r5
|
|
10001552: 4641 mov r1, r8
|
|
10001554: 0038 movs r0, r7
|
|
10001556: 47b0 blx r6
|
|
10001558: 9006 str r0, [sp, #24]
|
|
1000155a: 9107 str r1, [sp, #28]
|
|
1000155c: 6862 ldr r2, [r4, #4]
|
|
1000155e: f3ef 8a10 mrs sl, PRIMASK
|
|
10001562: b672 cpsid i
|
|
10001564: 6813 ldr r3, [r2, #0]
|
|
10001566: 2b00 cmp r3, #0
|
|
10001568: d0fc beq.n 10001564 <alarm_pool_alarm_callback+0x184>
|
|
1000156a: f3bf 8f5f dmb sy
|
|
1000156e: 9b07 ldr r3, [sp, #28]
|
|
10001570: 2b00 cmp r3, #0
|
|
10001572: da00 bge.n 10001576 <alarm_pool_alarm_callback+0x196>
|
|
10001574: e784 b.n 10001480 <alarm_pool_alarm_callback+0xa0>
|
|
10001576: 9b07 ldr r3, [sp, #28]
|
|
10001578: 2b00 cmp r3, #0
|
|
1000157a: dda6 ble.n 100014ca <alarm_pool_alarm_callback+0xea>
|
|
1000157c: 6923 ldr r3, [r4, #16]
|
|
1000157e: 2b00 cmp r3, #0
|
|
10001580: d0a9 beq.n 100014d6 <alarm_pool_alarm_callback+0xf6>
|
|
10001582: 42bb cmp r3, r7
|
|
10001584: d119 bne.n 100015ba <alarm_pool_alarm_callback+0x1da>
|
|
10001586: a80c add r0, sp, #48 @ 0x30
|
|
10001588: f7ff febc bl 10001304 <get_absolute_time>
|
|
1000158c: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
1000158e: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10001590: 9806 ldr r0, [sp, #24]
|
|
10001592: 9907 ldr r1, [sp, #28]
|
|
10001594: 9000 str r0, [sp, #0]
|
|
10001596: 9101 str r1, [sp, #4]
|
|
10001598: a80c add r0, sp, #48 @ 0x30
|
|
1000159a: f7ff fd6b bl 10001074 <delayed_by_us>
|
|
1000159e: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
100015a0: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
100015a2: 2100 movs r1, #0
|
|
100015a4: 9104 str r1, [sp, #16]
|
|
100015a6: 3101 adds r1, #1
|
|
100015a8: 9103 str r1, [sp, #12]
|
|
100015aa: 9502 str r5, [sp, #8]
|
|
100015ac: 4641 mov r1, r8
|
|
100015ae: 9101 str r1, [sp, #4]
|
|
100015b0: 9600 str r6, [sp, #0]
|
|
100015b2: 0020 movs r0, r4
|
|
100015b4: f7ff feca bl 1000134c <add_alarm_under_lock>
|
|
100015b8: e798 b.n 100014ec <alarm_pool_alarm_callback+0x10c>
|
|
100015ba: 4b0b ldr r3, [pc, #44] @ (100015e8 <alarm_pool_alarm_callback+0x208>)
|
|
100015bc: 4a07 ldr r2, [pc, #28] @ (100015dc <alarm_pool_alarm_callback+0x1fc>)
|
|
100015be: 4808 ldr r0, [pc, #32] @ (100015e0 <alarm_pool_alarm_callback+0x200>)
|
|
100015c0: 21a4 movs r1, #164 @ 0xa4
|
|
100015c2: f000 fe71 bl 100022a8 <__assert_func>
|
|
100015c6: b00f add sp, #60 @ 0x3c
|
|
100015c8: bcf0 pop {r4, r5, r6, r7}
|
|
100015ca: 46bb mov fp, r7
|
|
100015cc: 46b2 mov sl, r6
|
|
100015ce: 46a9 mov r9, r5
|
|
100015d0: 46a0 mov r8, r4
|
|
100015d2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100015d4: 20000b38 .word 0x20000b38
|
|
100015d8: 10005a80 .word 0x10005a80
|
|
100015dc: 10005c30 .word 0x10005c30
|
|
100015e0: 10005938 .word 0x10005938
|
|
100015e4: 10005a98 .word 0x10005a98
|
|
100015e8: 10005aa4 .word 0x10005aa4
|
|
|
|
100015ec <alarm_pool_init_default>:
|
|
100015ec: b510 push {r4, lr}
|
|
100015ee: 4b0c ldr r3, [pc, #48] @ (10001620 <alarm_pool_init_default+0x34>)
|
|
100015f0: 685b ldr r3, [r3, #4]
|
|
100015f2: 2b00 cmp r3, #0
|
|
100015f4: d004 beq.n 10001600 <alarm_pool_init_default+0x14>
|
|
100015f6: 480b ldr r0, [pc, #44] @ (10001624 <alarm_pool_init_default+0x38>)
|
|
100015f8: 210a movs r1, #10
|
|
100015fa: f7ff fcbd bl 10000f78 <lock_init>
|
|
100015fe: bd10 pop {r4, pc}
|
|
10001600: 4c07 ldr r4, [pc, #28] @ (10001620 <alarm_pool_init_default+0x34>)
|
|
10001602: 4a09 ldr r2, [pc, #36] @ (10001628 <alarm_pool_init_default+0x3c>)
|
|
10001604: 6820 ldr r0, [r4, #0]
|
|
10001606: 0023 movs r3, r4
|
|
10001608: 2110 movs r1, #16
|
|
1000160a: f000 fb82 bl 10001d12 <ph_post_alloc_init>
|
|
1000160e: 2003 movs r0, #3
|
|
10001610: f000 f9f0 bl 100019f4 <hardware_alarm_claim>
|
|
10001614: 2103 movs r1, #3
|
|
10001616: 0020 movs r0, r4
|
|
10001618: f7ff fe3c bl 10001294 <alarm_pool_post_alloc_init>
|
|
1000161c: e7eb b.n 100015f6 <alarm_pool_init_default+0xa>
|
|
1000161e: 46c0 nop @ (mov r8, r8)
|
|
10001620: 20000284 .word 0x20000284
|
|
10001624: 20000d4c .word 0x20000d4c
|
|
10001628: 10001021 .word 0x10001021
|
|
|
|
1000162c <alarm_pool_get_default>:
|
|
1000162c: b510 push {r4, lr}
|
|
1000162e: 4b06 ldr r3, [pc, #24] @ (10001648 <alarm_pool_get_default+0x1c>)
|
|
10001630: 685b ldr r3, [r3, #4]
|
|
10001632: 2b00 cmp r3, #0
|
|
10001634: d001 beq.n 1000163a <alarm_pool_get_default+0xe>
|
|
10001636: 4804 ldr r0, [pc, #16] @ (10001648 <alarm_pool_get_default+0x1c>)
|
|
10001638: bd10 pop {r4, pc}
|
|
1000163a: 4b04 ldr r3, [pc, #16] @ (1000164c <alarm_pool_get_default+0x20>)
|
|
1000163c: 4a04 ldr r2, [pc, #16] @ (10001650 <alarm_pool_get_default+0x24>)
|
|
1000163e: 4805 ldr r0, [pc, #20] @ (10001654 <alarm_pool_get_default+0x28>)
|
|
10001640: 215e movs r1, #94 @ 0x5e
|
|
10001642: f000 fe31 bl 100022a8 <__assert_func>
|
|
10001646: 46c0 nop @ (mov r8, r8)
|
|
10001648: 20000284 .word 0x20000284
|
|
1000164c: 10005ae0 .word 0x10005ae0
|
|
10001650: 10005b94 .word 0x10005b94
|
|
10001654: 10005938 .word 0x10005938
|
|
|
|
10001658 <alarm_pool_add_alarm_at>:
|
|
10001658: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000165a: 46de mov lr, fp
|
|
1000165c: 4657 mov r7, sl
|
|
1000165e: 464e mov r6, r9
|
|
10001660: 4645 mov r5, r8
|
|
10001662: b5e0 push {r5, r6, r7, lr}
|
|
10001664: b08d sub sp, #52 @ 0x34
|
|
10001666: 0006 movs r6, r0
|
|
10001668: 4690 mov r8, r2
|
|
1000166a: 001f movs r7, r3
|
|
1000166c: 9b16 ldr r3, [sp, #88] @ 0x58
|
|
1000166e: 469a mov sl, r3
|
|
10001670: 9b17 ldr r3, [sp, #92] @ 0x5c
|
|
10001672: 4699 mov r9, r3
|
|
10001674: ab18 add r3, sp, #96 @ 0x60
|
|
10001676: 781b ldrb r3, [r3, #0]
|
|
10001678: 9307 str r3, [sp, #28]
|
|
1000167a: 2327 movs r3, #39 @ 0x27
|
|
1000167c: aa02 add r2, sp, #8
|
|
1000167e: 4694 mov ip, r2
|
|
10001680: 4463 add r3, ip
|
|
10001682: 2200 movs r2, #0
|
|
10001684: 701a strb r2, [r3, #0]
|
|
10001686: e021 b.n 100016cc <alarm_pool_add_alarm_at+0x74>
|
|
10001688: 0001 movs r1, r0
|
|
1000168a: 0030 movs r0, r6
|
|
1000168c: f7ff fdea bl 10001264 <get_entry_id_high>
|
|
10001690: 7800 ldrb r0, [r0, #0]
|
|
10001692: e03c b.n 1000170e <alarm_pool_add_alarm_at+0xb6>
|
|
10001694: 9806 ldr r0, [sp, #24]
|
|
10001696: 2b00 cmp r3, #0
|
|
10001698: d05c beq.n 10001754 <alarm_pool_add_alarm_at+0xfc>
|
|
1000169a: 9b07 ldr r3, [sp, #28]
|
|
1000169c: 2b00 cmp r3, #0
|
|
1000169e: d059 beq.n 10001754 <alarm_pool_add_alarm_at+0xfc>
|
|
100016a0: 4649 mov r1, r9
|
|
100016a2: 47d0 blx sl
|
|
100016a4: 0004 movs r4, r0
|
|
100016a6: 000d movs r5, r1
|
|
100016a8: 0003 movs r3, r0
|
|
100016aa: 430b orrs r3, r1
|
|
100016ac: d059 beq.n 10001762 <alarm_pool_add_alarm_at+0x10a>
|
|
100016ae: 2900 cmp r1, #0
|
|
100016b0: db40 blt.n 10001734 <alarm_pool_add_alarm_at+0xdc>
|
|
100016b2: a808 add r0, sp, #32
|
|
100016b4: f7ff fe26 bl 10001304 <get_absolute_time>
|
|
100016b8: 9a08 ldr r2, [sp, #32]
|
|
100016ba: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
100016bc: 9400 str r4, [sp, #0]
|
|
100016be: 9501 str r5, [sp, #4]
|
|
100016c0: a808 add r0, sp, #32
|
|
100016c2: f7ff fcd7 bl 10001074 <delayed_by_us>
|
|
100016c6: 9b08 ldr r3, [sp, #32]
|
|
100016c8: 4698 mov r8, r3
|
|
100016ca: 9f09 ldr r7, [sp, #36] @ 0x24
|
|
100016cc: 6872 ldr r2, [r6, #4]
|
|
100016ce: f3ef 8b10 mrs fp, PRIMASK
|
|
100016d2: b672 cpsid i
|
|
100016d4: 6813 ldr r3, [r2, #0]
|
|
100016d6: 4259 negs r1, r3
|
|
100016d8: 414b adcs r3, r1
|
|
100016da: b2d9 uxtb r1, r3
|
|
100016dc: 9106 str r1, [sp, #24]
|
|
100016de: 2b00 cmp r3, #0
|
|
100016e0: d1f8 bne.n 100016d4 <alarm_pool_add_alarm_at+0x7c>
|
|
100016e2: f3bf 8f5f dmb sy
|
|
100016e6: 3327 adds r3, #39 @ 0x27
|
|
100016e8: aa02 add r2, sp, #8
|
|
100016ea: 4694 mov ip, r2
|
|
100016ec: 4463 add r3, ip
|
|
100016ee: 9304 str r3, [sp, #16]
|
|
100016f0: 2300 movs r3, #0
|
|
100016f2: 9303 str r3, [sp, #12]
|
|
100016f4: 9302 str r3, [sp, #8]
|
|
100016f6: 464b mov r3, r9
|
|
100016f8: 9301 str r3, [sp, #4]
|
|
100016fa: 4653 mov r3, sl
|
|
100016fc: 9300 str r3, [sp, #0]
|
|
100016fe: 4642 mov r2, r8
|
|
10001700: 003b movs r3, r7
|
|
10001702: 0030 movs r0, r6
|
|
10001704: f7ff fe22 bl 1000134c <add_alarm_under_lock>
|
|
10001708: 0004 movs r4, r0
|
|
1000170a: 1e05 subs r5, r0, #0
|
|
1000170c: d1bc bne.n 10001688 <alarm_pool_add_alarm_at+0x30>
|
|
1000170e: 6873 ldr r3, [r6, #4]
|
|
10001710: f3bf 8f5f dmb sy
|
|
10001714: 2100 movs r1, #0
|
|
10001716: 6019 str r1, [r3, #0]
|
|
10001718: f38b 8810 msr PRIMASK, fp
|
|
1000171c: 2d00 cmp r5, #0
|
|
1000171e: d017 beq.n 10001750 <alarm_pool_add_alarm_at+0xf8>
|
|
10001720: 2327 movs r3, #39 @ 0x27
|
|
10001722: aa02 add r2, sp, #8
|
|
10001724: 4694 mov ip, r2
|
|
10001726: 4463 add r3, ip
|
|
10001728: 781b ldrb r3, [r3, #0]
|
|
1000172a: 2b00 cmp r3, #0
|
|
1000172c: d1b2 bne.n 10001694 <alarm_pool_add_alarm_at+0x3c>
|
|
1000172e: 0200 lsls r0, r0, #8
|
|
10001730: 4320 orrs r0, r4
|
|
10001732: e7b0 b.n 10001696 <alarm_pool_add_alarm_at+0x3e>
|
|
10001734: 2300 movs r3, #0
|
|
10001736: 4262 negs r2, r4
|
|
10001738: 41ab sbcs r3, r5
|
|
1000173a: 9200 str r2, [sp, #0]
|
|
1000173c: 9301 str r3, [sp, #4]
|
|
1000173e: 4642 mov r2, r8
|
|
10001740: 003b movs r3, r7
|
|
10001742: a808 add r0, sp, #32
|
|
10001744: f7ff fc96 bl 10001074 <delayed_by_us>
|
|
10001748: 9b08 ldr r3, [sp, #32]
|
|
1000174a: 4698 mov r8, r3
|
|
1000174c: 9f09 ldr r7, [sp, #36] @ 0x24
|
|
1000174e: e7bd b.n 100016cc <alarm_pool_add_alarm_at+0x74>
|
|
10001750: 2001 movs r0, #1
|
|
10001752: 4240 negs r0, r0
|
|
10001754: b00d add sp, #52 @ 0x34
|
|
10001756: bcf0 pop {r4, r5, r6, r7}
|
|
10001758: 46bb mov fp, r7
|
|
1000175a: 46b2 mov sl, r6
|
|
1000175c: 46a9 mov r9, r5
|
|
1000175e: 46a0 mov r8, r4
|
|
10001760: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001762: 9806 ldr r0, [sp, #24]
|
|
10001764: e7f6 b.n 10001754 <alarm_pool_add_alarm_at+0xfc>
|
|
|
|
10001766 <add_alarm_at>:
|
|
10001766: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001768: 46c6 mov lr, r8
|
|
1000176a: b500 push {lr}
|
|
1000176c: b084 sub sp, #16
|
|
1000176e: 0005 movs r5, r0
|
|
10001770: 4688 mov r8, r1
|
|
10001772: 0016 movs r6, r2
|
|
10001774: 001f movs r7, r3
|
|
10001776: ab0a add r3, sp, #40 @ 0x28
|
|
10001778: 781c ldrb r4, [r3, #0]
|
|
1000177a: f7ff ff57 bl 1000162c <alarm_pool_get_default>
|
|
1000177e: 9402 str r4, [sp, #8]
|
|
10001780: 9701 str r7, [sp, #4]
|
|
10001782: 9600 str r6, [sp, #0]
|
|
10001784: 002a movs r2, r5
|
|
10001786: 4643 mov r3, r8
|
|
10001788: f7ff ff66 bl 10001658 <alarm_pool_add_alarm_at>
|
|
1000178c: b004 add sp, #16
|
|
1000178e: bc80 pop {r7}
|
|
10001790: 46b8 mov r8, r7
|
|
10001792: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10001794 <alarm_pool_cancel_alarm>:
|
|
10001794: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001796: 46c6 mov lr, r8
|
|
10001798: b500 push {lr}
|
|
1000179a: 0004 movs r4, r0
|
|
1000179c: 000d movs r5, r1
|
|
1000179e: 6842 ldr r2, [r0, #4]
|
|
100017a0: f3ef 8710 mrs r7, PRIMASK
|
|
100017a4: b672 cpsid i
|
|
100017a6: 6813 ldr r3, [r2, #0]
|
|
100017a8: 2b00 cmp r3, #0
|
|
100017aa: d0fc beq.n 100017a6 <alarm_pool_cancel_alarm+0x12>
|
|
100017ac: f3bf 8f5f dmb sy
|
|
100017b0: b2ee uxtb r6, r5
|
|
100017b2: 6823 ldr r3, [r4, #0]
|
|
100017b4: 4698 mov r8, r3
|
|
100017b6: 0031 movs r1, r6
|
|
100017b8: 0018 movs r0, r3
|
|
100017ba: f7ff fc8d bl 100010d8 <ph_contains_node>
|
|
100017be: 2800 cmp r0, #0
|
|
100017c0: d02a beq.n 10001818 <alarm_pool_cancel_alarm+0x84>
|
|
100017c2: 6923 ldr r3, [r4, #16]
|
|
100017c4: 42ab cmp r3, r5
|
|
100017c6: d013 beq.n 100017f0 <alarm_pool_cancel_alarm+0x5c>
|
|
100017c8: 0a2d lsrs r5, r5, #8
|
|
100017ca: b2ed uxtb r5, r5
|
|
100017cc: 0031 movs r1, r6
|
|
100017ce: 0020 movs r0, r4
|
|
100017d0: f7ff fd48 bl 10001264 <get_entry_id_high>
|
|
100017d4: 7803 ldrb r3, [r0, #0]
|
|
100017d6: 42ab cmp r3, r5
|
|
100017d8: d011 beq.n 100017fe <alarm_pool_cancel_alarm+0x6a>
|
|
100017da: 2000 movs r0, #0
|
|
100017dc: 6863 ldr r3, [r4, #4]
|
|
100017de: f3bf 8f5f dmb sy
|
|
100017e2: 2200 movs r2, #0
|
|
100017e4: 601a str r2, [r3, #0]
|
|
100017e6: f387 8810 msr PRIMASK, r7
|
|
100017ea: bc80 pop {r7}
|
|
100017ec: 46b8 mov r8, r7
|
|
100017ee: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100017f0: 4b0c ldr r3, [pc, #48] @ (10001824 <alarm_pool_cancel_alarm+0x90>)
|
|
100017f2: 4a0d ldr r2, [pc, #52] @ (10001828 <alarm_pool_cancel_alarm+0x94>)
|
|
100017f4: 2195 movs r1, #149 @ 0x95
|
|
100017f6: 480d ldr r0, [pc, #52] @ (1000182c <alarm_pool_cancel_alarm+0x98>)
|
|
100017f8: 0049 lsls r1, r1, #1
|
|
100017fa: f000 fd55 bl 100022a8 <__assert_func>
|
|
100017fe: 0031 movs r1, r6
|
|
10001800: 4640 mov r0, r8
|
|
10001802: f000 fb25 bl 10001e50 <ph_remove_and_free_node>
|
|
10001806: 2800 cmp r0, #0
|
|
10001808: d1e8 bne.n 100017dc <alarm_pool_cancel_alarm+0x48>
|
|
1000180a: 4b09 ldr r3, [pc, #36] @ (10001830 <alarm_pool_cancel_alarm+0x9c>)
|
|
1000180c: 4a06 ldr r2, [pc, #24] @ (10001828 <alarm_pool_cancel_alarm+0x94>)
|
|
1000180e: 2132 movs r1, #50 @ 0x32
|
|
10001810: 4806 ldr r0, [pc, #24] @ (1000182c <alarm_pool_cancel_alarm+0x98>)
|
|
10001812: 31ff adds r1, #255 @ 0xff
|
|
10001814: f000 fd48 bl 100022a8 <__assert_func>
|
|
10001818: 6923 ldr r3, [r4, #16]
|
|
1000181a: 42ab cmp r3, r5
|
|
1000181c: d1de bne.n 100017dc <alarm_pool_cancel_alarm+0x48>
|
|
1000181e: 2300 movs r3, #0
|
|
10001820: 6123 str r3, [r4, #16]
|
|
10001822: e7db b.n 100017dc <alarm_pool_cancel_alarm+0x48>
|
|
10001824: 10005b04 .word 0x10005b04
|
|
10001828: 10005b7c .word 0x10005b7c
|
|
1000182c: 10005938 .word 0x10005938
|
|
10001830: 10005b28 .word 0x10005b28
|
|
|
|
10001834 <cancel_alarm>:
|
|
10001834: b510 push {r4, lr}
|
|
10001836: 0004 movs r4, r0
|
|
10001838: f7ff fef8 bl 1000162c <alarm_pool_get_default>
|
|
1000183c: 0021 movs r1, r4
|
|
1000183e: f7ff ffa9 bl 10001794 <alarm_pool_cancel_alarm>
|
|
10001842: bd10 pop {r4, pc}
|
|
|
|
10001844 <sleep_until>:
|
|
10001844: b530 push {r4, r5, lr}
|
|
10001846: b087 sub sp, #28
|
|
10001848: 0004 movs r4, r0
|
|
1000184a: 000d movs r5, r1
|
|
1000184c: f3ef 8305 mrs r3, IPSR
|
|
10001850: 2b00 cmp r3, #0
|
|
10001852: d120 bne.n 10001896 <sleep_until+0x52>
|
|
10001854: 2206 movs r2, #6
|
|
10001856: 4252 negs r2, r2
|
|
10001858: 17d3 asrs r3, r2, #31
|
|
1000185a: 1912 adds r2, r2, r4
|
|
1000185c: 416b adcs r3, r5
|
|
1000185e: 428b cmp r3, r1
|
|
10001860: d802 bhi.n 10001868 <sleep_until+0x24>
|
|
10001862: d103 bne.n 1000186c <sleep_until+0x28>
|
|
10001864: 4282 cmp r2, r0
|
|
10001866: d901 bls.n 1000186c <sleep_until+0x28>
|
|
10001868: 2200 movs r2, #0
|
|
1000186a: 2300 movs r3, #0
|
|
1000186c: a804 add r0, sp, #16
|
|
1000186e: f7ff fbef bl 10001050 <update_us_since_boot>
|
|
10001872: a802 add r0, sp, #8
|
|
10001874: f7ff fd46 bl 10001304 <get_absolute_time>
|
|
10001878: 9802 ldr r0, [sp, #8]
|
|
1000187a: 9903 ldr r1, [sp, #12]
|
|
1000187c: 9a04 ldr r2, [sp, #16]
|
|
1000187e: 9b05 ldr r3, [sp, #20]
|
|
10001880: 1a12 subs r2, r2, r0
|
|
10001882: 418b sbcs r3, r1
|
|
10001884: 2b00 cmp r3, #0
|
|
10001886: dc0b bgt.n 100018a0 <sleep_until+0x5c>
|
|
10001888: d008 beq.n 1000189c <sleep_until+0x58>
|
|
1000188a: 0020 movs r0, r4
|
|
1000188c: 0029 movs r1, r5
|
|
1000188e: f000 f8c9 bl 10001a24 <busy_wait_until>
|
|
10001892: b007 add sp, #28
|
|
10001894: bd30 pop {r4, r5, pc}
|
|
10001896: 4814 ldr r0, [pc, #80] @ (100018e8 <sleep_until+0xa4>)
|
|
10001898: f000 fd9e bl 100023d8 <panic>
|
|
1000189c: 2a00 cmp r2, #0
|
|
1000189e: d0f4 beq.n 1000188a <sleep_until+0x46>
|
|
100018a0: 4a12 ldr r2, [pc, #72] @ (100018ec <sleep_until+0xa8>)
|
|
100018a2: 9804 ldr r0, [sp, #16]
|
|
100018a4: 9905 ldr r1, [sp, #20]
|
|
100018a6: 2300 movs r3, #0
|
|
100018a8: 9300 str r3, [sp, #0]
|
|
100018aa: f7ff ff5c bl 10001766 <add_alarm_at>
|
|
100018ae: 2800 cmp r0, #0
|
|
100018b0: da13 bge.n 100018da <sleep_until+0x96>
|
|
100018b2: e7ea b.n 1000188a <sleep_until+0x46>
|
|
100018b4: 4b0e ldr r3, [pc, #56] @ (100018f0 <sleep_until+0xac>)
|
|
100018b6: 681a ldr r2, [r3, #0]
|
|
100018b8: f3ef 8110 mrs r1, PRIMASK
|
|
100018bc: b672 cpsid i
|
|
100018be: 6813 ldr r3, [r2, #0]
|
|
100018c0: 2b00 cmp r3, #0
|
|
100018c2: d0fc beq.n 100018be <sleep_until+0x7a>
|
|
100018c4: f3bf 8f5f dmb sy
|
|
100018c8: 4b09 ldr r3, [pc, #36] @ (100018f0 <sleep_until+0xac>)
|
|
100018ca: 681b ldr r3, [r3, #0]
|
|
100018cc: f3bf 8f5f dmb sy
|
|
100018d0: 2200 movs r2, #0
|
|
100018d2: 601a str r2, [r3, #0]
|
|
100018d4: f381 8810 msr PRIMASK, r1
|
|
100018d8: bf20 wfe
|
|
100018da: 9804 ldr r0, [sp, #16]
|
|
100018dc: 9905 ldr r1, [sp, #20]
|
|
100018de: f7ff fb6f bl 10000fc0 <time_reached>
|
|
100018e2: 2800 cmp r0, #0
|
|
100018e4: d0e6 beq.n 100018b4 <sleep_until+0x70>
|
|
100018e6: e7d0 b.n 1000188a <sleep_until+0x46>
|
|
100018e8: 10005b2c .word 0x10005b2c
|
|
100018ec: 100012d5 .word 0x100012d5
|
|
100018f0: 20000d4c .word 0x20000d4c
|
|
|
|
100018f4 <sleep_us>:
|
|
100018f4: b500 push {lr}
|
|
100018f6: b083 sub sp, #12
|
|
100018f8: 0002 movs r2, r0
|
|
100018fa: 000b movs r3, r1
|
|
100018fc: 4668 mov r0, sp
|
|
100018fe: f7ff fd12 bl 10001326 <make_timeout_time_us>
|
|
10001902: 9800 ldr r0, [sp, #0]
|
|
10001904: 9901 ldr r1, [sp, #4]
|
|
10001906: f7ff ff9d bl 10001844 <sleep_until>
|
|
1000190a: b003 add sp, #12
|
|
1000190c: bd00 pop {pc}
|
|
|
|
1000190e <sleep_ms>:
|
|
1000190e: b510 push {r4, lr}
|
|
10001910: 22fa movs r2, #250 @ 0xfa
|
|
10001912: 0092 lsls r2, r2, #2
|
|
10001914: 2300 movs r3, #0
|
|
10001916: 2100 movs r1, #0
|
|
10001918: f002 fcec bl 100042f4 <__wrap___aeabi_lmul>
|
|
1000191c: f7ff ffea bl 100018f4 <sleep_us>
|
|
10001920: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10001924 <best_effort_wfe_or_timeout>:
|
|
10001924: b530 push {r4, r5, lr}
|
|
10001926: b083 sub sp, #12
|
|
10001928: 0005 movs r5, r0
|
|
1000192a: 000c movs r4, r1
|
|
1000192c: f3ef 8305 mrs r3, IPSR
|
|
10001930: 2b00 cmp r3, #0
|
|
10001932: d10f bne.n 10001954 <best_effort_wfe_or_timeout+0x30>
|
|
10001934: 4a0b ldr r2, [pc, #44] @ (10001964 <best_effort_wfe_or_timeout+0x40>)
|
|
10001936: 2300 movs r3, #0
|
|
10001938: 9300 str r3, [sp, #0]
|
|
1000193a: f7ff ff14 bl 10001766 <add_alarm_at>
|
|
1000193e: 2800 cmp r0, #0
|
|
10001940: dd0b ble.n 1000195a <best_effort_wfe_or_timeout+0x36>
|
|
10001942: bf20 wfe
|
|
10001944: f7ff ff76 bl 10001834 <cancel_alarm>
|
|
10001948: 0028 movs r0, r5
|
|
1000194a: 0021 movs r1, r4
|
|
1000194c: f7ff fb38 bl 10000fc0 <time_reached>
|
|
10001950: b003 add sp, #12
|
|
10001952: bd30 pop {r4, r5, pc}
|
|
10001954: f7ff fb34 bl 10000fc0 <time_reached>
|
|
10001958: e7fa b.n 10001950 <best_effort_wfe_or_timeout+0x2c>
|
|
1000195a: 0028 movs r0, r5
|
|
1000195c: 0021 movs r1, r4
|
|
1000195e: f7ff fb2f bl 10000fc0 <time_reached>
|
|
10001962: e7f5 b.n 10001950 <best_effort_wfe_or_timeout+0x2c>
|
|
10001964: 100012d5 .word 0x100012d5
|
|
|
|
10001968 <hardware_alarm_irq_handler>:
|
|
10001968: b570 push {r4, r5, r6, lr}
|
|
1000196a: f3ef 8005 mrs r0, IPSR
|
|
1000196e: 3810 subs r0, #16
|
|
10001970: f3ef 8c10 mrs ip, PRIMASK
|
|
10001974: b672 cpsid i
|
|
10001976: 4b19 ldr r3, [pc, #100] @ (100019dc <hardware_alarm_irq_handler+0x74>)
|
|
10001978: 681b ldr r3, [r3, #0]
|
|
1000197a: 2b00 cmp r3, #0
|
|
1000197c: d0fb beq.n 10001976 <hardware_alarm_irq_handler+0xe>
|
|
1000197e: f3bf 8f5f dmb sy
|
|
10001982: 2201 movs r2, #1
|
|
10001984: 0013 movs r3, r2
|
|
10001986: 4083 lsls r3, r0
|
|
10001988: 4915 ldr r1, [pc, #84] @ (100019e0 <hardware_alarm_irq_handler+0x78>)
|
|
1000198a: 634b str r3, [r1, #52] @ 0x34
|
|
1000198c: 4915 ldr r1, [pc, #84] @ (100019e4 <hardware_alarm_irq_handler+0x7c>)
|
|
1000198e: 600b str r3, [r1, #0]
|
|
10001990: 4915 ldr r1, [pc, #84] @ (100019e8 <hardware_alarm_irq_handler+0x80>)
|
|
10001992: 7809 ldrb r1, [r1, #0]
|
|
10001994: 000c movs r4, r1
|
|
10001996: 40c4 lsrs r4, r0
|
|
10001998: 4222 tst r2, r4
|
|
1000199a: d013 beq.n 100019c4 <hardware_alarm_irq_handler+0x5c>
|
|
1000199c: 4a10 ldr r2, [pc, #64] @ (100019e0 <hardware_alarm_irq_handler+0x78>)
|
|
1000199e: 6a54 ldr r4, [r2, #36] @ 0x24
|
|
100019a0: 4a12 ldr r2, [pc, #72] @ (100019ec <hardware_alarm_irq_handler+0x84>)
|
|
100019a2: 0085 lsls r5, r0, #2
|
|
100019a4: 58aa ldr r2, [r5, r2]
|
|
100019a6: 4294 cmp r4, r2
|
|
100019a8: d305 bcc.n 100019b6 <hardware_alarm_irq_handler+0x4e>
|
|
100019aa: 4a11 ldr r2, [pc, #68] @ (100019f0 <hardware_alarm_irq_handler+0x88>)
|
|
100019ac: 58aa ldr r2, [r5, r2]
|
|
100019ae: 4c0e ldr r4, [pc, #56] @ (100019e8 <hardware_alarm_irq_handler+0x80>)
|
|
100019b0: 4399 bics r1, r3
|
|
100019b2: 7021 strb r1, [r4, #0]
|
|
100019b4: e007 b.n 100019c6 <hardware_alarm_irq_handler+0x5e>
|
|
100019b6: 4a0a ldr r2, [pc, #40] @ (100019e0 <hardware_alarm_irq_handler+0x78>)
|
|
100019b8: 1d03 adds r3, r0, #4
|
|
100019ba: 009b lsls r3, r3, #2
|
|
100019bc: 5899 ldr r1, [r3, r2]
|
|
100019be: 5099 str r1, [r3, r2]
|
|
100019c0: 2200 movs r2, #0
|
|
100019c2: e000 b.n 100019c6 <hardware_alarm_irq_handler+0x5e>
|
|
100019c4: 2200 movs r2, #0
|
|
100019c6: f3bf 8f5f dmb sy
|
|
100019ca: 4b04 ldr r3, [pc, #16] @ (100019dc <hardware_alarm_irq_handler+0x74>)
|
|
100019cc: 2100 movs r1, #0
|
|
100019ce: 6019 str r1, [r3, #0]
|
|
100019d0: f38c 8810 msr PRIMASK, ip
|
|
100019d4: 2a00 cmp r2, #0
|
|
100019d6: d000 beq.n 100019da <hardware_alarm_irq_handler+0x72>
|
|
100019d8: 4790 blx r2
|
|
100019da: bd70 pop {r4, r5, r6, pc}
|
|
100019dc: d0000128 .word 0xd0000128
|
|
100019e0: 40054000 .word 0x40054000
|
|
100019e4: 4005703c .word 0x4005703c
|
|
100019e8: 20000d88 .word 0x20000d88
|
|
100019ec: 20000d50 .word 0x20000d50
|
|
100019f0: 20000aac .word 0x20000aac
|
|
|
|
100019f4 <hardware_alarm_claim>:
|
|
100019f4: b510 push {r4, lr}
|
|
100019f6: 0001 movs r1, r0
|
|
100019f8: 4a02 ldr r2, [pc, #8] @ (10001a04 <hardware_alarm_claim+0x10>)
|
|
100019fa: 4b03 ldr r3, [pc, #12] @ (10001a08 <hardware_alarm_claim+0x14>)
|
|
100019fc: 0018 movs r0, r3
|
|
100019fe: f7ff f84b bl 10000a98 <hw_claim_or_assert>
|
|
10001a02: bd10 pop {r4, pc}
|
|
10001a04: 10005c58 .word 0x10005c58
|
|
10001a08: 20000d86 .word 0x20000d86
|
|
|
|
10001a0c <time_us_64>:
|
|
10001a0c: 4b04 ldr r3, [pc, #16] @ (10001a20 <time_us_64+0x14>)
|
|
10001a0e: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001a10: 4a03 ldr r2, [pc, #12] @ (10001a20 <time_us_64+0x14>)
|
|
10001a12: 6a90 ldr r0, [r2, #40] @ 0x28
|
|
10001a14: 0019 movs r1, r3
|
|
10001a16: 6a53 ldr r3, [r2, #36] @ 0x24
|
|
10001a18: 4299 cmp r1, r3
|
|
10001a1a: d1f9 bne.n 10001a10 <time_us_64+0x4>
|
|
10001a1c: 4770 bx lr
|
|
10001a1e: 46c0 nop @ (mov r8, r8)
|
|
10001a20: 40054000 .word 0x40054000
|
|
|
|
10001a24 <busy_wait_until>:
|
|
10001a24: 4b08 ldr r3, [pc, #32] @ (10001a48 <busy_wait_until+0x24>)
|
|
10001a26: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001a28: e001 b.n 10001a2e <busy_wait_until+0xa>
|
|
10001a2a: 4b07 ldr r3, [pc, #28] @ (10001a48 <busy_wait_until+0x24>)
|
|
10001a2c: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001a2e: 428b cmp r3, r1
|
|
10001a30: d3fb bcc.n 10001a2a <busy_wait_until+0x6>
|
|
10001a32: e001 b.n 10001a38 <busy_wait_until+0x14>
|
|
10001a34: 4b04 ldr r3, [pc, #16] @ (10001a48 <busy_wait_until+0x24>)
|
|
10001a36: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001a38: 428b cmp r3, r1
|
|
10001a3a: d103 bne.n 10001a44 <busy_wait_until+0x20>
|
|
10001a3c: 4b02 ldr r3, [pc, #8] @ (10001a48 <busy_wait_until+0x24>)
|
|
10001a3e: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
10001a40: 4283 cmp r3, r0
|
|
10001a42: d3f7 bcc.n 10001a34 <busy_wait_until+0x10>
|
|
10001a44: 4770 bx lr
|
|
10001a46: 46c0 nop @ (mov r8, r8)
|
|
10001a48: 40054000 .word 0x40054000
|
|
|
|
10001a4c <hardware_alarm_set_callback>:
|
|
10001a4c: b570 push {r4, r5, r6, lr}
|
|
10001a4e: 0004 movs r4, r0
|
|
10001a50: 000e movs r6, r1
|
|
10001a52: f3ef 8510 mrs r5, PRIMASK
|
|
10001a56: b672 cpsid i
|
|
10001a58: 4b1b ldr r3, [pc, #108] @ (10001ac8 <hardware_alarm_set_callback+0x7c>)
|
|
10001a5a: 681b ldr r3, [r3, #0]
|
|
10001a5c: 2b00 cmp r3, #0
|
|
10001a5e: d0fb beq.n 10001a58 <hardware_alarm_set_callback+0xc>
|
|
10001a60: f3bf 8f5f dmb sy
|
|
10001a64: 2e00 cmp r6, #0
|
|
10001a66: d01c beq.n 10001aa2 <hardware_alarm_set_callback+0x56>
|
|
10001a68: 0020 movs r0, r4
|
|
10001a6a: f7ff f909 bl 10000c80 <irq_get_vtable_handler>
|
|
10001a6e: 4b17 ldr r3, [pc, #92] @ (10001acc <hardware_alarm_set_callback+0x80>)
|
|
10001a70: 4283 cmp r3, r0
|
|
10001a72: d00b beq.n 10001a8c <hardware_alarm_set_callback+0x40>
|
|
10001a74: 0019 movs r1, r3
|
|
10001a76: 0020 movs r0, r4
|
|
10001a78: f7ff f90a bl 10000c90 <irq_set_exclusive_handler>
|
|
10001a7c: 2101 movs r1, #1
|
|
10001a7e: 0020 movs r0, r4
|
|
10001a80: f7ff f8f6 bl 10000c70 <irq_set_enabled>
|
|
10001a84: 2301 movs r3, #1
|
|
10001a86: 40a3 lsls r3, r4
|
|
10001a88: 4a11 ldr r2, [pc, #68] @ (10001ad0 <hardware_alarm_set_callback+0x84>)
|
|
10001a8a: 6013 str r3, [r2, #0]
|
|
10001a8c: 4b11 ldr r3, [pc, #68] @ (10001ad4 <hardware_alarm_set_callback+0x88>)
|
|
10001a8e: 00a4 lsls r4, r4, #2
|
|
10001a90: 50e6 str r6, [r4, r3]
|
|
10001a92: f3bf 8f5f dmb sy
|
|
10001a96: 4b0c ldr r3, [pc, #48] @ (10001ac8 <hardware_alarm_set_callback+0x7c>)
|
|
10001a98: 2200 movs r2, #0
|
|
10001a9a: 601a str r2, [r3, #0]
|
|
10001a9c: f385 8810 msr PRIMASK, r5
|
|
10001aa0: bd70 pop {r4, r5, r6, pc}
|
|
10001aa2: 4b0c ldr r3, [pc, #48] @ (10001ad4 <hardware_alarm_set_callback+0x88>)
|
|
10001aa4: 00a2 lsls r2, r4, #2
|
|
10001aa6: 2100 movs r1, #0
|
|
10001aa8: 50d1 str r1, [r2, r3]
|
|
10001aaa: 2201 movs r2, #1
|
|
10001aac: 40a2 lsls r2, r4
|
|
10001aae: 490a ldr r1, [pc, #40] @ (10001ad8 <hardware_alarm_set_callback+0x8c>)
|
|
10001ab0: 780b ldrb r3, [r1, #0]
|
|
10001ab2: 4393 bics r3, r2
|
|
10001ab4: 700b strb r3, [r1, #0]
|
|
10001ab6: 4905 ldr r1, [pc, #20] @ (10001acc <hardware_alarm_set_callback+0x80>)
|
|
10001ab8: 0020 movs r0, r4
|
|
10001aba: f7ff f913 bl 10000ce4 <irq_remove_handler>
|
|
10001abe: 2100 movs r1, #0
|
|
10001ac0: 0020 movs r0, r4
|
|
10001ac2: f7ff f8d5 bl 10000c70 <irq_set_enabled>
|
|
10001ac6: e7e4 b.n 10001a92 <hardware_alarm_set_callback+0x46>
|
|
10001ac8: d0000128 .word 0xd0000128
|
|
10001acc: 10001969 .word 0x10001969
|
|
10001ad0: 40056038 .word 0x40056038
|
|
10001ad4: 20000aac .word 0x20000aac
|
|
10001ad8: 20000d88 .word 0x20000d88
|
|
|
|
10001adc <hardware_alarm_set_target>:
|
|
10001adc: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001ade: 46de mov lr, fp
|
|
10001ae0: b500 push {lr}
|
|
10001ae2: b084 sub sp, #16
|
|
10001ae4: 0004 movs r4, r0
|
|
10001ae6: 0015 movs r5, r2
|
|
10001ae8: 9201 str r2, [sp, #4]
|
|
10001aea: 001e movs r6, r3
|
|
10001aec: 9302 str r3, [sp, #8]
|
|
10001aee: f7ff ff8d bl 10001a0c <time_us_64>
|
|
10001af2: 9503 str r5, [sp, #12]
|
|
10001af4: 428e cmp r6, r1
|
|
10001af6: d802 bhi.n 10001afe <hardware_alarm_set_target+0x22>
|
|
10001af8: d14e bne.n 10001b98 <hardware_alarm_set_target+0xbc>
|
|
10001afa: 4285 cmp r5, r0
|
|
10001afc: d94c bls.n 10001b98 <hardware_alarm_set_target+0xbc>
|
|
10001afe: f3ef 8b10 mrs fp, PRIMASK
|
|
10001b02: b672 cpsid i
|
|
10001b04: 4b27 ldr r3, [pc, #156] @ (10001ba4 <hardware_alarm_set_target+0xc8>)
|
|
10001b06: 681b ldr r3, [r3, #0]
|
|
10001b08: 2b00 cmp r3, #0
|
|
10001b0a: d0fb beq.n 10001b04 <hardware_alarm_set_target+0x28>
|
|
10001b0c: f3bf 8f5f dmb sy
|
|
10001b10: 4a25 ldr r2, [pc, #148] @ (10001ba8 <hardware_alarm_set_target+0xcc>)
|
|
10001b12: 7817 ldrb r7, [r2, #0]
|
|
10001b14: 2501 movs r5, #1
|
|
10001b16: 40a5 lsls r5, r4
|
|
10001b18: b2eb uxtb r3, r5
|
|
10001b1a: 433b orrs r3, r7
|
|
10001b1c: 7013 strb r3, [r2, #0]
|
|
10001b1e: 4b23 ldr r3, [pc, #140] @ (10001bac <hardware_alarm_set_target+0xd0>)
|
|
10001b20: 635d str r5, [r3, #52] @ 0x34
|
|
10001b22: 1d22 adds r2, r4, #4
|
|
10001b24: 0092 lsls r2, r2, #2
|
|
10001b26: 9901 ldr r1, [sp, #4]
|
|
10001b28: 50d1 str r1, [r2, r3]
|
|
10001b2a: 4a21 ldr r2, [pc, #132] @ (10001bb0 <hardware_alarm_set_target+0xd4>)
|
|
10001b2c: 00a1 lsls r1, r4, #2
|
|
10001b2e: 9802 ldr r0, [sp, #8]
|
|
10001b30: 5088 str r0, [r1, r2]
|
|
10001b32: 6a1b ldr r3, [r3, #32]
|
|
10001b34: 422b tst r3, r5
|
|
10001b36: d112 bne.n 10001b5e <hardware_alarm_set_target+0x82>
|
|
10001b38: 4b1c ldr r3, [pc, #112] @ (10001bac <hardware_alarm_set_target+0xd0>)
|
|
10001b3a: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
10001b3c: 422b tst r3, r5
|
|
10001b3e: d008 beq.n 10001b52 <hardware_alarm_set_target+0x76>
|
|
10001b40: 2000 movs r0, #0
|
|
10001b42: f3bf 8f5f dmb sy
|
|
10001b46: 4b17 ldr r3, [pc, #92] @ (10001ba4 <hardware_alarm_set_target+0xc8>)
|
|
10001b48: 2200 movs r2, #0
|
|
10001b4a: 601a str r2, [r3, #0]
|
|
10001b4c: f38b 8810 msr PRIMASK, fp
|
|
10001b50: e023 b.n 10001b9a <hardware_alarm_set_target+0xbe>
|
|
10001b52: 4b18 ldr r3, [pc, #96] @ (10001bb4 <hardware_alarm_set_target+0xd8>)
|
|
10001b54: 4a18 ldr r2, [pc, #96] @ (10001bb8 <hardware_alarm_set_target+0xdc>)
|
|
10001b56: 4819 ldr r0, [pc, #100] @ (10001bbc <hardware_alarm_set_target+0xe0>)
|
|
10001b58: 21c5 movs r1, #197 @ 0xc5
|
|
10001b5a: f000 fba5 bl 100022a8 <__assert_func>
|
|
10001b5e: f7ff ff55 bl 10001a0c <time_us_64>
|
|
10001b62: 428e cmp r6, r1
|
|
10001b64: d814 bhi.n 10001b90 <hardware_alarm_set_target+0xb4>
|
|
10001b66: d102 bne.n 10001b6e <hardware_alarm_set_target+0x92>
|
|
10001b68: 9b03 ldr r3, [sp, #12]
|
|
10001b6a: 4283 cmp r3, r0
|
|
10001b6c: d810 bhi.n 10001b90 <hardware_alarm_set_target+0xb4>
|
|
10001b6e: 4b0e ldr r3, [pc, #56] @ (10001ba8 <hardware_alarm_set_target+0xcc>)
|
|
10001b70: 781b ldrb r3, [r3, #0]
|
|
10001b72: 42bb cmp r3, r7
|
|
10001b74: d00e beq.n 10001b94 <hardware_alarm_set_target+0xb8>
|
|
10001b76: 4b0d ldr r3, [pc, #52] @ (10001bac <hardware_alarm_set_target+0xd0>)
|
|
10001b78: 621d str r5, [r3, #32]
|
|
10001b7a: 635d str r5, [r3, #52] @ 0x34
|
|
10001b7c: 221f movs r2, #31
|
|
10001b7e: 4022 ands r2, r4
|
|
10001b80: 2301 movs r3, #1
|
|
10001b82: 4093 lsls r3, r2
|
|
10001b84: 4a0e ldr r2, [pc, #56] @ (10001bc0 <hardware_alarm_set_target+0xe4>)
|
|
10001b86: 6013 str r3, [r2, #0]
|
|
10001b88: 4b07 ldr r3, [pc, #28] @ (10001ba8 <hardware_alarm_set_target+0xcc>)
|
|
10001b8a: 701f strb r7, [r3, #0]
|
|
10001b8c: 2001 movs r0, #1
|
|
10001b8e: e7d8 b.n 10001b42 <hardware_alarm_set_target+0x66>
|
|
10001b90: 2000 movs r0, #0
|
|
10001b92: e7d6 b.n 10001b42 <hardware_alarm_set_target+0x66>
|
|
10001b94: 2001 movs r0, #1
|
|
10001b96: e7d4 b.n 10001b42 <hardware_alarm_set_target+0x66>
|
|
10001b98: 2001 movs r0, #1
|
|
10001b9a: b004 add sp, #16
|
|
10001b9c: bc80 pop {r7}
|
|
10001b9e: 46bb mov fp, r7
|
|
10001ba0: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001ba2: 46c0 nop @ (mov r8, r8)
|
|
10001ba4: d0000128 .word 0xd0000128
|
|
10001ba8: 20000d88 .word 0x20000d88
|
|
10001bac: 40054000 .word 0x40054000
|
|
10001bb0: 20000d50 .word 0x20000d50
|
|
10001bb4: 10005c7c .word 0x10005c7c
|
|
10001bb8: 10005cec .word 0x10005cec
|
|
10001bbc: 10005ca0 .word 0x10005ca0
|
|
10001bc0: e000e280 .word 0xe000e280
|
|
|
|
10001bc4 <hardware_alarm_cancel>:
|
|
10001bc4: f3ef 8c10 mrs ip, PRIMASK
|
|
10001bc8: b672 cpsid i
|
|
10001bca: 4b0b ldr r3, [pc, #44] @ (10001bf8 <hardware_alarm_cancel+0x34>)
|
|
10001bcc: 681b ldr r3, [r3, #0]
|
|
10001bce: 2b00 cmp r3, #0
|
|
10001bd0: d0fb beq.n 10001bca <hardware_alarm_cancel+0x6>
|
|
10001bd2: f3bf 8f5f dmb sy
|
|
10001bd6: 2301 movs r3, #1
|
|
10001bd8: 4083 lsls r3, r0
|
|
10001bda: 4a08 ldr r2, [pc, #32] @ (10001bfc <hardware_alarm_cancel+0x38>)
|
|
10001bdc: 6213 str r3, [r2, #32]
|
|
10001bde: 4908 ldr r1, [pc, #32] @ (10001c00 <hardware_alarm_cancel+0x3c>)
|
|
10001be0: 780a ldrb r2, [r1, #0]
|
|
10001be2: 439a bics r2, r3
|
|
10001be4: 700a strb r2, [r1, #0]
|
|
10001be6: f3bf 8f5f dmb sy
|
|
10001bea: 4b03 ldr r3, [pc, #12] @ (10001bf8 <hardware_alarm_cancel+0x34>)
|
|
10001bec: 2200 movs r2, #0
|
|
10001bee: 601a str r2, [r3, #0]
|
|
10001bf0: f38c 8810 msr PRIMASK, ip
|
|
10001bf4: 4770 bx lr
|
|
10001bf6: 46c0 nop @ (mov r8, r8)
|
|
10001bf8: d0000128 .word 0xd0000128
|
|
10001bfc: 40054000 .word 0x40054000
|
|
10001c00: 20000d88 .word 0x20000d88
|
|
|
|
10001c04 <ph_get_node>:
|
|
10001c04: b510 push {r4, lr}
|
|
10001c06: 2900 cmp r1, #0
|
|
10001c08: d008 beq.n 10001c1c <ph_get_node+0x18>
|
|
10001c0a: 7b03 ldrb r3, [r0, #12]
|
|
10001c0c: 428b cmp r3, r1
|
|
10001c0e: d305 bcc.n 10001c1c <ph_get_node+0x18>
|
|
10001c10: 6800 ldr r0, [r0, #0]
|
|
10001c12: 004b lsls r3, r1, #1
|
|
10001c14: 185b adds r3, r3, r1
|
|
10001c16: 3b03 subs r3, #3
|
|
10001c18: 18c0 adds r0, r0, r3
|
|
10001c1a: bd10 pop {r4, pc}
|
|
10001c1c: 4b02 ldr r3, [pc, #8] @ (10001c28 <ph_get_node+0x24>)
|
|
10001c1e: 4a03 ldr r2, [pc, #12] @ (10001c2c <ph_get_node+0x28>)
|
|
10001c20: 4803 ldr r0, [pc, #12] @ (10001c30 <ph_get_node+0x2c>)
|
|
10001c22: 2168 movs r1, #104 @ 0x68
|
|
10001c24: f000 fb40 bl 100022a8 <__assert_func>
|
|
10001c28: 1000597c .word 0x1000597c
|
|
10001c2c: 10005e00 .word 0x10005e00
|
|
10001c30: 10005998 .word 0x10005998
|
|
|
|
10001c34 <ph_add_child_node>:
|
|
10001c34: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10001c36: 0006 movs r6, r0
|
|
10001c38: 000c movs r4, r1
|
|
10001c3a: 0015 movs r5, r2
|
|
10001c3c: f7ff ffe2 bl 10001c04 <ph_get_node>
|
|
10001c40: 0007 movs r7, r0
|
|
10001c42: 2c00 cmp r4, #0
|
|
10001c44: d00d beq.n 10001c62 <ph_add_child_node+0x2e>
|
|
10001c46: 2d00 cmp r5, #0
|
|
10001c48: d011 beq.n 10001c6e <ph_add_child_node+0x3a>
|
|
10001c4a: 42ac cmp r4, r5
|
|
10001c4c: d015 beq.n 10001c7a <ph_add_child_node+0x46>
|
|
10001c4e: 0029 movs r1, r5
|
|
10001c50: 0030 movs r0, r6
|
|
10001c52: f7ff ffd7 bl 10001c04 <ph_get_node>
|
|
10001c56: 7084 strb r4, [r0, #2]
|
|
10001c58: 783b ldrb r3, [r7, #0]
|
|
10001c5a: 2b00 cmp r3, #0
|
|
10001c5c: d113 bne.n 10001c86 <ph_add_child_node+0x52>
|
|
10001c5e: 703d strb r5, [r7, #0]
|
|
10001c60: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10001c62: 4b0a ldr r3, [pc, #40] @ (10001c8c <ph_add_child_node+0x58>)
|
|
10001c64: 4a0a ldr r2, [pc, #40] @ (10001c90 <ph_add_child_node+0x5c>)
|
|
10001c66: 480b ldr r0, [pc, #44] @ (10001c94 <ph_add_child_node+0x60>)
|
|
10001c68: 216f movs r1, #111 @ 0x6f
|
|
10001c6a: f000 fb1d bl 100022a8 <__assert_func>
|
|
10001c6e: 4b0a ldr r3, [pc, #40] @ (10001c98 <ph_add_child_node+0x64>)
|
|
10001c70: 4a07 ldr r2, [pc, #28] @ (10001c90 <ph_add_child_node+0x5c>)
|
|
10001c72: 4808 ldr r0, [pc, #32] @ (10001c94 <ph_add_child_node+0x60>)
|
|
10001c74: 2170 movs r1, #112 @ 0x70
|
|
10001c76: f000 fb17 bl 100022a8 <__assert_func>
|
|
10001c7a: 4b08 ldr r3, [pc, #32] @ (10001c9c <ph_add_child_node+0x68>)
|
|
10001c7c: 4a04 ldr r2, [pc, #16] @ (10001c90 <ph_add_child_node+0x5c>)
|
|
10001c7e: 4805 ldr r0, [pc, #20] @ (10001c94 <ph_add_child_node+0x60>)
|
|
10001c80: 2171 movs r1, #113 @ 0x71
|
|
10001c82: f000 fb11 bl 100022a8 <__assert_func>
|
|
10001c86: 7043 strb r3, [r0, #1]
|
|
10001c88: 703d strb r5, [r7, #0]
|
|
10001c8a: e7e9 b.n 10001c60 <ph_add_child_node+0x2c>
|
|
10001c8c: 100059ec .word 0x100059ec
|
|
10001c90: 10005dec .word 0x10005dec
|
|
10001c94: 10005998 .word 0x10005998
|
|
10001c98: 100059f8 .word 0x100059f8
|
|
10001c9c: 10005a04 .word 0x10005a04
|
|
|
|
10001ca0 <ph_merge_nodes>:
|
|
10001ca0: b570 push {r4, r5, r6, lr}
|
|
10001ca2: 0006 movs r6, r0
|
|
10001ca4: 000d movs r5, r1
|
|
10001ca6: 0014 movs r4, r2
|
|
10001ca8: 2900 cmp r1, #0
|
|
10001caa: d014 beq.n 10001cd6 <ph_merge_nodes+0x36>
|
|
10001cac: 2a00 cmp r2, #0
|
|
10001cae: d014 beq.n 10001cda <ph_merge_nodes+0x3a>
|
|
10001cb0: 6843 ldr r3, [r0, #4]
|
|
10001cb2: 6880 ldr r0, [r0, #8]
|
|
10001cb4: 4798 blx r3
|
|
10001cb6: 2800 cmp r0, #0
|
|
10001cb8: d006 beq.n 10001cc8 <ph_merge_nodes+0x28>
|
|
10001cba: 0022 movs r2, r4
|
|
10001cbc: 0029 movs r1, r5
|
|
10001cbe: 0030 movs r0, r6
|
|
10001cc0: f7ff ffb8 bl 10001c34 <ph_add_child_node>
|
|
10001cc4: 0028 movs r0, r5
|
|
10001cc6: e007 b.n 10001cd8 <ph_merge_nodes+0x38>
|
|
10001cc8: 002a movs r2, r5
|
|
10001cca: 0021 movs r1, r4
|
|
10001ccc: 0030 movs r0, r6
|
|
10001cce: f7ff ffb1 bl 10001c34 <ph_add_child_node>
|
|
10001cd2: 0020 movs r0, r4
|
|
10001cd4: e000 b.n 10001cd8 <ph_merge_nodes+0x38>
|
|
10001cd6: 0010 movs r0, r2
|
|
10001cd8: bd70 pop {r4, r5, r6, pc}
|
|
10001cda: 0008 movs r0, r1
|
|
10001cdc: e7fc b.n 10001cd8 <ph_merge_nodes+0x38>
|
|
|
|
10001cde <ph_clear>:
|
|
10001cde: b570 push {r4, r5, r6, lr}
|
|
10001ce0: 0005 movs r5, r0
|
|
10001ce2: 2300 movs r3, #0
|
|
10001ce4: 7343 strb r3, [r0, #13]
|
|
10001ce6: 3301 adds r3, #1
|
|
10001ce8: 7383 strb r3, [r0, #14]
|
|
10001cea: 7b03 ldrb r3, [r0, #12]
|
|
10001cec: 73c3 strb r3, [r0, #15]
|
|
10001cee: 2401 movs r4, #1
|
|
10001cf0: e006 b.n 10001d00 <ph_clear+0x22>
|
|
10001cf2: 0021 movs r1, r4
|
|
10001cf4: 0028 movs r0, r5
|
|
10001cf6: f7ff ff85 bl 10001c04 <ph_get_node>
|
|
10001cfa: 3401 adds r4, #1
|
|
10001cfc: b2e4 uxtb r4, r4
|
|
10001cfe: 7044 strb r4, [r0, #1]
|
|
10001d00: 7b29 ldrb r1, [r5, #12]
|
|
10001d02: 42a1 cmp r1, r4
|
|
10001d04: d8f5 bhi.n 10001cf2 <ph_clear+0x14>
|
|
10001d06: 0028 movs r0, r5
|
|
10001d08: f7ff ff7c bl 10001c04 <ph_get_node>
|
|
10001d0c: 2300 movs r3, #0
|
|
10001d0e: 7043 strb r3, [r0, #1]
|
|
10001d10: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10001d12 <ph_post_alloc_init>:
|
|
10001d12: b510 push {r4, lr}
|
|
10001d14: 7301 strb r1, [r0, #12]
|
|
10001d16: 6042 str r2, [r0, #4]
|
|
10001d18: 6083 str r3, [r0, #8]
|
|
10001d1a: f7ff ffe0 bl 10001cde <ph_clear>
|
|
10001d1e: bd10 pop {r4, pc}
|
|
|
|
10001d20 <ph_merge_two_pass>:
|
|
10001d20: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001d22: 46c6 mov lr, r8
|
|
10001d24: b500 push {lr}
|
|
10001d26: 0005 movs r5, r0
|
|
10001d28: 1e0c subs r4, r1, #0
|
|
10001d2a: d103 bne.n 10001d34 <ph_merge_two_pass+0x14>
|
|
10001d2c: 0020 movs r0, r4
|
|
10001d2e: bc80 pop {r7}
|
|
10001d30: 46b8 mov r8, r7
|
|
10001d32: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001d34: f7ff ff66 bl 10001c04 <ph_get_node>
|
|
10001d38: 7846 ldrb r6, [r0, #1]
|
|
10001d3a: 2e00 cmp r6, #0
|
|
10001d3c: d0f6 beq.n 10001d2c <ph_merge_two_pass+0xc>
|
|
10001d3e: 0031 movs r1, r6
|
|
10001d40: 0028 movs r0, r5
|
|
10001d42: f7ff ff5f bl 10001c04 <ph_get_node>
|
|
10001d46: 7847 ldrb r7, [r0, #1]
|
|
10001d48: 2300 movs r3, #0
|
|
10001d4a: 4698 mov r8, r3
|
|
10001d4c: 7043 strb r3, [r0, #1]
|
|
10001d4e: 0021 movs r1, r4
|
|
10001d50: 0028 movs r0, r5
|
|
10001d52: f7ff ff57 bl 10001c04 <ph_get_node>
|
|
10001d56: 4643 mov r3, r8
|
|
10001d58: 7043 strb r3, [r0, #1]
|
|
10001d5a: 0032 movs r2, r6
|
|
10001d5c: 0021 movs r1, r4
|
|
10001d5e: 0028 movs r0, r5
|
|
10001d60: f7ff ff9e bl 10001ca0 <ph_merge_nodes>
|
|
10001d64: 0004 movs r4, r0
|
|
10001d66: 0039 movs r1, r7
|
|
10001d68: 0028 movs r0, r5
|
|
10001d6a: f7ff ffd9 bl 10001d20 <ph_merge_two_pass>
|
|
10001d6e: 0002 movs r2, r0
|
|
10001d70: 0021 movs r1, r4
|
|
10001d72: 0028 movs r0, r5
|
|
10001d74: f7ff ff94 bl 10001ca0 <ph_merge_nodes>
|
|
10001d78: 0004 movs r4, r0
|
|
10001d7a: e7d7 b.n 10001d2c <ph_merge_two_pass+0xc>
|
|
|
|
10001d7c <ph_remove_any_head>:
|
|
10001d7c: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001d7e: 46c6 mov lr, r8
|
|
10001d80: b500 push {lr}
|
|
10001d82: 0004 movs r4, r0
|
|
10001d84: 000d movs r5, r1
|
|
10001d86: 0017 movs r7, r2
|
|
10001d88: 2900 cmp r1, #0
|
|
10001d8a: d027 beq.n 10001ddc <ph_remove_any_head+0x60>
|
|
10001d8c: f7ff ff3a bl 10001c04 <ph_get_node>
|
|
10001d90: 7843 ldrb r3, [r0, #1]
|
|
10001d92: 2b00 cmp r3, #0
|
|
10001d94: d128 bne.n 10001de8 <ph_remove_any_head+0x6c>
|
|
10001d96: 7883 ldrb r3, [r0, #2]
|
|
10001d98: 2b00 cmp r3, #0
|
|
10001d9a: d12b bne.n 10001df4 <ph_remove_any_head+0x78>
|
|
10001d9c: 7801 ldrb r1, [r0, #0]
|
|
10001d9e: 0020 movs r0, r4
|
|
10001da0: f7ff ffbe bl 10001d20 <ph_merge_two_pass>
|
|
10001da4: 0006 movs r6, r0
|
|
10001da6: 4680 mov r8, r0
|
|
10001da8: 2f00 cmp r7, #0
|
|
10001daa: d00a beq.n 10001dc2 <ph_remove_any_head+0x46>
|
|
10001dac: 7be1 ldrb r1, [r4, #15]
|
|
10001dae: 2900 cmp r1, #0
|
|
10001db0: d126 bne.n 10001e00 <ph_remove_any_head+0x84>
|
|
10001db2: 7ba3 ldrb r3, [r4, #14]
|
|
10001db4: 2b00 cmp r3, #0
|
|
10001db6: d103 bne.n 10001dc0 <ph_remove_any_head+0x44>
|
|
10001db8: 7be3 ldrb r3, [r4, #15]
|
|
10001dba: 2b00 cmp r3, #0
|
|
10001dbc: d125 bne.n 10001e0a <ph_remove_any_head+0x8e>
|
|
10001dbe: 73a5 strb r5, [r4, #14]
|
|
10001dc0: 73e5 strb r5, [r4, #15]
|
|
10001dc2: 4643 mov r3, r8
|
|
10001dc4: 2b00 cmp r3, #0
|
|
10001dc6: d126 bne.n 10001e16 <ph_remove_any_head+0x9a>
|
|
10001dc8: 0029 movs r1, r5
|
|
10001dca: 0020 movs r0, r4
|
|
10001dcc: f7ff ff1a bl 10001c04 <ph_get_node>
|
|
10001dd0: 2300 movs r3, #0
|
|
10001dd2: 7043 strb r3, [r0, #1]
|
|
10001dd4: 0030 movs r0, r6
|
|
10001dd6: bc80 pop {r7}
|
|
10001dd8: 46b8 mov r8, r7
|
|
10001dda: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001ddc: 4b11 ldr r3, [pc, #68] @ (10001e24 <ph_remove_any_head+0xa8>)
|
|
10001dde: 4a12 ldr r2, [pc, #72] @ (10001e28 <ph_remove_any_head+0xac>)
|
|
10001de0: 4812 ldr r0, [pc, #72] @ (10001e2c <ph_remove_any_head+0xb0>)
|
|
10001de2: 2138 movs r1, #56 @ 0x38
|
|
10001de4: f000 fa60 bl 100022a8 <__assert_func>
|
|
10001de8: 4b11 ldr r3, [pc, #68] @ (10001e30 <ph_remove_any_head+0xb4>)
|
|
10001dea: 4a0f ldr r2, [pc, #60] @ (10001e28 <ph_remove_any_head+0xac>)
|
|
10001dec: 480f ldr r0, [pc, #60] @ (10001e2c <ph_remove_any_head+0xb0>)
|
|
10001dee: 213a movs r1, #58 @ 0x3a
|
|
10001df0: f000 fa5a bl 100022a8 <__assert_func>
|
|
10001df4: 4b0f ldr r3, [pc, #60] @ (10001e34 <ph_remove_any_head+0xb8>)
|
|
10001df6: 4a0c ldr r2, [pc, #48] @ (10001e28 <ph_remove_any_head+0xac>)
|
|
10001df8: 480c ldr r0, [pc, #48] @ (10001e2c <ph_remove_any_head+0xb0>)
|
|
10001dfa: 213b movs r1, #59 @ 0x3b
|
|
10001dfc: f000 fa54 bl 100022a8 <__assert_func>
|
|
10001e00: 0020 movs r0, r4
|
|
10001e02: f7ff feff bl 10001c04 <ph_get_node>
|
|
10001e06: 7045 strb r5, [r0, #1]
|
|
10001e08: e7d3 b.n 10001db2 <ph_remove_any_head+0x36>
|
|
10001e0a: 4b0b ldr r3, [pc, #44] @ (10001e38 <ph_remove_any_head+0xbc>)
|
|
10001e0c: 4a06 ldr r2, [pc, #24] @ (10001e28 <ph_remove_any_head+0xac>)
|
|
10001e0e: 4807 ldr r0, [pc, #28] @ (10001e2c <ph_remove_any_head+0xb0>)
|
|
10001e10: 2142 movs r1, #66 @ 0x42
|
|
10001e12: f000 fa49 bl 100022a8 <__assert_func>
|
|
10001e16: 0031 movs r1, r6
|
|
10001e18: 0020 movs r0, r4
|
|
10001e1a: f7ff fef3 bl 10001c04 <ph_get_node>
|
|
10001e1e: 2300 movs r3, #0
|
|
10001e20: 7083 strb r3, [r0, #2]
|
|
10001e22: e7d1 b.n 10001dc8 <ph_remove_any_head+0x4c>
|
|
10001e24: 10005d08 .word 0x10005d08
|
|
10001e28: 10005dd8 .word 0x10005dd8
|
|
10001e2c: 10005d10 .word 0x10005d10
|
|
10001e30: 10005d54 .word 0x10005d54
|
|
10001e34: 10005d7c .word 0x10005d7c
|
|
10001e38: 10005a44 .word 0x10005a44
|
|
|
|
10001e3c <ph_remove_head>:
|
|
10001e3c: b570 push {r4, r5, r6, lr}
|
|
10001e3e: 0004 movs r4, r0
|
|
10001e40: 000a movs r2, r1
|
|
10001e42: 7b45 ldrb r5, [r0, #13]
|
|
10001e44: 0029 movs r1, r5
|
|
10001e46: f7ff ff99 bl 10001d7c <ph_remove_any_head>
|
|
10001e4a: 7360 strb r0, [r4, #13]
|
|
10001e4c: 0028 movs r0, r5
|
|
10001e4e: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10001e50 <ph_remove_and_free_node>:
|
|
10001e50: b570 push {r4, r5, r6, lr}
|
|
10001e52: 0006 movs r6, r0
|
|
10001e54: 1e0c subs r4, r1, #0
|
|
10001e56: d040 beq.n 10001eda <ph_remove_and_free_node+0x8a>
|
|
10001e58: 7b43 ldrb r3, [r0, #13]
|
|
10001e5a: 428b cmp r3, r1
|
|
10001e5c: d007 beq.n 10001e6e <ph_remove_and_free_node+0x1e>
|
|
10001e5e: f7ff fed1 bl 10001c04 <ph_get_node>
|
|
10001e62: 0005 movs r5, r0
|
|
10001e64: 7881 ldrb r1, [r0, #2]
|
|
10001e66: 2900 cmp r1, #0
|
|
10001e68: d106 bne.n 10001e78 <ph_remove_and_free_node+0x28>
|
|
10001e6a: 2000 movs r0, #0
|
|
10001e6c: e036 b.n 10001edc <ph_remove_and_free_node+0x8c>
|
|
10001e6e: 2101 movs r1, #1
|
|
10001e70: f7ff ffe4 bl 10001e3c <ph_remove_head>
|
|
10001e74: 2001 movs r0, #1
|
|
10001e76: e031 b.n 10001edc <ph_remove_and_free_node+0x8c>
|
|
10001e78: 0030 movs r0, r6
|
|
10001e7a: f7ff fec3 bl 10001c04 <ph_get_node>
|
|
10001e7e: 7801 ldrb r1, [r0, #0]
|
|
10001e80: 42a1 cmp r1, r4
|
|
10001e82: d00d beq.n 10001ea0 <ph_remove_and_free_node+0x50>
|
|
10001e84: 0030 movs r0, r6
|
|
10001e86: f7ff febd bl 10001c04 <ph_get_node>
|
|
10001e8a: 7841 ldrb r1, [r0, #1]
|
|
10001e8c: 42a1 cmp r1, r4
|
|
10001e8e: d00a beq.n 10001ea6 <ph_remove_and_free_node+0x56>
|
|
10001e90: 2900 cmp r1, #0
|
|
10001e92: d1f7 bne.n 10001e84 <ph_remove_and_free_node+0x34>
|
|
10001e94: 4b12 ldr r3, [pc, #72] @ (10001ee0 <ph_remove_and_free_node+0x90>)
|
|
10001e96: 4a13 ldr r2, [pc, #76] @ (10001ee4 <ph_remove_and_free_node+0x94>)
|
|
10001e98: 4813 ldr r0, [pc, #76] @ (10001ee8 <ph_remove_and_free_node+0x98>)
|
|
10001e9a: 316b adds r1, #107 @ 0x6b
|
|
10001e9c: f000 fa04 bl 100022a8 <__assert_func>
|
|
10001ea0: 786b ldrb r3, [r5, #1]
|
|
10001ea2: 7003 strb r3, [r0, #0]
|
|
10001ea4: e001 b.n 10001eaa <ph_remove_and_free_node+0x5a>
|
|
10001ea6: 786b ldrb r3, [r5, #1]
|
|
10001ea8: 7043 strb r3, [r0, #1]
|
|
10001eaa: 2300 movs r3, #0
|
|
10001eac: 70ab strb r3, [r5, #2]
|
|
10001eae: 706b strb r3, [r5, #1]
|
|
10001eb0: 2201 movs r2, #1
|
|
10001eb2: 0021 movs r1, r4
|
|
10001eb4: 0030 movs r0, r6
|
|
10001eb6: f7ff ff61 bl 10001d7c <ph_remove_any_head>
|
|
10001eba: 0002 movs r2, r0
|
|
10001ebc: 7b71 ldrb r1, [r6, #13]
|
|
10001ebe: 4281 cmp r1, r0
|
|
10001ec0: d005 beq.n 10001ece <ph_remove_and_free_node+0x7e>
|
|
10001ec2: 0030 movs r0, r6
|
|
10001ec4: f7ff feec bl 10001ca0 <ph_merge_nodes>
|
|
10001ec8: 7370 strb r0, [r6, #13]
|
|
10001eca: 2001 movs r0, #1
|
|
10001ecc: e006 b.n 10001edc <ph_remove_and_free_node+0x8c>
|
|
10001ece: 4b07 ldr r3, [pc, #28] @ (10001eec <ph_remove_and_free_node+0x9c>)
|
|
10001ed0: 4a04 ldr r2, [pc, #16] @ (10001ee4 <ph_remove_and_free_node+0x94>)
|
|
10001ed2: 4805 ldr r0, [pc, #20] @ (10001ee8 <ph_remove_and_free_node+0x98>)
|
|
10001ed4: 2171 movs r1, #113 @ 0x71
|
|
10001ed6: f000 f9e7 bl 100022a8 <__assert_func>
|
|
10001eda: 2000 movs r0, #0
|
|
10001edc: bd70 pop {r4, r5, r6, pc}
|
|
10001ede: 46c0 nop @ (mov r8, r8)
|
|
10001ee0: 100057d0 .word 0x100057d0
|
|
10001ee4: 10005dc0 .word 0x10005dc0
|
|
10001ee8: 10005d10 .word 0x10005d10
|
|
10001eec: 10005da0 .word 0x10005da0
|
|
|
|
10001ef0 <clock_configure>:
|
|
10001ef0: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10001ef2: 46de mov lr, fp
|
|
10001ef4: 4657 mov r7, sl
|
|
10001ef6: 464e mov r6, r9
|
|
10001ef8: 4645 mov r5, r8
|
|
10001efa: b5e0 push {r5, r6, r7, lr}
|
|
10001efc: 0006 movs r6, r0
|
|
10001efe: 000f movs r7, r1
|
|
10001f00: 0015 movs r5, r2
|
|
10001f02: 9a0a ldr r2, [sp, #40] @ 0x28
|
|
10001f04: 4293 cmp r3, r2
|
|
10001f06: d34e bcc.n 10001fa6 <clock_configure+0xb6>
|
|
10001f08: 0e1a lsrs r2, r3, #24
|
|
10001f0a: 4692 mov sl, r2
|
|
10001f0c: 021b lsls r3, r3, #8
|
|
10001f0e: 4698 mov r8, r3
|
|
10001f10: 9a0a ldr r2, [sp, #40] @ 0x28
|
|
10001f12: 2300 movs r3, #0
|
|
10001f14: 4640 mov r0, r8
|
|
10001f16: 4651 mov r1, sl
|
|
10001f18: f001 fbec bl 100036f4 <__wrap___aeabi_uldivmod>
|
|
10001f1c: 4681 mov r9, r0
|
|
10001f1e: 0074 lsls r4, r6, #1
|
|
10001f20: 19a4 adds r4, r4, r6
|
|
10001f22: 00a4 lsls r4, r4, #2
|
|
10001f24: 4b2e ldr r3, [pc, #184] @ (10001fe0 <clock_configure+0xf0>)
|
|
10001f26: 469c mov ip, r3
|
|
10001f28: 4464 add r4, ip
|
|
10001f2a: 6863 ldr r3, [r4, #4]
|
|
10001f2c: 4283 cmp r3, r0
|
|
10001f2e: d200 bcs.n 10001f32 <clock_configure+0x42>
|
|
10001f30: 6060 str r0, [r4, #4]
|
|
10001f32: 1f33 subs r3, r6, #4
|
|
10001f34: b2db uxtb r3, r3
|
|
10001f36: 469b mov fp, r3
|
|
10001f38: 2b01 cmp r3, #1
|
|
10001f3a: d93a bls.n 10001fb2 <clock_configure+0xc2>
|
|
10001f3c: 23c0 movs r3, #192 @ 0xc0
|
|
10001f3e: 019b lsls r3, r3, #6
|
|
10001f40: 4323 orrs r3, r4
|
|
10001f42: 2280 movs r2, #128 @ 0x80
|
|
10001f44: 0112 lsls r2, r2, #4
|
|
10001f46: 601a str r2, [r3, #0]
|
|
10001f48: 4b26 ldr r3, [pc, #152] @ (10001fe4 <clock_configure+0xf4>)
|
|
10001f4a: 00b2 lsls r2, r6, #2
|
|
10001f4c: 58d1 ldr r1, [r2, r3]
|
|
10001f4e: 2900 cmp r1, #0
|
|
10001f50: d005 beq.n 10001f5e <clock_configure+0x6e>
|
|
10001f52: 6958 ldr r0, [r3, #20]
|
|
10001f54: f001 fb90 bl 10003678 <__wrap___aeabi_uidiv>
|
|
10001f58: 3001 adds r0, #1
|
|
10001f5a: 3801 subs r0, #1
|
|
10001f5c: d1fd bne.n 10001f5a <clock_configure+0x6a>
|
|
10001f5e: 016d lsls r5, r5, #5
|
|
10001f60: 6823 ldr r3, [r4, #0]
|
|
10001f62: 405d eors r5, r3
|
|
10001f64: 22e0 movs r2, #224 @ 0xe0
|
|
10001f66: 402a ands r2, r5
|
|
10001f68: 2380 movs r3, #128 @ 0x80
|
|
10001f6a: 015b lsls r3, r3, #5
|
|
10001f6c: 4323 orrs r3, r4
|
|
10001f6e: 601a str r2, [r3, #0]
|
|
10001f70: 465a mov r2, fp
|
|
10001f72: 2a01 cmp r2, #1
|
|
10001f74: d928 bls.n 10001fc8 <clock_configure+0xd8>
|
|
10001f76: 2380 movs r3, #128 @ 0x80
|
|
10001f78: 019b lsls r3, r3, #6
|
|
10001f7a: 4323 orrs r3, r4
|
|
10001f7c: 2280 movs r2, #128 @ 0x80
|
|
10001f7e: 0112 lsls r2, r2, #4
|
|
10001f80: 601a str r2, [r3, #0]
|
|
10001f82: 464b mov r3, r9
|
|
10001f84: 6063 str r3, [r4, #4]
|
|
10001f86: 464a mov r2, r9
|
|
10001f88: 2300 movs r3, #0
|
|
10001f8a: 4640 mov r0, r8
|
|
10001f8c: 4651 mov r1, sl
|
|
10001f8e: f001 fbb1 bl 100036f4 <__wrap___aeabi_uldivmod>
|
|
10001f92: 4b14 ldr r3, [pc, #80] @ (10001fe4 <clock_configure+0xf4>)
|
|
10001f94: 00b6 lsls r6, r6, #2
|
|
10001f96: 5198 str r0, [r3, r6]
|
|
10001f98: 2001 movs r0, #1
|
|
10001f9a: bcf0 pop {r4, r5, r6, r7}
|
|
10001f9c: 46bb mov fp, r7
|
|
10001f9e: 46b2 mov sl, r6
|
|
10001fa0: 46a9 mov r9, r5
|
|
10001fa2: 46a0 mov r8, r4
|
|
10001fa4: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10001fa6: 4b10 ldr r3, [pc, #64] @ (10001fe8 <clock_configure+0xf8>)
|
|
10001fa8: 4a10 ldr r2, [pc, #64] @ (10001fec <clock_configure+0xfc>)
|
|
10001faa: 4811 ldr r0, [pc, #68] @ (10001ff0 <clock_configure+0x100>)
|
|
10001fac: 212d movs r1, #45 @ 0x2d
|
|
10001fae: f000 f97b bl 100022a8 <__assert_func>
|
|
10001fb2: 2f01 cmp r7, #1
|
|
10001fb4: d1c2 bne.n 10001f3c <clock_configure+0x4c>
|
|
10001fb6: 23c0 movs r3, #192 @ 0xc0
|
|
10001fb8: 019b lsls r3, r3, #6
|
|
10001fba: 4323 orrs r3, r4
|
|
10001fbc: 2203 movs r2, #3
|
|
10001fbe: 601a str r2, [r3, #0]
|
|
10001fc0: 68a3 ldr r3, [r4, #8]
|
|
10001fc2: 07db lsls r3, r3, #31
|
|
10001fc4: d5fc bpl.n 10001fc0 <clock_configure+0xd0>
|
|
10001fc6: e7ca b.n 10001f5e <clock_configure+0x6e>
|
|
10001fc8: 6821 ldr r1, [r4, #0]
|
|
10001fca: 4079 eors r1, r7
|
|
10001fcc: 2203 movs r2, #3
|
|
10001fce: 400a ands r2, r1
|
|
10001fd0: 601a str r2, [r3, #0]
|
|
10001fd2: 68a3 ldr r3, [r4, #8]
|
|
10001fd4: 2501 movs r5, #1
|
|
10001fd6: 40bd lsls r5, r7
|
|
10001fd8: 421d tst r5, r3
|
|
10001fda: d0fa beq.n 10001fd2 <clock_configure+0xe2>
|
|
10001fdc: e7cb b.n 10001f76 <clock_configure+0x86>
|
|
10001fde: 46c0 nop @ (mov r8, r8)
|
|
10001fe0: 40008000 .word 0x40008000
|
|
10001fe4: 20000abc .word 0x20000abc
|
|
10001fe8: 10005e0c .word 0x10005e0c
|
|
10001fec: 10005e70 .word 0x10005e70
|
|
10001ff0: 10005e20 .word 0x10005e20
|
|
|
|
10001ff4 <clocks_init>:
|
|
10001ff4: b530 push {r4, r5, lr}
|
|
10001ff6: b083 sub sp, #12
|
|
10001ff8: 200c movs r0, #12
|
|
10001ffa: f000 f917 bl 1000222c <watchdog_start_tick>
|
|
10001ffe: f7fe fd2b bl 10000a58 <running_on_fpga>
|
|
10002002: 2800 cmp r0, #0
|
|
10002004: d00d beq.n 10002022 <clocks_init+0x2e>
|
|
10002006: 2300 movs r3, #0
|
|
10002008: e004 b.n 10002014 <clocks_init+0x20>
|
|
1000200a: 4a2e ldr r2, [pc, #184] @ (100020c4 <clocks_init+0xd0>)
|
|
1000200c: 0099 lsls r1, r3, #2
|
|
1000200e: 482e ldr r0, [pc, #184] @ (100020c8 <clocks_init+0xd4>)
|
|
10002010: 5088 str r0, [r1, r2]
|
|
10002012: 3301 adds r3, #1
|
|
10002014: 2b09 cmp r3, #9
|
|
10002016: d9f8 bls.n 1000200a <clocks_init+0x16>
|
|
10002018: 4b2a ldr r3, [pc, #168] @ (100020c4 <clocks_init+0xd0>)
|
|
1000201a: 4a2c ldr r2, [pc, #176] @ (100020cc <clocks_init+0xd8>)
|
|
1000201c: 625a str r2, [r3, #36] @ 0x24
|
|
1000201e: b003 add sp, #12
|
|
10002020: bd30 pop {r4, r5, pc}
|
|
10002022: 4b2b ldr r3, [pc, #172] @ (100020d0 <clocks_init+0xdc>)
|
|
10002024: 2200 movs r2, #0
|
|
10002026: 679a str r2, [r3, #120] @ 0x78
|
|
10002028: f000 f908 bl 1000223c <xosc_init>
|
|
1000202c: 4b29 ldr r3, [pc, #164] @ (100020d4 <clocks_init+0xe0>)
|
|
1000202e: 2201 movs r2, #1
|
|
10002030: 601a str r2, [r3, #0]
|
|
10002032: 4b27 ldr r3, [pc, #156] @ (100020d0 <clocks_init+0xdc>)
|
|
10002034: 6c5b ldr r3, [r3, #68] @ 0x44
|
|
10002036: 2b01 cmp r3, #1
|
|
10002038: d1fb bne.n 10002032 <clocks_init+0x3e>
|
|
1000203a: 4b27 ldr r3, [pc, #156] @ (100020d8 <clocks_init+0xe4>)
|
|
1000203c: 2203 movs r2, #3
|
|
1000203e: 601a str r2, [r3, #0]
|
|
10002040: 4b23 ldr r3, [pc, #140] @ (100020d0 <clocks_init+0xdc>)
|
|
10002042: 6b9b ldr r3, [r3, #56] @ 0x38
|
|
10002044: 2b01 cmp r3, #1
|
|
10002046: d1fb bne.n 10002040 <clocks_init+0x4c>
|
|
10002048: 3301 adds r3, #1
|
|
1000204a: 9300 str r3, [sp, #0]
|
|
1000204c: 3304 adds r3, #4
|
|
1000204e: 4a23 ldr r2, [pc, #140] @ (100020dc <clocks_init+0xe8>)
|
|
10002050: 2101 movs r1, #1
|
|
10002052: 4823 ldr r0, [pc, #140] @ (100020e0 <clocks_init+0xec>)
|
|
10002054: f000 f854 bl 10002100 <pll_init>
|
|
10002058: 2305 movs r3, #5
|
|
1000205a: 9300 str r3, [sp, #0]
|
|
1000205c: 4a21 ldr r2, [pc, #132] @ (100020e4 <clocks_init+0xf0>)
|
|
1000205e: 2101 movs r1, #1
|
|
10002060: 4821 ldr r0, [pc, #132] @ (100020e8 <clocks_init+0xf4>)
|
|
10002062: f000 f84d bl 10002100 <pll_init>
|
|
10002066: 4b21 ldr r3, [pc, #132] @ (100020ec <clocks_init+0xf8>)
|
|
10002068: 9300 str r3, [sp, #0]
|
|
1000206a: 2200 movs r2, #0
|
|
1000206c: 2102 movs r1, #2
|
|
1000206e: 2004 movs r0, #4
|
|
10002070: f7ff ff3e bl 10001ef0 <clock_configure>
|
|
10002074: 4d1e ldr r5, [pc, #120] @ (100020f0 <clocks_init+0xfc>)
|
|
10002076: 9500 str r5, [sp, #0]
|
|
10002078: 002b movs r3, r5
|
|
1000207a: 2200 movs r2, #0
|
|
1000207c: 2101 movs r1, #1
|
|
1000207e: 2005 movs r0, #5
|
|
10002080: f7ff ff36 bl 10001ef0 <clock_configure>
|
|
10002084: 4c10 ldr r4, [pc, #64] @ (100020c8 <clocks_init+0xd4>)
|
|
10002086: 9400 str r4, [sp, #0]
|
|
10002088: 0023 movs r3, r4
|
|
1000208a: 2200 movs r2, #0
|
|
1000208c: 2100 movs r1, #0
|
|
1000208e: 2007 movs r0, #7
|
|
10002090: f7ff ff2e bl 10001ef0 <clock_configure>
|
|
10002094: 9400 str r4, [sp, #0]
|
|
10002096: 0023 movs r3, r4
|
|
10002098: 2200 movs r2, #0
|
|
1000209a: 2100 movs r1, #0
|
|
1000209c: 2008 movs r0, #8
|
|
1000209e: f7ff ff27 bl 10001ef0 <clock_configure>
|
|
100020a2: 4b0a ldr r3, [pc, #40] @ (100020cc <clocks_init+0xd8>)
|
|
100020a4: 9300 str r3, [sp, #0]
|
|
100020a6: 0023 movs r3, r4
|
|
100020a8: 2200 movs r2, #0
|
|
100020aa: 2100 movs r1, #0
|
|
100020ac: 2009 movs r0, #9
|
|
100020ae: f7ff ff1f bl 10001ef0 <clock_configure>
|
|
100020b2: 9500 str r5, [sp, #0]
|
|
100020b4: 002b movs r3, r5
|
|
100020b6: 2200 movs r2, #0
|
|
100020b8: 2100 movs r1, #0
|
|
100020ba: 2006 movs r0, #6
|
|
100020bc: f7ff ff18 bl 10001ef0 <clock_configure>
|
|
100020c0: e7ad b.n 1000201e <clocks_init+0x2a>
|
|
100020c2: 46c0 nop @ (mov r8, r8)
|
|
100020c4: 20000abc .word 0x20000abc
|
|
100020c8: 02dc6c00 .word 0x02dc6c00
|
|
100020cc: 0000b71b .word 0x0000b71b
|
|
100020d0: 40008000 .word 0x40008000
|
|
100020d4: 4000b03c .word 0x4000b03c
|
|
100020d8: 4000b030 .word 0x4000b030
|
|
100020dc: 59682f00 .word 0x59682f00
|
|
100020e0: 40028000 .word 0x40028000
|
|
100020e4: 47868c00 .word 0x47868c00
|
|
100020e8: 4002c000 .word 0x4002c000
|
|
100020ec: 00b71b00 .word 0x00b71b00
|
|
100020f0: 07735940 .word 0x07735940
|
|
|
|
100020f4 <clock_get_hz>:
|
|
100020f4: 4b01 ldr r3, [pc, #4] @ (100020fc <clock_get_hz+0x8>)
|
|
100020f6: 0080 lsls r0, r0, #2
|
|
100020f8: 58c0 ldr r0, [r0, r3]
|
|
100020fa: 4770 bx lr
|
|
100020fc: 20000abc .word 0x20000abc
|
|
|
|
10002100 <pll_init>:
|
|
10002100: b5f0 push {r4, r5, r6, r7, lr}
|
|
10002102: 46c6 mov lr, r8
|
|
10002104: b500 push {lr}
|
|
10002106: 0004 movs r4, r0
|
|
10002108: 000d movs r5, r1
|
|
1000210a: 0017 movs r7, r2
|
|
1000210c: 4698 mov r8, r3
|
|
1000210e: 200c movs r0, #12
|
|
10002110: f001 fab2 bl 10003678 <__wrap___aeabi_uidiv>
|
|
10002114: 0006 movs r6, r0
|
|
10002116: 4b39 ldr r3, [pc, #228] @ (100021fc <pll_init+0xfc>)
|
|
10002118: 18fa adds r2, r7, r3
|
|
1000211a: 4b39 ldr r3, [pc, #228] @ (10002200 <pll_init+0x100>)
|
|
1000211c: 429a cmp r2, r3
|
|
1000211e: d841 bhi.n 100021a4 <pll_init+0xa4>
|
|
10002120: 0143 lsls r3, r0, #5
|
|
10002122: 1a1b subs r3, r3, r0
|
|
10002124: 0199 lsls r1, r3, #6
|
|
10002126: 1ac9 subs r1, r1, r3
|
|
10002128: 00c9 lsls r1, r1, #3
|
|
1000212a: 1809 adds r1, r1, r0
|
|
1000212c: 0189 lsls r1, r1, #6
|
|
1000212e: 0038 movs r0, r7
|
|
10002130: f001 faa2 bl 10003678 <__wrap___aeabi_uidiv>
|
|
10002134: 0002 movs r2, r0
|
|
10002136: 3a10 subs r2, #16
|
|
10002138: 2398 movs r3, #152 @ 0x98
|
|
1000213a: 005b lsls r3, r3, #1
|
|
1000213c: 429a cmp r2, r3
|
|
1000213e: d837 bhi.n 100021b0 <pll_init+0xb0>
|
|
10002140: 4643 mov r3, r8
|
|
10002142: 3b01 subs r3, #1
|
|
10002144: 2b06 cmp r3, #6
|
|
10002146: d839 bhi.n 100021bc <pll_init+0xbc>
|
|
10002148: 9b06 ldr r3, [sp, #24]
|
|
1000214a: 3b01 subs r3, #1
|
|
1000214c: 2b06 cmp r3, #6
|
|
1000214e: d835 bhi.n 100021bc <pll_init+0xbc>
|
|
10002150: 093f lsrs r7, r7, #4
|
|
10002152: 42b7 cmp r7, r6
|
|
10002154: d338 bcc.n 100021c8 <pll_init+0xc8>
|
|
10002156: 4643 mov r3, r8
|
|
10002158: 041e lsls r6, r3, #16
|
|
1000215a: 9b06 ldr r3, [sp, #24]
|
|
1000215c: 031b lsls r3, r3, #12
|
|
1000215e: 431e orrs r6, r3
|
|
10002160: 6823 ldr r3, [r4, #0]
|
|
10002162: 2b00 cmp r3, #0
|
|
10002164: db36 blt.n 100021d4 <pll_init+0xd4>
|
|
10002166: 4b27 ldr r3, [pc, #156] @ (10002204 <pll_init+0x104>)
|
|
10002168: 429c cmp r4, r3
|
|
1000216a: d044 beq.n 100021f6 <pll_init+0xf6>
|
|
1000216c: 2380 movs r3, #128 @ 0x80
|
|
1000216e: 015b lsls r3, r3, #5
|
|
10002170: 4a25 ldr r2, [pc, #148] @ (10002208 <pll_init+0x108>)
|
|
10002172: 6013 str r3, [r2, #0]
|
|
10002174: 4a25 ldr r2, [pc, #148] @ (1000220c <pll_init+0x10c>)
|
|
10002176: 6013 str r3, [r2, #0]
|
|
10002178: 4a25 ldr r2, [pc, #148] @ (10002210 <pll_init+0x110>)
|
|
1000217a: 6892 ldr r2, [r2, #8]
|
|
1000217c: 0019 movs r1, r3
|
|
1000217e: 4391 bics r1, r2
|
|
10002180: d1fa bne.n 10002178 <pll_init+0x78>
|
|
10002182: 6025 str r5, [r4, #0]
|
|
10002184: 60a0 str r0, [r4, #8]
|
|
10002186: 1d22 adds r2, r4, #4
|
|
10002188: 23c0 movs r3, #192 @ 0xc0
|
|
1000218a: 019b lsls r3, r3, #6
|
|
1000218c: 4313 orrs r3, r2
|
|
1000218e: 2221 movs r2, #33 @ 0x21
|
|
10002190: 601a str r2, [r3, #0]
|
|
10002192: 6822 ldr r2, [r4, #0]
|
|
10002194: 2a00 cmp r2, #0
|
|
10002196: dafc bge.n 10002192 <pll_init+0x92>
|
|
10002198: 60e6 str r6, [r4, #12]
|
|
1000219a: 2208 movs r2, #8
|
|
1000219c: 601a str r2, [r3, #0]
|
|
1000219e: bc80 pop {r7}
|
|
100021a0: 46b8 mov r8, r7
|
|
100021a2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100021a4: 4b1b ldr r3, [pc, #108] @ (10002214 <pll_init+0x114>)
|
|
100021a6: 4a1c ldr r2, [pc, #112] @ (10002218 <pll_init+0x118>)
|
|
100021a8: 481c ldr r0, [pc, #112] @ (1000221c <pll_init+0x11c>)
|
|
100021aa: 2111 movs r1, #17
|
|
100021ac: f000 f87c bl 100022a8 <__assert_func>
|
|
100021b0: 4b1b ldr r3, [pc, #108] @ (10002220 <pll_init+0x120>)
|
|
100021b2: 4a19 ldr r2, [pc, #100] @ (10002218 <pll_init+0x118>)
|
|
100021b4: 4819 ldr r0, [pc, #100] @ (1000221c <pll_init+0x11c>)
|
|
100021b6: 2119 movs r1, #25
|
|
100021b8: f000 f876 bl 100022a8 <__assert_func>
|
|
100021bc: 4b19 ldr r3, [pc, #100] @ (10002224 <pll_init+0x124>)
|
|
100021be: 4a16 ldr r2, [pc, #88] @ (10002218 <pll_init+0x118>)
|
|
100021c0: 4816 ldr r0, [pc, #88] @ (1000221c <pll_init+0x11c>)
|
|
100021c2: 211c movs r1, #28
|
|
100021c4: f000 f870 bl 100022a8 <__assert_func>
|
|
100021c8: 4b17 ldr r3, [pc, #92] @ (10002228 <pll_init+0x128>)
|
|
100021ca: 4a13 ldr r2, [pc, #76] @ (10002218 <pll_init+0x118>)
|
|
100021cc: 4813 ldr r0, [pc, #76] @ (1000221c <pll_init+0x11c>)
|
|
100021ce: 2123 movs r1, #35 @ 0x23
|
|
100021d0: f000 f86a bl 100022a8 <__assert_func>
|
|
100021d4: 6822 ldr r2, [r4, #0]
|
|
100021d6: 233f movs r3, #63 @ 0x3f
|
|
100021d8: 4013 ands r3, r2
|
|
100021da: 42ab cmp r3, r5
|
|
100021dc: d1c3 bne.n 10002166 <pll_init+0x66>
|
|
100021de: 68a3 ldr r3, [r4, #8]
|
|
100021e0: 051b lsls r3, r3, #20
|
|
100021e2: 0d1b lsrs r3, r3, #20
|
|
100021e4: 4283 cmp r3, r0
|
|
100021e6: d1be bne.n 10002166 <pll_init+0x66>
|
|
100021e8: 68e3 ldr r3, [r4, #12]
|
|
100021ea: 22ee movs r2, #238 @ 0xee
|
|
100021ec: 02d2 lsls r2, r2, #11
|
|
100021ee: 4013 ands r3, r2
|
|
100021f0: 42b3 cmp r3, r6
|
|
100021f2: d1b8 bne.n 10002166 <pll_init+0x66>
|
|
100021f4: e7d3 b.n 1000219e <pll_init+0x9e>
|
|
100021f6: 2380 movs r3, #128 @ 0x80
|
|
100021f8: 019b lsls r3, r3, #6
|
|
100021fa: e7b9 b.n 10002170 <pll_init+0x70>
|
|
100021fc: d34be880 .word 0xd34be880
|
|
10002200: 32a9f880 .word 0x32a9f880
|
|
10002204: 4002c000 .word 0x4002c000
|
|
10002208: 4000e000 .word 0x4000e000
|
|
1000220c: 4000f000 .word 0x4000f000
|
|
10002210: 4000c000 .word 0x4000c000
|
|
10002214: 10005e80 .word 0x10005e80
|
|
10002218: 10005fac .word 0x10005fac
|
|
1000221c: 10005ee0 .word 0x10005ee0
|
|
10002220: 10005f28 .word 0x10005f28
|
|
10002224: 10005f44 .word 0x10005f44
|
|
10002228: 10005f90 .word 0x10005f90
|
|
|
|
1000222c <watchdog_start_tick>:
|
|
1000222c: 2380 movs r3, #128 @ 0x80
|
|
1000222e: 009b lsls r3, r3, #2
|
|
10002230: 4303 orrs r3, r0
|
|
10002232: 4a01 ldr r2, [pc, #4] @ (10002238 <watchdog_start_tick+0xc>)
|
|
10002234: 62d3 str r3, [r2, #44] @ 0x2c
|
|
10002236: 4770 bx lr
|
|
10002238: 40058000 .word 0x40058000
|
|
|
|
1000223c <xosc_init>:
|
|
1000223c: 4b06 ldr r3, [pc, #24] @ (10002258 <xosc_init+0x1c>)
|
|
1000223e: 22aa movs r2, #170 @ 0xaa
|
|
10002240: 0112 lsls r2, r2, #4
|
|
10002242: 601a str r2, [r3, #0]
|
|
10002244: 222f movs r2, #47 @ 0x2f
|
|
10002246: 60da str r2, [r3, #12]
|
|
10002248: 4b04 ldr r3, [pc, #16] @ (1000225c <xosc_init+0x20>)
|
|
1000224a: 4a05 ldr r2, [pc, #20] @ (10002260 <xosc_init+0x24>)
|
|
1000224c: 601a str r2, [r3, #0]
|
|
1000224e: 4b02 ldr r3, [pc, #8] @ (10002258 <xosc_init+0x1c>)
|
|
10002250: 685b ldr r3, [r3, #4]
|
|
10002252: 2b00 cmp r3, #0
|
|
10002254: dafb bge.n 1000224e <xosc_init+0x12>
|
|
10002256: 4770 bx lr
|
|
10002258: 40024000 .word 0x40024000
|
|
1000225c: 40026000 .word 0x40026000
|
|
10002260: 00fab000 .word 0x00fab000
|
|
|
|
10002264 <_exit>:
|
|
10002264: be00 bkpt 0x0000
|
|
10002266: e7fd b.n 10002264 <_exit>
|
|
|
|
10002268 <_sbrk>:
|
|
10002268: 0003 movs r3, r0
|
|
1000226a: 4a0a ldr r2, [pc, #40] @ (10002294 <_sbrk+0x2c>)
|
|
1000226c: 6812 ldr r2, [r2, #0]
|
|
1000226e: 2a00 cmp r2, #0
|
|
10002270: d008 beq.n 10002284 <_sbrk+0x1c>
|
|
10002272: 4a08 ldr r2, [pc, #32] @ (10002294 <_sbrk+0x2c>)
|
|
10002274: 6810 ldr r0, [r2, #0]
|
|
10002276: 18c3 adds r3, r0, r3
|
|
10002278: 4a07 ldr r2, [pc, #28] @ (10002298 <_sbrk+0x30>)
|
|
1000227a: 429a cmp r2, r3
|
|
1000227c: d306 bcc.n 1000228c <_sbrk+0x24>
|
|
1000227e: 4a05 ldr r2, [pc, #20] @ (10002294 <_sbrk+0x2c>)
|
|
10002280: 6013 str r3, [r2, #0]
|
|
10002282: 4770 bx lr
|
|
10002284: 4a03 ldr r2, [pc, #12] @ (10002294 <_sbrk+0x2c>)
|
|
10002286: 4905 ldr r1, [pc, #20] @ (1000229c <_sbrk+0x34>)
|
|
10002288: 6011 str r1, [r2, #0]
|
|
1000228a: e7f2 b.n 10002272 <_sbrk+0xa>
|
|
1000228c: 2001 movs r0, #1
|
|
1000228e: 4240 negs r0, r0
|
|
10002290: e7f7 b.n 10002282 <_sbrk+0x1a>
|
|
10002292: 46c0 nop @ (mov r8, r8)
|
|
10002294: 20000b34 .word 0x20000b34
|
|
10002298: 20040000 .word 0x20040000
|
|
1000229c: 20000d8c .word 0x20000d8c
|
|
|
|
100022a0 <exit>:
|
|
100022a0: b510 push {r4, lr}
|
|
100022a2: f7ff ffdf bl 10002264 <_exit>
|
|
...
|
|
|
|
100022a8 <__assert_func>:
|
|
100022a8: b530 push {r4, r5, lr}
|
|
100022aa: b083 sub sp, #12
|
|
100022ac: 000d movs r5, r1
|
|
100022ae: 0019 movs r1, r3
|
|
100022b0: 2a00 cmp r2, #0
|
|
100022b2: d00b beq.n 100022cc <__assert_func+0x24>
|
|
100022b4: 4b07 ldr r3, [pc, #28] @ (100022d4 <__assert_func+0x2c>)
|
|
100022b6: 4c08 ldr r4, [pc, #32] @ (100022d8 <__assert_func+0x30>)
|
|
100022b8: 9201 str r2, [sp, #4]
|
|
100022ba: 9300 str r3, [sp, #0]
|
|
100022bc: 002b movs r3, r5
|
|
100022be: 0002 movs r2, r0
|
|
100022c0: 0020 movs r0, r4
|
|
100022c2: f002 facb bl 1000485c <__wrap_printf>
|
|
100022c6: 2001 movs r0, #1
|
|
100022c8: f7ff ffcc bl 10002264 <_exit>
|
|
100022cc: 4b03 ldr r3, [pc, #12] @ (100022dc <__assert_func+0x34>)
|
|
100022ce: 001a movs r2, r3
|
|
100022d0: e7f1 b.n 100022b6 <__assert_func+0xe>
|
|
100022d2: 46c0 nop @ (mov r8, r8)
|
|
100022d4: 10005fb8 .word 0x10005fb8
|
|
100022d8: 10005fc8 .word 0x10005fc8
|
|
100022dc: 10005fc4 .word 0x10005fc4
|
|
|
|
100022e0 <runtime_init>:
|
|
100022e0: b570 push {r4, r5, r6, lr}
|
|
100022e2: 4b2b ldr r3, [pc, #172] @ (10002390 <runtime_init+0xb0>)
|
|
100022e4: 4a2b ldr r2, [pc, #172] @ (10002394 <runtime_init+0xb4>)
|
|
100022e6: 601a str r2, [r3, #0]
|
|
100022e8: 4b2b ldr r3, [pc, #172] @ (10002398 <runtime_init+0xb8>)
|
|
100022ea: 4a2c ldr r2, [pc, #176] @ (1000239c <runtime_init+0xbc>)
|
|
100022ec: 601a str r2, [r3, #0]
|
|
100022ee: 4b2c ldr r3, [pc, #176] @ (100023a0 <runtime_init+0xc0>)
|
|
100022f0: 689a ldr r2, [r3, #8]
|
|
100022f2: 4b2a ldr r3, [pc, #168] @ (1000239c <runtime_init+0xbc>)
|
|
100022f4: 4393 bics r3, r2
|
|
100022f6: d1fa bne.n 100022ee <runtime_init+0xe>
|
|
100022f8: 4c2a ldr r4, [pc, #168] @ (100023a4 <runtime_init+0xc4>)
|
|
100022fa: e001 b.n 10002300 <runtime_init+0x20>
|
|
100022fc: cc08 ldmia r4!, {r3}
|
|
100022fe: 4798 blx r3
|
|
10002300: 4b29 ldr r3, [pc, #164] @ (100023a8 <runtime_init+0xc8>)
|
|
10002302: 429c cmp r4, r3
|
|
10002304: d3fa bcc.n 100022fc <runtime_init+0x1c>
|
|
10002306: f7ff fe75 bl 10001ff4 <clocks_init>
|
|
1000230a: 4b23 ldr r3, [pc, #140] @ (10002398 <runtime_init+0xb8>)
|
|
1000230c: 4a27 ldr r2, [pc, #156] @ (100023ac <runtime_init+0xcc>)
|
|
1000230e: 601a str r2, [r3, #0]
|
|
10002310: 4b23 ldr r3, [pc, #140] @ (100023a0 <runtime_init+0xc0>)
|
|
10002312: 689b ldr r3, [r3, #8]
|
|
10002314: 43db mvns r3, r3
|
|
10002316: 01db lsls r3, r3, #7
|
|
10002318: d1fa bne.n 10002310 <runtime_init+0x30>
|
|
1000231a: 4b25 ldr r3, [pc, #148] @ (100023b0 <runtime_init+0xd0>)
|
|
1000231c: 2240 movs r2, #64 @ 0x40
|
|
1000231e: 679a str r2, [r3, #120] @ 0x78
|
|
10002320: 675a str r2, [r3, #116] @ 0x74
|
|
10002322: 671a str r2, [r3, #112] @ 0x70
|
|
10002324: 66da str r2, [r3, #108] @ 0x6c
|
|
10002326: 4c23 ldr r4, [pc, #140] @ (100023b4 <runtime_init+0xd4>)
|
|
10002328: e009 b.n 1000233e <runtime_init+0x5e>
|
|
1000232a: 4b23 ldr r3, [pc, #140] @ (100023b8 <runtime_init+0xd8>)
|
|
1000232c: 4a23 ldr r2, [pc, #140] @ (100023bc <runtime_init+0xdc>)
|
|
1000232e: 4824 ldr r0, [pc, #144] @ (100023c0 <runtime_init+0xe0>)
|
|
10002330: 2186 movs r1, #134 @ 0x86
|
|
10002332: f7ff ffb9 bl 100022a8 <__assert_func>
|
|
10002336: 0020 movs r0, r4
|
|
10002338: f7fe fe26 bl 10000f88 <mutex_init>
|
|
1000233c: 3408 adds r4, #8
|
|
1000233e: 4b21 ldr r3, [pc, #132] @ (100023c4 <runtime_init+0xe4>)
|
|
10002340: 429c cmp r4, r3
|
|
10002342: d209 bcs.n 10002358 <runtime_init+0x78>
|
|
10002344: 6823 ldr r3, [r4, #0]
|
|
10002346: 2b00 cmp r3, #0
|
|
10002348: d0f5 beq.n 10002336 <runtime_init+0x56>
|
|
1000234a: 2b01 cmp r3, #1
|
|
1000234c: d1ed bne.n 1000232a <runtime_init+0x4a>
|
|
1000234e: 0020 movs r0, r4
|
|
10002350: f7fe fe27 bl 10000fa2 <recursive_mutex_init>
|
|
10002354: 3408 adds r4, #8
|
|
10002356: e7f2 b.n 1000233e <runtime_init+0x5e>
|
|
10002358: 4d1b ldr r5, [pc, #108] @ (100023c8 <runtime_init+0xe8>)
|
|
1000235a: 68a9 ldr r1, [r5, #8]
|
|
1000235c: 4c1b ldr r4, [pc, #108] @ (100023cc <runtime_init+0xec>)
|
|
1000235e: 22c0 movs r2, #192 @ 0xc0
|
|
10002360: 0020 movs r0, r4
|
|
10002362: f002 f901 bl 10004568 <__wrap___aeabi_memcpy>
|
|
10002366: 60ac str r4, [r5, #8]
|
|
10002368: f3ef 8305 mrs r3, IPSR
|
|
1000236c: 2b00 cmp r3, #0
|
|
1000236e: d000 beq.n 10002372 <runtime_init+0x92>
|
|
10002370: be00 bkpt 0x0000
|
|
10002372: f7fe fbd3 bl 10000b1c <spin_locks_reset>
|
|
10002376: f7fe fdf1 bl 10000f5c <irq_init_priorities>
|
|
1000237a: f7ff f937 bl 100015ec <alarm_pool_init_default>
|
|
1000237e: 4c14 ldr r4, [pc, #80] @ (100023d0 <runtime_init+0xf0>)
|
|
10002380: e001 b.n 10002386 <runtime_init+0xa6>
|
|
10002382: cc08 ldmia r4!, {r3}
|
|
10002384: 4798 blx r3
|
|
10002386: 4b13 ldr r3, [pc, #76] @ (100023d4 <runtime_init+0xf4>)
|
|
10002388: 429c cmp r4, r3
|
|
1000238a: d3fa bcc.n 10002382 <runtime_init+0xa2>
|
|
1000238c: bd70 pop {r4, r5, r6, pc}
|
|
1000238e: 46c0 nop @ (mov r8, r8)
|
|
10002390: 4000e000 .word 0x4000e000
|
|
10002394: fefbcdbf .word 0xfefbcdbf
|
|
10002398: 4000f000 .word 0x4000f000
|
|
1000239c: 003c7ffe .word 0x003c7ffe
|
|
100023a0: 4000c000 .word 0x4000c000
|
|
100023a4: 20000810 .word 0x20000810
|
|
100023a8: 20000820 .word 0x20000820
|
|
100023ac: 01ffffff .word 0x01ffffff
|
|
100023b0: 4001f000 .word 0x4001f000
|
|
100023b4: 20000808 .word 0x20000808
|
|
100023b8: 10005ff8 .word 0x10005ff8
|
|
100023bc: 10006078 .word 0x10006078
|
|
100023c0: 10006018 .word 0x10006018
|
|
100023c4: 20000810 .word 0x20000810
|
|
100023c8: e000ed00 .word 0xe000ed00
|
|
100023cc: 20000000 .word 0x20000000
|
|
100023d0: 20000820 .word 0x20000820
|
|
100023d4: 20000824 .word 0x20000824
|
|
|
|
100023d8 <panic>:
|
|
100023d8: b40f push {r0, r1, r2, r3}
|
|
100023da: b500 push {lr}
|
|
100023dc: b083 sub sp, #12
|
|
100023de: 4808 ldr r0, [pc, #32] @ (10002400 <panic+0x28>)
|
|
100023e0: f002 fa0c bl 100047fc <__wrap_puts>
|
|
100023e4: 9b04 ldr r3, [sp, #16]
|
|
100023e6: 2b00 cmp r3, #0
|
|
100023e8: d007 beq.n 100023fa <panic+0x22>
|
|
100023ea: a905 add r1, sp, #20
|
|
100023ec: 9101 str r1, [sp, #4]
|
|
100023ee: 0018 movs r0, r3
|
|
100023f0: f002 fa14 bl 1000481c <__wrap_vprintf>
|
|
100023f4: 4803 ldr r0, [pc, #12] @ (10002404 <panic+0x2c>)
|
|
100023f6: f002 fa01 bl 100047fc <__wrap_puts>
|
|
100023fa: 2001 movs r0, #1
|
|
100023fc: f7ff ff32 bl 10002264 <_exit>
|
|
10002400: 10006064 .word 0x10006064
|
|
10002404: 10006074 .word 0x10006074
|
|
|
|
10002408 <_out_null>:
|
|
10002408: 4770 bx lr
|
|
|
|
1000240a <_out_fct>:
|
|
1000240a: b510 push {r4, lr}
|
|
1000240c: 2800 cmp r0, #0
|
|
1000240e: d002 beq.n 10002416 <_out_fct+0xc>
|
|
10002410: 680b ldr r3, [r1, #0]
|
|
10002412: 6849 ldr r1, [r1, #4]
|
|
10002414: 4798 blx r3
|
|
10002416: bd10 pop {r4, pc}
|
|
|
|
10002418 <_atoi>:
|
|
10002418: 0001 movs r1, r0
|
|
1000241a: 2000 movs r0, #0
|
|
1000241c: e007 b.n 1000242e <_atoi+0x16>
|
|
1000241e: 0083 lsls r3, r0, #2
|
|
10002420: 181b adds r3, r3, r0
|
|
10002422: 005b lsls r3, r3, #1
|
|
10002424: 1c50 adds r0, r2, #1
|
|
10002426: 6008 str r0, [r1, #0]
|
|
10002428: 7810 ldrb r0, [r2, #0]
|
|
1000242a: 18c0 adds r0, r0, r3
|
|
1000242c: 3830 subs r0, #48 @ 0x30
|
|
1000242e: 680a ldr r2, [r1, #0]
|
|
10002430: 7813 ldrb r3, [r2, #0]
|
|
10002432: 3b30 subs r3, #48 @ 0x30
|
|
10002434: b2db uxtb r3, r3
|
|
10002436: 2b09 cmp r3, #9
|
|
10002438: d9f1 bls.n 1000241e <_atoi+0x6>
|
|
1000243a: 4770 bx lr
|
|
|
|
1000243c <_out_rev>:
|
|
1000243c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000243e: 46de mov lr, fp
|
|
10002440: 4657 mov r7, sl
|
|
10002442: 464e mov r6, r9
|
|
10002444: 4645 mov r5, r8
|
|
10002446: b5e0 push {r5, r6, r7, lr}
|
|
10002448: b083 sub sp, #12
|
|
1000244a: 4693 mov fp, r2
|
|
1000244c: 001f movs r7, r3
|
|
1000244e: 9b0c ldr r3, [sp, #48] @ 0x30
|
|
10002450: 469a mov sl, r3
|
|
10002452: 9c0d ldr r4, [sp, #52] @ 0x34
|
|
10002454: 9b0e ldr r3, [sp, #56] @ 0x38
|
|
10002456: 4699 mov r9, r3
|
|
10002458: 9b0f ldr r3, [sp, #60] @ 0x3c
|
|
1000245a: 079b lsls r3, r3, #30
|
|
1000245c: d003 beq.n 10002466 <_out_rev+0x2a>
|
|
1000245e: 46b8 mov r8, r7
|
|
10002460: 000f movs r7, r1
|
|
10002462: 0006 movs r6, r0
|
|
10002464: e022 b.n 100024ac <_out_rev+0x70>
|
|
10002466: 9201 str r2, [sp, #4]
|
|
10002468: 46a3 mov fp, r4
|
|
1000246a: 4688 mov r8, r1
|
|
1000246c: 464e mov r6, r9
|
|
1000246e: 46b9 mov r9, r7
|
|
10002470: 0007 movs r7, r0
|
|
10002472: 42b4 cmp r4, r6
|
|
10002474: d207 bcs.n 10002486 <_out_rev+0x4a>
|
|
10002476: 1c55 adds r5, r2, #1
|
|
10002478: 464b mov r3, r9
|
|
1000247a: 4641 mov r1, r8
|
|
1000247c: 2020 movs r0, #32
|
|
1000247e: 47b8 blx r7
|
|
10002480: 3401 adds r4, #1
|
|
10002482: 002a movs r2, r5
|
|
10002484: e7f5 b.n 10002472 <_out_rev+0x36>
|
|
10002486: 003d movs r5, r7
|
|
10002488: 464f mov r7, r9
|
|
1000248a: 465c mov r4, fp
|
|
1000248c: 9b01 ldr r3, [sp, #4]
|
|
1000248e: 469b mov fp, r3
|
|
10002490: 46b1 mov r9, r6
|
|
10002492: 4646 mov r6, r8
|
|
10002494: 46b8 mov r8, r7
|
|
10002496: 0037 movs r7, r6
|
|
10002498: 002e movs r6, r5
|
|
1000249a: e007 b.n 100024ac <_out_rev+0x70>
|
|
1000249c: 3c01 subs r4, #1
|
|
1000249e: 1c55 adds r5, r2, #1
|
|
100024a0: 4653 mov r3, sl
|
|
100024a2: 5d18 ldrb r0, [r3, r4]
|
|
100024a4: 4643 mov r3, r8
|
|
100024a6: 0039 movs r1, r7
|
|
100024a8: 47b0 blx r6
|
|
100024aa: 002a movs r2, r5
|
|
100024ac: 2c00 cmp r4, #0
|
|
100024ae: d1f5 bne.n 1000249c <_out_rev+0x60>
|
|
100024b0: 0035 movs r5, r6
|
|
100024b2: 003e movs r6, r7
|
|
100024b4: 4647 mov r7, r8
|
|
100024b6: 9b0f ldr r3, [sp, #60] @ 0x3c
|
|
100024b8: 079b lsls r3, r3, #30
|
|
100024ba: d407 bmi.n 100024cc <_out_rev+0x90>
|
|
100024bc: 0010 movs r0, r2
|
|
100024be: b003 add sp, #12
|
|
100024c0: bcf0 pop {r4, r5, r6, r7}
|
|
100024c2: 46bb mov fp, r7
|
|
100024c4: 46b2 mov sl, r6
|
|
100024c6: 46a9 mov r9, r5
|
|
100024c8: 46a0 mov r8, r4
|
|
100024ca: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100024cc: 46b0 mov r8, r6
|
|
100024ce: 464e mov r6, r9
|
|
100024d0: 46b9 mov r9, r7
|
|
100024d2: 002f movs r7, r5
|
|
100024d4: 465d mov r5, fp
|
|
100024d6: 1b53 subs r3, r2, r5
|
|
100024d8: 42b3 cmp r3, r6
|
|
100024da: d2ef bcs.n 100024bc <_out_rev+0x80>
|
|
100024dc: 1c54 adds r4, r2, #1
|
|
100024de: 464b mov r3, r9
|
|
100024e0: 4641 mov r1, r8
|
|
100024e2: 2020 movs r0, #32
|
|
100024e4: 47b8 blx r7
|
|
100024e6: 0022 movs r2, r4
|
|
100024e8: e7f5 b.n 100024d6 <_out_rev+0x9a>
|
|
|
|
100024ea <_ntoa_format>:
|
|
100024ea: b5f0 push {r4, r5, r6, r7, lr}
|
|
100024ec: 46ce mov lr, r9
|
|
100024ee: 4647 mov r7, r8
|
|
100024f0: b580 push {r7, lr}
|
|
100024f2: b085 sub sp, #20
|
|
100024f4: 4694 mov ip, r2
|
|
100024f6: 4698 mov r8, r3
|
|
100024f8: 9d0c ldr r5, [sp, #48] @ 0x30
|
|
100024fa: 9c0d ldr r4, [sp, #52] @ 0x34
|
|
100024fc: ab0e add r3, sp, #56 @ 0x38
|
|
100024fe: 781b ldrb r3, [r3, #0]
|
|
10002500: 4699 mov r9, r3
|
|
10002502: 9a10 ldr r2, [sp, #64] @ 0x40
|
|
10002504: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10002506: 9e12 ldr r6, [sp, #72] @ 0x48
|
|
10002508: 07b7 lsls r7, r6, #30
|
|
1000250a: d41c bmi.n 10002546 <_ntoa_format+0x5c>
|
|
1000250c: 2b00 cmp r3, #0
|
|
1000250e: d00c beq.n 1000252a <_ntoa_format+0x40>
|
|
10002510: 07f7 lsls r7, r6, #31
|
|
10002512: d50a bpl.n 1000252a <_ntoa_format+0x40>
|
|
10002514: 464f mov r7, r9
|
|
10002516: 2f00 cmp r7, #0
|
|
10002518: d102 bne.n 10002520 <_ntoa_format+0x36>
|
|
1000251a: 370c adds r7, #12
|
|
1000251c: 4237 tst r7, r6
|
|
1000251e: d004 beq.n 1000252a <_ntoa_format+0x40>
|
|
10002520: 3b01 subs r3, #1
|
|
10002522: e002 b.n 1000252a <_ntoa_format+0x40>
|
|
10002524: 2730 movs r7, #48 @ 0x30
|
|
10002526: 552f strb r7, [r5, r4]
|
|
10002528: 3401 adds r4, #1
|
|
1000252a: 4294 cmp r4, r2
|
|
1000252c: d201 bcs.n 10002532 <_ntoa_format+0x48>
|
|
1000252e: 2c1f cmp r4, #31
|
|
10002530: d9f8 bls.n 10002524 <_ntoa_format+0x3a>
|
|
10002532: 07f7 lsls r7, r6, #31
|
|
10002534: d507 bpl.n 10002546 <_ntoa_format+0x5c>
|
|
10002536: 429c cmp r4, r3
|
|
10002538: d205 bcs.n 10002546 <_ntoa_format+0x5c>
|
|
1000253a: 2c1f cmp r4, #31
|
|
1000253c: d803 bhi.n 10002546 <_ntoa_format+0x5c>
|
|
1000253e: 2730 movs r7, #48 @ 0x30
|
|
10002540: 552f strb r7, [r5, r4]
|
|
10002542: 3401 adds r4, #1
|
|
10002544: e7f5 b.n 10002532 <_ntoa_format+0x48>
|
|
10002546: 06f7 lsls r7, r6, #27
|
|
10002548: d512 bpl.n 10002570 <_ntoa_format+0x86>
|
|
1000254a: 0577 lsls r7, r6, #21
|
|
1000254c: d405 bmi.n 1000255a <_ntoa_format+0x70>
|
|
1000254e: 2c00 cmp r4, #0
|
|
10002550: d003 beq.n 1000255a <_ntoa_format+0x70>
|
|
10002552: 4294 cmp r4, r2
|
|
10002554: d021 beq.n 1000259a <_ntoa_format+0xb0>
|
|
10002556: 429c cmp r4, r3
|
|
10002558: d01f beq.n 1000259a <_ntoa_format+0xb0>
|
|
1000255a: 9a0f ldr r2, [sp, #60] @ 0x3c
|
|
1000255c: 2a10 cmp r2, #16
|
|
1000255e: d032 beq.n 100025c6 <_ntoa_format+0xdc>
|
|
10002560: 9a0f ldr r2, [sp, #60] @ 0x3c
|
|
10002562: 2a02 cmp r2, #2
|
|
10002564: d037 beq.n 100025d6 <_ntoa_format+0xec>
|
|
10002566: 2c1f cmp r4, #31
|
|
10002568: d80a bhi.n 10002580 <_ntoa_format+0x96>
|
|
1000256a: 2230 movs r2, #48 @ 0x30
|
|
1000256c: 552a strb r2, [r5, r4]
|
|
1000256e: 3401 adds r4, #1
|
|
10002570: 2c1f cmp r4, #31
|
|
10002572: d805 bhi.n 10002580 <_ntoa_format+0x96>
|
|
10002574: 464a mov r2, r9
|
|
10002576: 2a00 cmp r2, #0
|
|
10002578: d033 beq.n 100025e2 <_ntoa_format+0xf8>
|
|
1000257a: 222d movs r2, #45 @ 0x2d
|
|
1000257c: 552a strb r2, [r5, r4]
|
|
1000257e: 3401 adds r4, #1
|
|
10002580: 9603 str r6, [sp, #12]
|
|
10002582: 9302 str r3, [sp, #8]
|
|
10002584: 9401 str r4, [sp, #4]
|
|
10002586: 9500 str r5, [sp, #0]
|
|
10002588: 4643 mov r3, r8
|
|
1000258a: 4662 mov r2, ip
|
|
1000258c: f7ff ff56 bl 1000243c <_out_rev>
|
|
10002590: b005 add sp, #20
|
|
10002592: bcc0 pop {r6, r7}
|
|
10002594: 46b9 mov r9, r7
|
|
10002596: 46b0 mov r8, r6
|
|
10002598: bdf0 pop {r4, r5, r6, r7, pc}
|
|
1000259a: 1e62 subs r2, r4, #1
|
|
1000259c: 2c01 cmp r4, #1
|
|
1000259e: d010 beq.n 100025c2 <_ntoa_format+0xd8>
|
|
100025a0: 9f0f ldr r7, [sp, #60] @ 0x3c
|
|
100025a2: 2f10 cmp r7, #16
|
|
100025a4: d00b beq.n 100025be <_ntoa_format+0xd4>
|
|
100025a6: 0014 movs r4, r2
|
|
100025a8: 9a0f ldr r2, [sp, #60] @ 0x3c
|
|
100025aa: 2a10 cmp r2, #16
|
|
100025ac: d1d8 bne.n 10002560 <_ntoa_format+0x76>
|
|
100025ae: 06b2 lsls r2, r6, #26
|
|
100025b0: d5d6 bpl.n 10002560 <_ntoa_format+0x76>
|
|
100025b2: 2c1f cmp r4, #31
|
|
100025b4: d8d4 bhi.n 10002560 <_ntoa_format+0x76>
|
|
100025b6: 2258 movs r2, #88 @ 0x58
|
|
100025b8: 552a strb r2, [r5, r4]
|
|
100025ba: 3401 adds r4, #1
|
|
100025bc: e7d3 b.n 10002566 <_ntoa_format+0x7c>
|
|
100025be: 3c02 subs r4, #2
|
|
100025c0: e7cb b.n 1000255a <_ntoa_format+0x70>
|
|
100025c2: 0014 movs r4, r2
|
|
100025c4: e7c9 b.n 1000255a <_ntoa_format+0x70>
|
|
100025c6: 06b2 lsls r2, r6, #26
|
|
100025c8: d4ee bmi.n 100025a8 <_ntoa_format+0xbe>
|
|
100025ca: 2c1f cmp r4, #31
|
|
100025cc: d8ec bhi.n 100025a8 <_ntoa_format+0xbe>
|
|
100025ce: 2278 movs r2, #120 @ 0x78
|
|
100025d0: 552a strb r2, [r5, r4]
|
|
100025d2: 3401 adds r4, #1
|
|
100025d4: e7c7 b.n 10002566 <_ntoa_format+0x7c>
|
|
100025d6: 2c1f cmp r4, #31
|
|
100025d8: d8d2 bhi.n 10002580 <_ntoa_format+0x96>
|
|
100025da: 3260 adds r2, #96 @ 0x60
|
|
100025dc: 552a strb r2, [r5, r4]
|
|
100025de: 3401 adds r4, #1
|
|
100025e0: e7c1 b.n 10002566 <_ntoa_format+0x7c>
|
|
100025e2: 0772 lsls r2, r6, #29
|
|
100025e4: d503 bpl.n 100025ee <_ntoa_format+0x104>
|
|
100025e6: 222b movs r2, #43 @ 0x2b
|
|
100025e8: 552a strb r2, [r5, r4]
|
|
100025ea: 3401 adds r4, #1
|
|
100025ec: e7c8 b.n 10002580 <_ntoa_format+0x96>
|
|
100025ee: 0732 lsls r2, r6, #28
|
|
100025f0: d5c6 bpl.n 10002580 <_ntoa_format+0x96>
|
|
100025f2: 2220 movs r2, #32
|
|
100025f4: 552a strb r2, [r5, r4]
|
|
100025f6: 3401 adds r4, #1
|
|
100025f8: e7c2 b.n 10002580 <_ntoa_format+0x96>
|
|
|
|
100025fa <_ntoa_long>:
|
|
100025fa: b5f0 push {r4, r5, r6, r7, lr}
|
|
100025fc: 46de mov lr, fp
|
|
100025fe: 4657 mov r7, sl
|
|
10002600: 464e mov r6, r9
|
|
10002602: 4645 mov r5, r8
|
|
10002604: b5e0 push {r5, r6, r7, lr}
|
|
10002606: b093 sub sp, #76 @ 0x4c
|
|
10002608: 4681 mov r9, r0
|
|
1000260a: 468a mov sl, r1
|
|
1000260c: 9208 str r2, [sp, #32]
|
|
1000260e: 9309 str r3, [sp, #36] @ 0x24
|
|
10002610: ab1c add r3, sp, #112 @ 0x70
|
|
10002612: cb10 ldmia r3!, {r4}
|
|
10002614: 781b ldrb r3, [r3, #0]
|
|
10002616: 469b mov fp, r3
|
|
10002618: 9d1e ldr r5, [sp, #120] @ 0x78
|
|
1000261a: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
1000261c: 4698 mov r8, r3
|
|
1000261e: 2c00 cmp r4, #0
|
|
10002620: d103 bne.n 1000262a <_ntoa_long+0x30>
|
|
10002622: 2310 movs r3, #16
|
|
10002624: 4642 mov r2, r8
|
|
10002626: 439a bics r2, r3
|
|
10002628: 4690 mov r8, r2
|
|
1000262a: 2380 movs r3, #128 @ 0x80
|
|
1000262c: 00db lsls r3, r3, #3
|
|
1000262e: 4646 mov r6, r8
|
|
10002630: 401e ands r6, r3
|
|
10002632: 4642 mov r2, r8
|
|
10002634: 421a tst r2, r3
|
|
10002636: d012 beq.n 1000265e <_ntoa_long+0x64>
|
|
10002638: 2c00 cmp r4, #0
|
|
1000263a: d022 beq.n 10002682 <_ntoa_long+0x88>
|
|
1000263c: 2600 movs r6, #0
|
|
1000263e: e00e b.n 1000265e <_ntoa_long+0x64>
|
|
10002640: 3330 adds r3, #48 @ 0x30
|
|
10002642: b2d9 uxtb r1, r3
|
|
10002644: 1c77 adds r7, r6, #1
|
|
10002646: ab0a add r3, sp, #40 @ 0x28
|
|
10002648: 5599 strb r1, [r3, r6]
|
|
1000264a: 0029 movs r1, r5
|
|
1000264c: 0020 movs r0, r4
|
|
1000264e: f001 f813 bl 10003678 <__wrap___aeabi_uidiv>
|
|
10002652: 42ac cmp r4, r5
|
|
10002654: d316 bcc.n 10002684 <_ntoa_long+0x8a>
|
|
10002656: 2f1f cmp r7, #31
|
|
10002658: d814 bhi.n 10002684 <_ntoa_long+0x8a>
|
|
1000265a: 003e movs r6, r7
|
|
1000265c: 0004 movs r4, r0
|
|
1000265e: 0029 movs r1, r5
|
|
10002660: 0020 movs r0, r4
|
|
10002662: f001 f809 bl 10003678 <__wrap___aeabi_uidiv>
|
|
10002666: b2cb uxtb r3, r1
|
|
10002668: 2b09 cmp r3, #9
|
|
1000266a: d9e9 bls.n 10002640 <_ntoa_long+0x46>
|
|
1000266c: 4642 mov r2, r8
|
|
1000266e: 0692 lsls r2, r2, #26
|
|
10002670: d505 bpl.n 1000267e <_ntoa_long+0x84>
|
|
10002672: 2141 movs r1, #65 @ 0x41
|
|
10002674: 18c9 adds r1, r1, r3
|
|
10002676: b2c9 uxtb r1, r1
|
|
10002678: 390a subs r1, #10
|
|
1000267a: b2c9 uxtb r1, r1
|
|
1000267c: e7e2 b.n 10002644 <_ntoa_long+0x4a>
|
|
1000267e: 2161 movs r1, #97 @ 0x61
|
|
10002680: e7f8 b.n 10002674 <_ntoa_long+0x7a>
|
|
10002682: 0027 movs r7, r4
|
|
10002684: 4643 mov r3, r8
|
|
10002686: 9306 str r3, [sp, #24]
|
|
10002688: 9b20 ldr r3, [sp, #128] @ 0x80
|
|
1000268a: 9305 str r3, [sp, #20]
|
|
1000268c: 9b1f ldr r3, [sp, #124] @ 0x7c
|
|
1000268e: 9304 str r3, [sp, #16]
|
|
10002690: 9503 str r5, [sp, #12]
|
|
10002692: 465b mov r3, fp
|
|
10002694: 9302 str r3, [sp, #8]
|
|
10002696: 9701 str r7, [sp, #4]
|
|
10002698: ab0a add r3, sp, #40 @ 0x28
|
|
1000269a: 9300 str r3, [sp, #0]
|
|
1000269c: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
1000269e: 9a08 ldr r2, [sp, #32]
|
|
100026a0: 4651 mov r1, sl
|
|
100026a2: 4648 mov r0, r9
|
|
100026a4: f7ff ff21 bl 100024ea <_ntoa_format>
|
|
100026a8: b013 add sp, #76 @ 0x4c
|
|
100026aa: bcf0 pop {r4, r5, r6, r7}
|
|
100026ac: 46bb mov fp, r7
|
|
100026ae: 46b2 mov sl, r6
|
|
100026b0: 46a9 mov r9, r5
|
|
100026b2: 46a0 mov r8, r4
|
|
100026b4: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100026b6 <_ntoa_long_long>:
|
|
100026b6: b5f0 push {r4, r5, r6, r7, lr}
|
|
100026b8: 46de mov lr, fp
|
|
100026ba: 4657 mov r7, sl
|
|
100026bc: 464e mov r6, r9
|
|
100026be: 4645 mov r5, r8
|
|
100026c0: b5e0 push {r5, r6, r7, lr}
|
|
100026c2: b097 sub sp, #92 @ 0x5c
|
|
100026c4: 900a str r0, [sp, #40] @ 0x28
|
|
100026c6: 910b str r1, [sp, #44] @ 0x2c
|
|
100026c8: 920c str r2, [sp, #48] @ 0x30
|
|
100026ca: 469a mov sl, r3
|
|
100026cc: 9b20 ldr r3, [sp, #128] @ 0x80
|
|
100026ce: 4699 mov r9, r3
|
|
100026d0: 9f21 ldr r7, [sp, #132] @ 0x84
|
|
100026d2: aa22 add r2, sp, #136 @ 0x88
|
|
100026d4: 7813 ldrb r3, [r2, #0]
|
|
100026d6: 469b mov fp, r3
|
|
100026d8: 9b24 ldr r3, [sp, #144] @ 0x90
|
|
100026da: 9309 str r3, [sp, #36] @ 0x24
|
|
100026dc: 9c25 ldr r4, [sp, #148] @ 0x94
|
|
100026de: 9b28 ldr r3, [sp, #160] @ 0xa0
|
|
100026e0: 4698 mov r8, r3
|
|
100026e2: 464a mov r2, r9
|
|
100026e4: 433a orrs r2, r7
|
|
100026e6: d102 bne.n 100026ee <_ntoa_long_long+0x38>
|
|
100026e8: 3210 adds r2, #16
|
|
100026ea: 4393 bics r3, r2
|
|
100026ec: 4698 mov r8, r3
|
|
100026ee: 2280 movs r2, #128 @ 0x80
|
|
100026f0: 00d2 lsls r2, r2, #3
|
|
100026f2: 4645 mov r5, r8
|
|
100026f4: 4015 ands r5, r2
|
|
100026f6: 4643 mov r3, r8
|
|
100026f8: 4213 tst r3, r2
|
|
100026fa: d00a beq.n 10002712 <_ntoa_long_long+0x5c>
|
|
100026fc: 464a mov r2, r9
|
|
100026fe: 433a orrs r2, r7
|
|
10002700: d041 beq.n 10002786 <_ntoa_long_long+0xd0>
|
|
10002702: 2500 movs r5, #0
|
|
10002704: 002e movs r6, r5
|
|
10002706: 4653 mov r3, sl
|
|
10002708: 930d str r3, [sp, #52] @ 0x34
|
|
1000270a: 464d mov r5, r9
|
|
1000270c: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
1000270e: 469a mov sl, r3
|
|
10002710: e01b b.n 1000274a <_ntoa_long_long+0x94>
|
|
10002712: 002e movs r6, r5
|
|
10002714: 4653 mov r3, sl
|
|
10002716: 930d str r3, [sp, #52] @ 0x34
|
|
10002718: 464d mov r5, r9
|
|
1000271a: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
1000271c: 469a mov sl, r3
|
|
1000271e: e014 b.n 1000274a <_ntoa_long_long+0x94>
|
|
10002720: 3330 adds r3, #48 @ 0x30
|
|
10002722: b2da uxtb r2, r3
|
|
10002724: 1c73 adds r3, r6, #1
|
|
10002726: 4699 mov r9, r3
|
|
10002728: ab0e add r3, sp, #56 @ 0x38
|
|
1000272a: 559a strb r2, [r3, r6]
|
|
1000272c: 4652 mov r2, sl
|
|
1000272e: 0023 movs r3, r4
|
|
10002730: 0028 movs r0, r5
|
|
10002732: 0039 movs r1, r7
|
|
10002734: f000 ffde bl 100036f4 <__wrap___aeabi_uldivmod>
|
|
10002738: 42bc cmp r4, r7
|
|
1000273a: d826 bhi.n 1000278a <_ntoa_long_long+0xd4>
|
|
1000273c: d019 beq.n 10002772 <_ntoa_long_long+0xbc>
|
|
1000273e: 464b mov r3, r9
|
|
10002740: 2b1f cmp r3, #31
|
|
10002742: d81c bhi.n 1000277e <_ntoa_long_long+0xc8>
|
|
10002744: 464e mov r6, r9
|
|
10002746: 0005 movs r5, r0
|
|
10002748: 000f movs r7, r1
|
|
1000274a: 4652 mov r2, sl
|
|
1000274c: 0023 movs r3, r4
|
|
1000274e: 0028 movs r0, r5
|
|
10002750: 0039 movs r1, r7
|
|
10002752: f000 ffcf bl 100036f4 <__wrap___aeabi_uldivmod>
|
|
10002756: b2d3 uxtb r3, r2
|
|
10002758: 2b09 cmp r3, #9
|
|
1000275a: d9e1 bls.n 10002720 <_ntoa_long_long+0x6a>
|
|
1000275c: 4642 mov r2, r8
|
|
1000275e: 0692 lsls r2, r2, #26
|
|
10002760: d505 bpl.n 1000276e <_ntoa_long_long+0xb8>
|
|
10002762: 2241 movs r2, #65 @ 0x41
|
|
10002764: 18d2 adds r2, r2, r3
|
|
10002766: b2d2 uxtb r2, r2
|
|
10002768: 3a0a subs r2, #10
|
|
1000276a: b2d2 uxtb r2, r2
|
|
1000276c: e7da b.n 10002724 <_ntoa_long_long+0x6e>
|
|
1000276e: 2261 movs r2, #97 @ 0x61
|
|
10002770: e7f8 b.n 10002764 <_ntoa_long_long+0xae>
|
|
10002772: 45aa cmp sl, r5
|
|
10002774: d9e3 bls.n 1000273e <_ntoa_long_long+0x88>
|
|
10002776: 464e mov r6, r9
|
|
10002778: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000277a: 469a mov sl, r3
|
|
1000277c: e008 b.n 10002790 <_ntoa_long_long+0xda>
|
|
1000277e: 464e mov r6, r9
|
|
10002780: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10002782: 469a mov sl, r3
|
|
10002784: e004 b.n 10002790 <_ntoa_long_long+0xda>
|
|
10002786: 2600 movs r6, #0
|
|
10002788: e002 b.n 10002790 <_ntoa_long_long+0xda>
|
|
1000278a: 464e mov r6, r9
|
|
1000278c: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000278e: 469a mov sl, r3
|
|
10002790: 4643 mov r3, r8
|
|
10002792: 9306 str r3, [sp, #24]
|
|
10002794: 9b27 ldr r3, [sp, #156] @ 0x9c
|
|
10002796: 9305 str r3, [sp, #20]
|
|
10002798: 9b26 ldr r3, [sp, #152] @ 0x98
|
|
1000279a: 9304 str r3, [sp, #16]
|
|
1000279c: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
1000279e: 9303 str r3, [sp, #12]
|
|
100027a0: 465b mov r3, fp
|
|
100027a2: 9302 str r3, [sp, #8]
|
|
100027a4: 9601 str r6, [sp, #4]
|
|
100027a6: ab0e add r3, sp, #56 @ 0x38
|
|
100027a8: 9300 str r3, [sp, #0]
|
|
100027aa: 4653 mov r3, sl
|
|
100027ac: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
100027ae: 990b ldr r1, [sp, #44] @ 0x2c
|
|
100027b0: 980a ldr r0, [sp, #40] @ 0x28
|
|
100027b2: f7ff fe9a bl 100024ea <_ntoa_format>
|
|
100027b6: b017 add sp, #92 @ 0x5c
|
|
100027b8: bcf0 pop {r4, r5, r6, r7}
|
|
100027ba: 46bb mov fp, r7
|
|
100027bc: 46b2 mov sl, r6
|
|
100027be: 46a9 mov r9, r5
|
|
100027c0: 46a0 mov r8, r4
|
|
100027c2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100027c4 <_etoa>:
|
|
100027c4: b5f0 push {r4, r5, r6, r7, lr}
|
|
100027c6: 46de mov lr, fp
|
|
100027c8: 4657 mov r7, sl
|
|
100027ca: 464e mov r6, r9
|
|
100027cc: 4645 mov r5, r8
|
|
100027ce: b5e0 push {r5, r6, r7, lr}
|
|
100027d0: b091 sub sp, #68 @ 0x44
|
|
100027d2: 4680 mov r8, r0
|
|
100027d4: 4689 mov r9, r1
|
|
100027d6: 920c str r2, [sp, #48] @ 0x30
|
|
100027d8: 469a mov sl, r3
|
|
100027da: 9c1a ldr r4, [sp, #104] @ 0x68
|
|
100027dc: 9d1b ldr r5, [sp, #108] @ 0x6c
|
|
100027de: 0022 movs r2, r4
|
|
100027e0: 002b movs r3, r5
|
|
100027e2: 0020 movs r0, r4
|
|
100027e4: 0029 movs r1, r5
|
|
100027e6: f001 fa10 bl 10003c0a <__wrap___aeabi_dcmpun>
|
|
100027ea: 2800 cmp r0, #0
|
|
100027ec: d000 beq.n 100027f0 <_etoa+0x2c>
|
|
100027ee: e0ec b.n 100029ca <_etoa+0x206>
|
|
100027f0: 2201 movs r2, #1
|
|
100027f2: 4252 negs r2, r2
|
|
100027f4: 4bd4 ldr r3, [pc, #848] @ (10002b48 <_etoa+0x384>)
|
|
100027f6: 0020 movs r0, r4
|
|
100027f8: 0029 movs r1, r5
|
|
100027fa: f001 fa01 bl 10003c00 <__wrap___aeabi_dcmpgt>
|
|
100027fe: 2800 cmp r0, #0
|
|
10002800: d000 beq.n 10002804 <_etoa+0x40>
|
|
10002802: e0e2 b.n 100029ca <_etoa+0x206>
|
|
10002804: 2201 movs r2, #1
|
|
10002806: 4252 negs r2, r2
|
|
10002808: 4bd0 ldr r3, [pc, #832] @ (10002b4c <_etoa+0x388>)
|
|
1000280a: 0020 movs r0, r4
|
|
1000280c: 0029 movs r1, r5
|
|
1000280e: f001 f9e1 bl 10003bd4 <__wrap___aeabi_dcmplt>
|
|
10002812: 2800 cmp r0, #0
|
|
10002814: d000 beq.n 10002818 <_etoa+0x54>
|
|
10002816: e0d8 b.n 100029ca <_etoa+0x206>
|
|
10002818: 2200 movs r2, #0
|
|
1000281a: 2300 movs r3, #0
|
|
1000281c: 0020 movs r0, r4
|
|
1000281e: 0029 movs r1, r5
|
|
10002820: f001 f9d8 bl 10003bd4 <__wrap___aeabi_dcmplt>
|
|
10002824: 2800 cmp r0, #0
|
|
10002826: d000 beq.n 1000282a <_etoa+0x66>
|
|
10002828: e0e4 b.n 100029f4 <_etoa+0x230>
|
|
1000282a: 9406 str r4, [sp, #24]
|
|
1000282c: 9507 str r5, [sp, #28]
|
|
1000282e: 2380 movs r3, #128 @ 0x80
|
|
10002830: 00db lsls r3, r3, #3
|
|
10002832: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002834: 401a ands r2, r3
|
|
10002836: 920d str r2, [sp, #52] @ 0x34
|
|
10002838: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
1000283a: 421a tst r2, r3
|
|
1000283c: d101 bne.n 10002842 <_etoa+0x7e>
|
|
1000283e: 2306 movs r3, #6
|
|
10002840: 931c str r3, [sp, #112] @ 0x70
|
|
10002842: 9806 ldr r0, [sp, #24]
|
|
10002844: 9907 ldr r1, [sp, #28]
|
|
10002846: 0002 movs r2, r0
|
|
10002848: 000b movs r3, r1
|
|
1000284a: 9208 str r2, [sp, #32]
|
|
1000284c: 9309 str r3, [sp, #36] @ 0x24
|
|
1000284e: 0003 movs r3, r0
|
|
10002850: 000a movs r2, r1
|
|
10002852: 4302 orrs r2, r0
|
|
10002854: d100 bne.n 10002858 <_etoa+0x94>
|
|
10002856: e0d9 b.n 10002a0c <_etoa+0x248>
|
|
10002858: 0d08 lsrs r0, r1, #20
|
|
1000285a: 0540 lsls r0, r0, #21
|
|
1000285c: 0d40 lsrs r0, r0, #21
|
|
1000285e: 4ebc ldr r6, [pc, #752] @ (10002b50 <_etoa+0x38c>)
|
|
10002860: 46b4 mov ip, r6
|
|
10002862: 4460 add r0, ip
|
|
10002864: 030a lsls r2, r1, #12
|
|
10002866: 0b12 lsrs r2, r2, #12
|
|
10002868: 001e movs r6, r3
|
|
1000286a: 4bba ldr r3, [pc, #744] @ (10002b54 <_etoa+0x390>)
|
|
1000286c: 4313 orrs r3, r2
|
|
1000286e: 001f movs r7, r3
|
|
10002870: f001 f9de bl 10003c30 <__wrap___aeabi_i2d>
|
|
10002874: 4ab8 ldr r2, [pc, #736] @ (10002b58 <_etoa+0x394>)
|
|
10002876: 4bb9 ldr r3, [pc, #740] @ (10002b5c <_etoa+0x398>)
|
|
10002878: f001 f969 bl 10003b4e <__wrap___aeabi_dmul>
|
|
1000287c: 4ab8 ldr r2, [pc, #736] @ (10002b60 <_etoa+0x39c>)
|
|
1000287e: 4bb9 ldr r3, [pc, #740] @ (10002b64 <_etoa+0x3a0>)
|
|
10002880: f001 f93e bl 10003b00 <__wrap___aeabi_dadd>
|
|
10002884: 9008 str r0, [sp, #32]
|
|
10002886: 9109 str r1, [sp, #36] @ 0x24
|
|
10002888: 2200 movs r2, #0
|
|
1000288a: 4bb7 ldr r3, [pc, #732] @ (10002b68 <_etoa+0x3a4>)
|
|
1000288c: 0030 movs r0, r6
|
|
1000288e: 0039 movs r1, r7
|
|
10002890: f001 f92d bl 10003aee <__wrap___aeabi_dsub>
|
|
10002894: 4ab5 ldr r2, [pc, #724] @ (10002b6c <_etoa+0x3a8>)
|
|
10002896: 4bb6 ldr r3, [pc, #728] @ (10002b70 <_etoa+0x3ac>)
|
|
10002898: f001 f959 bl 10003b4e <__wrap___aeabi_dmul>
|
|
1000289c: 0002 movs r2, r0
|
|
1000289e: 000b movs r3, r1
|
|
100028a0: 9808 ldr r0, [sp, #32]
|
|
100028a2: 9909 ldr r1, [sp, #36] @ 0x24
|
|
100028a4: f001 f92c bl 10003b00 <__wrap___aeabi_dadd>
|
|
100028a8: f001 f9da bl 10003c60 <__wrap___aeabi_d2iz>
|
|
100028ac: 4683 mov fp, r0
|
|
100028ae: f001 f9bf bl 10003c30 <__wrap___aeabi_i2d>
|
|
100028b2: 0006 movs r6, r0
|
|
100028b4: 000f movs r7, r1
|
|
100028b6: 4aaf ldr r2, [pc, #700] @ (10002b74 <_etoa+0x3b0>)
|
|
100028b8: 4baf ldr r3, [pc, #700] @ (10002b78 <_etoa+0x3b4>)
|
|
100028ba: f001 f948 bl 10003b4e <__wrap___aeabi_dmul>
|
|
100028be: 2200 movs r2, #0
|
|
100028c0: 4bae ldr r3, [pc, #696] @ (10002b7c <_etoa+0x3b8>)
|
|
100028c2: f001 f91d bl 10003b00 <__wrap___aeabi_dadd>
|
|
100028c6: f001 f9cb bl 10003c60 <__wrap___aeabi_d2iz>
|
|
100028ca: 9008 str r0, [sp, #32]
|
|
100028cc: 4aac ldr r2, [pc, #688] @ (10002b80 <_etoa+0x3bc>)
|
|
100028ce: 4bad ldr r3, [pc, #692] @ (10002b84 <_etoa+0x3c0>)
|
|
100028d0: 0030 movs r0, r6
|
|
100028d2: 0039 movs r1, r7
|
|
100028d4: f001 f93b bl 10003b4e <__wrap___aeabi_dmul>
|
|
100028d8: 0006 movs r6, r0
|
|
100028da: 000f movs r7, r1
|
|
100028dc: 9808 ldr r0, [sp, #32]
|
|
100028de: f001 f9a7 bl 10003c30 <__wrap___aeabi_i2d>
|
|
100028e2: 4aa9 ldr r2, [pc, #676] @ (10002b88 <_etoa+0x3c4>)
|
|
100028e4: 4ba9 ldr r3, [pc, #676] @ (10002b8c <_etoa+0x3c8>)
|
|
100028e6: f001 f932 bl 10003b4e <__wrap___aeabi_dmul>
|
|
100028ea: 0002 movs r2, r0
|
|
100028ec: 000b movs r3, r1
|
|
100028ee: 0030 movs r0, r6
|
|
100028f0: 0039 movs r1, r7
|
|
100028f2: f001 f8fc bl 10003aee <__wrap___aeabi_dsub>
|
|
100028f6: 0006 movs r6, r0
|
|
100028f8: 000f movs r7, r1
|
|
100028fa: 0002 movs r2, r0
|
|
100028fc: 000b movs r3, r1
|
|
100028fe: f001 f926 bl 10003b4e <__wrap___aeabi_dmul>
|
|
10002902: 900a str r0, [sp, #40] @ 0x28
|
|
10002904: 910b str r1, [sp, #44] @ 0x2c
|
|
10002906: 9b08 ldr r3, [sp, #32]
|
|
10002908: 4aa1 ldr r2, [pc, #644] @ (10002b90 <_etoa+0x3cc>)
|
|
1000290a: 4694 mov ip, r2
|
|
1000290c: 4463 add r3, ip
|
|
1000290e: 2100 movs r1, #0
|
|
10002910: 2200 movs r2, #0
|
|
10002912: 9108 str r1, [sp, #32]
|
|
10002914: 9209 str r2, [sp, #36] @ 0x24
|
|
10002916: 051b lsls r3, r3, #20
|
|
10002918: 9309 str r3, [sp, #36] @ 0x24
|
|
1000291a: 2300 movs r3, #0
|
|
1000291c: 9308 str r3, [sp, #32]
|
|
1000291e: 0032 movs r2, r6
|
|
10002920: 003b movs r3, r7
|
|
10002922: 0030 movs r0, r6
|
|
10002924: 0039 movs r1, r7
|
|
10002926: f001 f8eb bl 10003b00 <__wrap___aeabi_dadd>
|
|
1000292a: 900e str r0, [sp, #56] @ 0x38
|
|
1000292c: 910f str r1, [sp, #60] @ 0x3c
|
|
1000292e: 0032 movs r2, r6
|
|
10002930: 003b movs r3, r7
|
|
10002932: 2000 movs r0, #0
|
|
10002934: 2180 movs r1, #128 @ 0x80
|
|
10002936: 05c9 lsls r1, r1, #23
|
|
10002938: f001 f8d9 bl 10003aee <__wrap___aeabi_dsub>
|
|
1000293c: 0006 movs r6, r0
|
|
1000293e: 000f movs r7, r1
|
|
10002940: 2200 movs r2, #0
|
|
10002942: 4b94 ldr r3, [pc, #592] @ (10002b94 <_etoa+0x3d0>)
|
|
10002944: 980a ldr r0, [sp, #40] @ 0x28
|
|
10002946: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002948: f001 f8e3 bl 10003b12 <__wrap___aeabi_ddiv>
|
|
1000294c: 2200 movs r2, #0
|
|
1000294e: 4b92 ldr r3, [pc, #584] @ (10002b98 <_etoa+0x3d4>)
|
|
10002950: f001 f8d6 bl 10003b00 <__wrap___aeabi_dadd>
|
|
10002954: 0002 movs r2, r0
|
|
10002956: 000b movs r3, r1
|
|
10002958: 980a ldr r0, [sp, #40] @ 0x28
|
|
1000295a: 990b ldr r1, [sp, #44] @ 0x2c
|
|
1000295c: f001 f8d9 bl 10003b12 <__wrap___aeabi_ddiv>
|
|
10002960: 2200 movs r2, #0
|
|
10002962: 4b8e ldr r3, [pc, #568] @ (10002b9c <_etoa+0x3d8>)
|
|
10002964: f001 f8cc bl 10003b00 <__wrap___aeabi_dadd>
|
|
10002968: 0002 movs r2, r0
|
|
1000296a: 000b movs r3, r1
|
|
1000296c: 980a ldr r0, [sp, #40] @ 0x28
|
|
1000296e: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002970: f001 f8cf bl 10003b12 <__wrap___aeabi_ddiv>
|
|
10002974: 0002 movs r2, r0
|
|
10002976: 000b movs r3, r1
|
|
10002978: 0030 movs r0, r6
|
|
1000297a: 0039 movs r1, r7
|
|
1000297c: f001 f8c0 bl 10003b00 <__wrap___aeabi_dadd>
|
|
10002980: 0002 movs r2, r0
|
|
10002982: 000b movs r3, r1
|
|
10002984: 980e ldr r0, [sp, #56] @ 0x38
|
|
10002986: 990f ldr r1, [sp, #60] @ 0x3c
|
|
10002988: f001 f8c3 bl 10003b12 <__wrap___aeabi_ddiv>
|
|
1000298c: 2200 movs r2, #0
|
|
1000298e: 4b71 ldr r3, [pc, #452] @ (10002b54 <_etoa+0x390>)
|
|
10002990: f001 f8b6 bl 10003b00 <__wrap___aeabi_dadd>
|
|
10002994: 9a08 ldr r2, [sp, #32]
|
|
10002996: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002998: f001 f8d9 bl 10003b4e <__wrap___aeabi_dmul>
|
|
1000299c: 0006 movs r6, r0
|
|
1000299e: 000f movs r7, r1
|
|
100029a0: 9608 str r6, [sp, #32]
|
|
100029a2: 9709 str r7, [sp, #36] @ 0x24
|
|
100029a4: 9a06 ldr r2, [sp, #24]
|
|
100029a6: 9b07 ldr r3, [sp, #28]
|
|
100029a8: f001 f92a bl 10003c00 <__wrap___aeabi_dcmpgt>
|
|
100029ac: 2800 cmp r0, #0
|
|
100029ae: d02f beq.n 10002a10 <_etoa+0x24c>
|
|
100029b0: 2301 movs r3, #1
|
|
100029b2: 425b negs r3, r3
|
|
100029b4: 469c mov ip, r3
|
|
100029b6: 44e3 add fp, ip
|
|
100029b8: 2200 movs r2, #0
|
|
100029ba: 4b77 ldr r3, [pc, #476] @ (10002b98 <_etoa+0x3d4>)
|
|
100029bc: 0030 movs r0, r6
|
|
100029be: 0039 movs r1, r7
|
|
100029c0: f001 f8a7 bl 10003b12 <__wrap___aeabi_ddiv>
|
|
100029c4: 9008 str r0, [sp, #32]
|
|
100029c6: 9109 str r1, [sp, #36] @ 0x24
|
|
100029c8: e022 b.n 10002a10 <_etoa+0x24c>
|
|
100029ca: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
100029cc: 9304 str r3, [sp, #16]
|
|
100029ce: 9b1d ldr r3, [sp, #116] @ 0x74
|
|
100029d0: 9303 str r3, [sp, #12]
|
|
100029d2: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
100029d4: 9302 str r3, [sp, #8]
|
|
100029d6: 9400 str r4, [sp, #0]
|
|
100029d8: 9501 str r5, [sp, #4]
|
|
100029da: 4653 mov r3, sl
|
|
100029dc: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
100029de: 4649 mov r1, r9
|
|
100029e0: 4640 mov r0, r8
|
|
100029e2: f000 f8ff bl 10002be4 <_ftoa>
|
|
100029e6: b011 add sp, #68 @ 0x44
|
|
100029e8: bcf0 pop {r4, r5, r6, r7}
|
|
100029ea: 46bb mov fp, r7
|
|
100029ec: 46b2 mov sl, r6
|
|
100029ee: 46a9 mov r9, r5
|
|
100029f0: 46a0 mov r8, r4
|
|
100029f2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100029f4: 2100 movs r1, #0
|
|
100029f6: 2200 movs r2, #0
|
|
100029f8: 9106 str r1, [sp, #24]
|
|
100029fa: 9207 str r2, [sp, #28]
|
|
100029fc: 9406 str r4, [sp, #24]
|
|
100029fe: 2380 movs r3, #128 @ 0x80
|
|
10002a00: 061b lsls r3, r3, #24
|
|
10002a02: 469c mov ip, r3
|
|
10002a04: 44ac add ip, r5
|
|
10002a06: 4663 mov r3, ip
|
|
10002a08: 9307 str r3, [sp, #28]
|
|
10002a0a: e710 b.n 1000282e <_etoa+0x6a>
|
|
10002a0c: 2300 movs r3, #0
|
|
10002a0e: 469b mov fp, r3
|
|
10002a10: 465b mov r3, fp
|
|
10002a12: 3363 adds r3, #99 @ 0x63
|
|
10002a14: 2bc6 cmp r3, #198 @ 0xc6
|
|
10002a16: d820 bhi.n 10002a5a <_etoa+0x296>
|
|
10002a18: 2604 movs r6, #4
|
|
10002a1a: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002a1c: 051b lsls r3, r3, #20
|
|
10002a1e: d528 bpl.n 10002a72 <_etoa+0x2ae>
|
|
10002a20: 9a08 ldr r2, [sp, #32]
|
|
10002a22: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002a24: 0019 movs r1, r3
|
|
10002a26: 4311 orrs r1, r2
|
|
10002a28: d00f beq.n 10002a4a <_etoa+0x286>
|
|
10002a2a: 4a5d ldr r2, [pc, #372] @ (10002ba0 <_etoa+0x3dc>)
|
|
10002a2c: 4b5d ldr r3, [pc, #372] @ (10002ba4 <_etoa+0x3e0>)
|
|
10002a2e: 9806 ldr r0, [sp, #24]
|
|
10002a30: 9907 ldr r1, [sp, #28]
|
|
10002a32: f001 f8dd bl 10003bf0 <__wrap___aeabi_dcmpge>
|
|
10002a36: 2800 cmp r0, #0
|
|
10002a38: d07a beq.n 10002b30 <_etoa+0x36c>
|
|
10002a3a: 2200 movs r2, #0
|
|
10002a3c: 4b5a ldr r3, [pc, #360] @ (10002ba8 <_etoa+0x3e4>)
|
|
10002a3e: 9806 ldr r0, [sp, #24]
|
|
10002a40: 9907 ldr r1, [sp, #28]
|
|
10002a42: f001 f8c7 bl 10003bd4 <__wrap___aeabi_dcmplt>
|
|
10002a46: 2800 cmp r0, #0
|
|
10002a48: d072 beq.n 10002b30 <_etoa+0x36c>
|
|
10002a4a: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002a4c: 455b cmp r3, fp
|
|
10002a4e: dd06 ble.n 10002a5e <_etoa+0x29a>
|
|
10002a50: 465a mov r2, fp
|
|
10002a52: 1a9b subs r3, r3, r2
|
|
10002a54: 3b01 subs r3, #1
|
|
10002a56: 931c str r3, [sp, #112] @ 0x70
|
|
10002a58: e003 b.n 10002a62 <_etoa+0x29e>
|
|
10002a5a: 2605 movs r6, #5
|
|
10002a5c: e7dd b.n 10002a1a <_etoa+0x256>
|
|
10002a5e: 2300 movs r3, #0
|
|
10002a60: 931c str r3, [sp, #112] @ 0x70
|
|
10002a62: 2380 movs r3, #128 @ 0x80
|
|
10002a64: 00db lsls r3, r3, #3
|
|
10002a66: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002a68: 431a orrs r2, r3
|
|
10002a6a: 921e str r2, [sp, #120] @ 0x78
|
|
10002a6c: 2600 movs r6, #0
|
|
10002a6e: 2300 movs r3, #0
|
|
10002a70: 469b mov fp, r3
|
|
10002a72: 9b1d ldr r3, [sp, #116] @ 0x74
|
|
10002a74: 429e cmp r6, r3
|
|
10002a76: d265 bcs.n 10002b44 <_etoa+0x380>
|
|
10002a78: 1b9f subs r7, r3, r6
|
|
10002a7a: 2302 movs r3, #2
|
|
10002a7c: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002a7e: 401a ands r2, r3
|
|
10002a80: 920a str r2, [sp, #40] @ 0x28
|
|
10002a82: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002a84: 4213 tst r3, r2
|
|
10002a86: d002 beq.n 10002a8e <_etoa+0x2ca>
|
|
10002a88: 2e00 cmp r6, #0
|
|
10002a8a: d000 beq.n 10002a8e <_etoa+0x2ca>
|
|
10002a8c: 2700 movs r7, #0
|
|
10002a8e: 465b mov r3, fp
|
|
10002a90: 2b00 cmp r3, #0
|
|
10002a92: d007 beq.n 10002aa4 <_etoa+0x2e0>
|
|
10002a94: 9a08 ldr r2, [sp, #32]
|
|
10002a96: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002a98: 9806 ldr r0, [sp, #24]
|
|
10002a9a: 9907 ldr r1, [sp, #28]
|
|
10002a9c: f001 f839 bl 10003b12 <__wrap___aeabi_ddiv>
|
|
10002aa0: 9006 str r0, [sp, #24]
|
|
10002aa2: 9107 str r1, [sp, #28]
|
|
10002aa4: 2200 movs r2, #0
|
|
10002aa6: 2300 movs r3, #0
|
|
10002aa8: 0020 movs r0, r4
|
|
10002aaa: 0029 movs r1, r5
|
|
10002aac: f001 f892 bl 10003bd4 <__wrap___aeabi_dcmplt>
|
|
10002ab0: 2800 cmp r0, #0
|
|
10002ab2: d000 beq.n 10002ab6 <_etoa+0x2f2>
|
|
10002ab4: e07c b.n 10002bb0 <_etoa+0x3ec>
|
|
10002ab6: 4b3d ldr r3, [pc, #244] @ (10002bac <_etoa+0x3e8>)
|
|
10002ab8: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002aba: 4013 ands r3, r2
|
|
10002abc: 9304 str r3, [sp, #16]
|
|
10002abe: 9703 str r7, [sp, #12]
|
|
10002ac0: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002ac2: 9302 str r3, [sp, #8]
|
|
10002ac4: 9b06 ldr r3, [sp, #24]
|
|
10002ac6: 9c07 ldr r4, [sp, #28]
|
|
10002ac8: 9300 str r3, [sp, #0]
|
|
10002aca: 9401 str r4, [sp, #4]
|
|
10002acc: 4653 mov r3, sl
|
|
10002ace: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10002ad0: 4649 mov r1, r9
|
|
10002ad2: 4640 mov r0, r8
|
|
10002ad4: f000 f886 bl 10002be4 <_ftoa>
|
|
10002ad8: 2e00 cmp r6, #0
|
|
10002ada: d100 bne.n 10002ade <_etoa+0x31a>
|
|
10002adc: e783 b.n 100029e6 <_etoa+0x222>
|
|
10002ade: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002ae0: 069b lsls r3, r3, #26
|
|
10002ae2: d571 bpl.n 10002bc8 <_etoa+0x404>
|
|
10002ae4: 2545 movs r5, #69 @ 0x45
|
|
10002ae6: 1c44 adds r4, r0, #1
|
|
10002ae8: 4653 mov r3, sl
|
|
10002aea: 0002 movs r2, r0
|
|
10002aec: 4649 mov r1, r9
|
|
10002aee: 0028 movs r0, r5
|
|
10002af0: 47c0 blx r8
|
|
10002af2: 465a mov r2, fp
|
|
10002af4: 17d3 asrs r3, r2, #31
|
|
10002af6: 18d2 adds r2, r2, r3
|
|
10002af8: 405a eors r2, r3
|
|
10002afa: 2305 movs r3, #5
|
|
10002afc: 9305 str r3, [sp, #20]
|
|
10002afe: 3e01 subs r6, #1
|
|
10002b00: 9604 str r6, [sp, #16]
|
|
10002b02: 2300 movs r3, #0
|
|
10002b04: 9303 str r3, [sp, #12]
|
|
10002b06: 330a adds r3, #10
|
|
10002b08: 9302 str r3, [sp, #8]
|
|
10002b0a: 465b mov r3, fp
|
|
10002b0c: 0fdb lsrs r3, r3, #31
|
|
10002b0e: 9301 str r3, [sp, #4]
|
|
10002b10: 9200 str r2, [sp, #0]
|
|
10002b12: 4653 mov r3, sl
|
|
10002b14: 0022 movs r2, r4
|
|
10002b16: 4649 mov r1, r9
|
|
10002b18: 4640 mov r0, r8
|
|
10002b1a: f7ff fd6e bl 100025fa <_ntoa_long>
|
|
10002b1e: 9b0a ldr r3, [sp, #40] @ 0x28
|
|
10002b20: 2b00 cmp r3, #0
|
|
10002b22: d100 bne.n 10002b26 <_etoa+0x362>
|
|
10002b24: e75f b.n 100029e6 <_etoa+0x222>
|
|
10002b26: 0002 movs r2, r0
|
|
10002b28: 4647 mov r7, r8
|
|
10002b2a: 9e0c ldr r6, [sp, #48] @ 0x30
|
|
10002b2c: 9d1d ldr r5, [sp, #116] @ 0x74
|
|
10002b2e: e053 b.n 10002bd8 <_etoa+0x414>
|
|
10002b30: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002b32: 2b00 cmp r3, #0
|
|
10002b34: d09d beq.n 10002a72 <_etoa+0x2ae>
|
|
10002b36: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10002b38: 2b00 cmp r3, #0
|
|
10002b3a: d09a beq.n 10002a72 <_etoa+0x2ae>
|
|
10002b3c: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002b3e: 3b01 subs r3, #1
|
|
10002b40: 931c str r3, [sp, #112] @ 0x70
|
|
10002b42: e796 b.n 10002a72 <_etoa+0x2ae>
|
|
10002b44: 2700 movs r7, #0
|
|
10002b46: e798 b.n 10002a7a <_etoa+0x2b6>
|
|
10002b48: 7fefffff .word 0x7fefffff
|
|
10002b4c: ffefffff .word 0xffefffff
|
|
10002b50: fffffc01 .word 0xfffffc01
|
|
10002b54: 3ff00000 .word 0x3ff00000
|
|
10002b58: 509f79fb .word 0x509f79fb
|
|
10002b5c: 3fd34413 .word 0x3fd34413
|
|
10002b60: 8b60c8b3 .word 0x8b60c8b3
|
|
10002b64: 3fc68a28 .word 0x3fc68a28
|
|
10002b68: 3ff80000 .word 0x3ff80000
|
|
10002b6c: 636f4361 .word 0x636f4361
|
|
10002b70: 3fd287a7 .word 0x3fd287a7
|
|
10002b74: 0979a371 .word 0x0979a371
|
|
10002b78: 400a934f .word 0x400a934f
|
|
10002b7c: 3fe00000 .word 0x3fe00000
|
|
10002b80: bbb55516 .word 0xbbb55516
|
|
10002b84: 40026bb1 .word 0x40026bb1
|
|
10002b88: fefa39ef .word 0xfefa39ef
|
|
10002b8c: 3fe62e42 .word 0x3fe62e42
|
|
10002b90: 000003ff .word 0x000003ff
|
|
10002b94: 402c0000 .word 0x402c0000
|
|
10002b98: 40240000 .word 0x40240000
|
|
10002b9c: 40180000 .word 0x40180000
|
|
10002ba0: eb1c432d .word 0xeb1c432d
|
|
10002ba4: 3f1a36e2 .word 0x3f1a36e2
|
|
10002ba8: 412e8480 .word 0x412e8480
|
|
10002bac: fffff7ff .word 0xfffff7ff
|
|
10002bb0: 9c06 ldr r4, [sp, #24]
|
|
10002bb2: 9d07 ldr r5, [sp, #28]
|
|
10002bb4: 0022 movs r2, r4
|
|
10002bb6: 0029 movs r1, r5
|
|
10002bb8: 2080 movs r0, #128 @ 0x80
|
|
10002bba: 0600 lsls r0, r0, #24
|
|
10002bbc: 4684 mov ip, r0
|
|
10002bbe: 4461 add r1, ip
|
|
10002bc0: 000b movs r3, r1
|
|
10002bc2: 9206 str r2, [sp, #24]
|
|
10002bc4: 9307 str r3, [sp, #28]
|
|
10002bc6: e776 b.n 10002ab6 <_etoa+0x2f2>
|
|
10002bc8: 2565 movs r5, #101 @ 0x65
|
|
10002bca: e78c b.n 10002ae6 <_etoa+0x322>
|
|
10002bcc: 1c54 adds r4, r2, #1
|
|
10002bce: 4653 mov r3, sl
|
|
10002bd0: 4649 mov r1, r9
|
|
10002bd2: 2020 movs r0, #32
|
|
10002bd4: 47b8 blx r7
|
|
10002bd6: 0022 movs r2, r4
|
|
10002bd8: 1b93 subs r3, r2, r6
|
|
10002bda: 42ab cmp r3, r5
|
|
10002bdc: d3f6 bcc.n 10002bcc <_etoa+0x408>
|
|
10002bde: 0010 movs r0, r2
|
|
10002be0: e701 b.n 100029e6 <_etoa+0x222>
|
|
10002be2: 46c0 nop @ (mov r8, r8)
|
|
|
|
10002be4 <_ftoa>:
|
|
10002be4: b5f0 push {r4, r5, r6, r7, lr}
|
|
10002be6: 46de mov lr, fp
|
|
10002be8: 4657 mov r7, sl
|
|
10002bea: 464e mov r6, r9
|
|
10002bec: 4645 mov r5, r8
|
|
10002bee: b5e0 push {r5, r6, r7, lr}
|
|
10002bf0: b095 sub sp, #84 @ 0x54
|
|
10002bf2: 9006 str r0, [sp, #24]
|
|
10002bf4: 9107 str r1, [sp, #28]
|
|
10002bf6: 4693 mov fp, r2
|
|
10002bf8: 4699 mov r9, r3
|
|
10002bfa: 9f20 ldr r7, [sp, #128] @ 0x80
|
|
10002bfc: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002bfe: 9b1f ldr r3, [sp, #124] @ 0x7c
|
|
10002c00: 0010 movs r0, r2
|
|
10002c02: 0019 movs r1, r3
|
|
10002c04: f001 f801 bl 10003c0a <__wrap___aeabi_dcmpun>
|
|
10002c08: 2800 cmp r0, #0
|
|
10002c0a: d131 bne.n 10002c70 <_ftoa+0x8c>
|
|
10002c0c: 2201 movs r2, #1
|
|
10002c0e: 4252 negs r2, r2
|
|
10002c10: 4bbf ldr r3, [pc, #764] @ (10002f10 <_ftoa+0x32c>)
|
|
10002c12: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002c14: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002c16: f000 ffdd bl 10003bd4 <__wrap___aeabi_dcmplt>
|
|
10002c1a: 2800 cmp r0, #0
|
|
10002c1c: d137 bne.n 10002c8e <_ftoa+0xaa>
|
|
10002c1e: 2201 movs r2, #1
|
|
10002c20: 4252 negs r2, r2
|
|
10002c22: 4bbc ldr r3, [pc, #752] @ (10002f14 <_ftoa+0x330>)
|
|
10002c24: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002c26: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002c28: f000 ffea bl 10003c00 <__wrap___aeabi_dcmpgt>
|
|
10002c2c: 2800 cmp r0, #0
|
|
10002c2e: d13d bne.n 10002cac <_ftoa+0xc8>
|
|
10002c30: 2200 movs r2, #0
|
|
10002c32: 4bb9 ldr r3, [pc, #740] @ (10002f18 <_ftoa+0x334>)
|
|
10002c34: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002c36: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002c38: f000 ffe2 bl 10003c00 <__wrap___aeabi_dcmpgt>
|
|
10002c3c: 2800 cmp r0, #0
|
|
10002c3e: d150 bne.n 10002ce2 <_ftoa+0xfe>
|
|
10002c40: 2200 movs r2, #0
|
|
10002c42: 4bb6 ldr r3, [pc, #728] @ (10002f1c <_ftoa+0x338>)
|
|
10002c44: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002c46: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002c48: f000 ffc4 bl 10003bd4 <__wrap___aeabi_dcmplt>
|
|
10002c4c: 2800 cmp r0, #0
|
|
10002c4e: d148 bne.n 10002ce2 <_ftoa+0xfe>
|
|
10002c50: 2200 movs r2, #0
|
|
10002c52: 2300 movs r3, #0
|
|
10002c54: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002c56: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002c58: f000 ffbc bl 10003bd4 <__wrap___aeabi_dcmplt>
|
|
10002c5c: 2800 cmp r0, #0
|
|
10002c5e: d150 bne.n 10002d02 <_ftoa+0x11e>
|
|
10002c60: 2300 movs r3, #0
|
|
10002c62: 4698 mov r8, r3
|
|
10002c64: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002c66: 055b lsls r3, r3, #21
|
|
10002c68: d400 bmi.n 10002c6c <_ftoa+0x88>
|
|
10002c6a: e0b6 b.n 10002dda <_ftoa+0x1f6>
|
|
10002c6c: 2400 movs r4, #0
|
|
10002c6e: e058 b.n 10002d22 <_ftoa+0x13e>
|
|
10002c70: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002c72: 9303 str r3, [sp, #12]
|
|
10002c74: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002c76: 9302 str r3, [sp, #8]
|
|
10002c78: 2303 movs r3, #3
|
|
10002c7a: 9301 str r3, [sp, #4]
|
|
10002c7c: 4ba8 ldr r3, [pc, #672] @ (10002f20 <_ftoa+0x33c>)
|
|
10002c7e: 9300 str r3, [sp, #0]
|
|
10002c80: 464b mov r3, r9
|
|
10002c82: 465a mov r2, fp
|
|
10002c84: 9907 ldr r1, [sp, #28]
|
|
10002c86: 9806 ldr r0, [sp, #24]
|
|
10002c88: f7ff fbd8 bl 1000243c <_out_rev>
|
|
10002c8c: e10e b.n 10002eac <_ftoa+0x2c8>
|
|
10002c8e: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002c90: 9303 str r3, [sp, #12]
|
|
10002c92: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002c94: 9302 str r3, [sp, #8]
|
|
10002c96: 2304 movs r3, #4
|
|
10002c98: 9301 str r3, [sp, #4]
|
|
10002c9a: 4ba2 ldr r3, [pc, #648] @ (10002f24 <_ftoa+0x340>)
|
|
10002c9c: 9300 str r3, [sp, #0]
|
|
10002c9e: 464b mov r3, r9
|
|
10002ca0: 465a mov r2, fp
|
|
10002ca2: 9907 ldr r1, [sp, #28]
|
|
10002ca4: 9806 ldr r0, [sp, #24]
|
|
10002ca6: f7ff fbc9 bl 1000243c <_out_rev>
|
|
10002caa: e0ff b.n 10002eac <_ftoa+0x2c8>
|
|
10002cac: 2304 movs r3, #4
|
|
10002cae: 9a22 ldr r2, [sp, #136] @ 0x88
|
|
10002cb0: 401a ands r2, r3
|
|
10002cb2: 9922 ldr r1, [sp, #136] @ 0x88
|
|
10002cb4: 420b tst r3, r1
|
|
10002cb6: d010 beq.n 10002cda <_ftoa+0xf6>
|
|
10002cb8: 4b9b ldr r3, [pc, #620] @ (10002f28 <_ftoa+0x344>)
|
|
10002cba: 2a00 cmp r2, #0
|
|
10002cbc: d00f beq.n 10002cde <_ftoa+0xfa>
|
|
10002cbe: 2204 movs r2, #4
|
|
10002cc0: 9922 ldr r1, [sp, #136] @ 0x88
|
|
10002cc2: 9103 str r1, [sp, #12]
|
|
10002cc4: 9921 ldr r1, [sp, #132] @ 0x84
|
|
10002cc6: 9102 str r1, [sp, #8]
|
|
10002cc8: 9201 str r2, [sp, #4]
|
|
10002cca: 9300 str r3, [sp, #0]
|
|
10002ccc: 464b mov r3, r9
|
|
10002cce: 465a mov r2, fp
|
|
10002cd0: 9907 ldr r1, [sp, #28]
|
|
10002cd2: 9806 ldr r0, [sp, #24]
|
|
10002cd4: f7ff fbb2 bl 1000243c <_out_rev>
|
|
10002cd8: e0e8 b.n 10002eac <_ftoa+0x2c8>
|
|
10002cda: 4b94 ldr r3, [pc, #592] @ (10002f2c <_ftoa+0x348>)
|
|
10002cdc: e7ed b.n 10002cba <_ftoa+0xd6>
|
|
10002cde: 2203 movs r2, #3
|
|
10002ce0: e7ee b.n 10002cc0 <_ftoa+0xdc>
|
|
10002ce2: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002ce4: 9304 str r3, [sp, #16]
|
|
10002ce6: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002ce8: 9303 str r3, [sp, #12]
|
|
10002cea: 9702 str r7, [sp, #8]
|
|
10002cec: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002cee: 9c1f ldr r4, [sp, #124] @ 0x7c
|
|
10002cf0: 9300 str r3, [sp, #0]
|
|
10002cf2: 9401 str r4, [sp, #4]
|
|
10002cf4: 464b mov r3, r9
|
|
10002cf6: 465a mov r2, fp
|
|
10002cf8: 9907 ldr r1, [sp, #28]
|
|
10002cfa: 9806 ldr r0, [sp, #24]
|
|
10002cfc: f7ff fd62 bl 100027c4 <_etoa>
|
|
10002d00: e0d4 b.n 10002eac <_ftoa+0x2c8>
|
|
10002d02: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002d04: 9b1f ldr r3, [sp, #124] @ 0x7c
|
|
10002d06: 2000 movs r0, #0
|
|
10002d08: 2100 movs r1, #0
|
|
10002d0a: f000 fef0 bl 10003aee <__wrap___aeabi_dsub>
|
|
10002d0e: 901e str r0, [sp, #120] @ 0x78
|
|
10002d10: 911f str r1, [sp, #124] @ 0x7c
|
|
10002d12: 2301 movs r3, #1
|
|
10002d14: 4698 mov r8, r3
|
|
10002d16: e7a5 b.n 10002c64 <_ftoa+0x80>
|
|
10002d18: ab0c add r3, sp, #48 @ 0x30
|
|
10002d1a: 2230 movs r2, #48 @ 0x30
|
|
10002d1c: 551a strb r2, [r3, r4]
|
|
10002d1e: 3f01 subs r7, #1
|
|
10002d20: 3401 adds r4, #1
|
|
10002d22: 2c1f cmp r4, #31
|
|
10002d24: d801 bhi.n 10002d2a <_ftoa+0x146>
|
|
10002d26: 2f09 cmp r7, #9
|
|
10002d28: d8f6 bhi.n 10002d18 <_ftoa+0x134>
|
|
10002d2a: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002d2c: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002d2e: f000 ff97 bl 10003c60 <__wrap___aeabi_d2iz>
|
|
10002d32: 0005 movs r5, r0
|
|
10002d34: f000 ff7c bl 10003c30 <__wrap___aeabi_i2d>
|
|
10002d38: 0002 movs r2, r0
|
|
10002d3a: 000b movs r3, r1
|
|
10002d3c: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002d3e: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002d40: f000 fed5 bl 10003aee <__wrap___aeabi_dsub>
|
|
10002d44: 4b7a ldr r3, [pc, #488] @ (10002f30 <_ftoa+0x34c>)
|
|
10002d46: 00fa lsls r2, r7, #3
|
|
10002d48: 189b adds r3, r3, r2
|
|
10002d4a: 681a ldr r2, [r3, #0]
|
|
10002d4c: 685b ldr r3, [r3, #4]
|
|
10002d4e: 920a str r2, [sp, #40] @ 0x28
|
|
10002d50: 930b str r3, [sp, #44] @ 0x2c
|
|
10002d52: f000 fefc bl 10003b4e <__wrap___aeabi_dmul>
|
|
10002d56: 9008 str r0, [sp, #32]
|
|
10002d58: 9109 str r1, [sp, #36] @ 0x24
|
|
10002d5a: f000 ffa5 bl 10003ca8 <__wrap___aeabi_d2uiz>
|
|
10002d5e: 0006 movs r6, r0
|
|
10002d60: f000 ff62 bl 10003c28 <__wrap___aeabi_ui2d>
|
|
10002d64: 0002 movs r2, r0
|
|
10002d66: 000b movs r3, r1
|
|
10002d68: 9808 ldr r0, [sp, #32]
|
|
10002d6a: 9909 ldr r1, [sp, #36] @ 0x24
|
|
10002d6c: f000 febf bl 10003aee <__wrap___aeabi_dsub>
|
|
10002d70: 9008 str r0, [sp, #32]
|
|
10002d72: 9109 str r1, [sp, #36] @ 0x24
|
|
10002d74: 2200 movs r2, #0
|
|
10002d76: 4b6f ldr r3, [pc, #444] @ (10002f34 <_ftoa+0x350>)
|
|
10002d78: f000 ff42 bl 10003c00 <__wrap___aeabi_dcmpgt>
|
|
10002d7c: 2800 cmp r0, #0
|
|
10002d7e: d02e beq.n 10002dde <_ftoa+0x1fa>
|
|
10002d80: 3601 adds r6, #1
|
|
10002d82: 0030 movs r0, r6
|
|
10002d84: f000 ff50 bl 10003c28 <__wrap___aeabi_ui2d>
|
|
10002d88: 0002 movs r2, r0
|
|
10002d8a: 000b movs r3, r1
|
|
10002d8c: 980a ldr r0, [sp, #40] @ 0x28
|
|
10002d8e: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002d90: f000 ff26 bl 10003be0 <__wrap___aeabi_dcmple>
|
|
10002d94: 2800 cmp r0, #0
|
|
10002d96: d001 beq.n 10002d9c <_ftoa+0x1b8>
|
|
10002d98: 3501 adds r5, #1
|
|
10002d9a: 2600 movs r6, #0
|
|
10002d9c: 2f00 cmp r7, #0
|
|
10002d9e: d12c bne.n 10002dfa <_ftoa+0x216>
|
|
10002da0: 0028 movs r0, r5
|
|
10002da2: f000 ff45 bl 10003c30 <__wrap___aeabi_i2d>
|
|
10002da6: 0002 movs r2, r0
|
|
10002da8: 000b movs r3, r1
|
|
10002daa: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002dac: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002dae: f000 fe9e bl 10003aee <__wrap___aeabi_dsub>
|
|
10002db2: 0006 movs r6, r0
|
|
10002db4: 000f movs r7, r1
|
|
10002db6: 2200 movs r2, #0
|
|
10002db8: 4b5e ldr r3, [pc, #376] @ (10002f34 <_ftoa+0x350>)
|
|
10002dba: f000 ff0b bl 10003bd4 <__wrap___aeabi_dcmplt>
|
|
10002dbe: 2800 cmp r0, #0
|
|
10002dc0: d146 bne.n 10002e50 <_ftoa+0x26c>
|
|
10002dc2: 2200 movs r2, #0
|
|
10002dc4: 4b5b ldr r3, [pc, #364] @ (10002f34 <_ftoa+0x350>)
|
|
10002dc6: 0030 movs r0, r6
|
|
10002dc8: 0039 movs r1, r7
|
|
10002dca: f000 ff19 bl 10003c00 <__wrap___aeabi_dcmpgt>
|
|
10002dce: 2800 cmp r0, #0
|
|
10002dd0: d13e bne.n 10002e50 <_ftoa+0x26c>
|
|
10002dd2: 07eb lsls r3, r5, #31
|
|
10002dd4: d53c bpl.n 10002e50 <_ftoa+0x26c>
|
|
10002dd6: 3501 adds r5, #1
|
|
10002dd8: e03a b.n 10002e50 <_ftoa+0x26c>
|
|
10002dda: 2706 movs r7, #6
|
|
10002ddc: e746 b.n 10002c6c <_ftoa+0x88>
|
|
10002dde: 2200 movs r2, #0
|
|
10002de0: 4b54 ldr r3, [pc, #336] @ (10002f34 <_ftoa+0x350>)
|
|
10002de2: 9808 ldr r0, [sp, #32]
|
|
10002de4: 9909 ldr r1, [sp, #36] @ 0x24
|
|
10002de6: f000 fef5 bl 10003bd4 <__wrap___aeabi_dcmplt>
|
|
10002dea: 2800 cmp r0, #0
|
|
10002dec: d1d6 bne.n 10002d9c <_ftoa+0x1b8>
|
|
10002dee: 2e00 cmp r6, #0
|
|
10002df0: d001 beq.n 10002df6 <_ftoa+0x212>
|
|
10002df2: 07f3 lsls r3, r6, #31
|
|
10002df4: d5d2 bpl.n 10002d9c <_ftoa+0x1b8>
|
|
10002df6: 3601 adds r6, #1
|
|
10002df8: e7d0 b.n 10002d9c <_ftoa+0x1b8>
|
|
10002dfa: 46aa mov sl, r5
|
|
10002dfc: 2c1f cmp r4, #31
|
|
10002dfe: d811 bhi.n 10002e24 <_ftoa+0x240>
|
|
10002e00: 3f01 subs r7, #1
|
|
10002e02: 210a movs r1, #10
|
|
10002e04: 0030 movs r0, r6
|
|
10002e06: f000 fc37 bl 10003678 <__wrap___aeabi_uidiv>
|
|
10002e0a: 1c65 adds r5, r4, #1
|
|
10002e0c: 3130 adds r1, #48 @ 0x30
|
|
10002e0e: ab0c add r3, sp, #48 @ 0x30
|
|
10002e10: 5519 strb r1, [r3, r4]
|
|
10002e12: 210a movs r1, #10
|
|
10002e14: 0030 movs r0, r6
|
|
10002e16: f000 fc2f bl 10003678 <__wrap___aeabi_uidiv>
|
|
10002e1a: 2e09 cmp r6, #9
|
|
10002e1c: d90e bls.n 10002e3c <_ftoa+0x258>
|
|
10002e1e: 0006 movs r6, r0
|
|
10002e20: 002c movs r4, r5
|
|
10002e22: e7eb b.n 10002dfc <_ftoa+0x218>
|
|
10002e24: 4655 mov r5, sl
|
|
10002e26: 2c1f cmp r4, #31
|
|
10002e28: d80c bhi.n 10002e44 <_ftoa+0x260>
|
|
10002e2a: 1e7b subs r3, r7, #1
|
|
10002e2c: 2f00 cmp r7, #0
|
|
10002e2e: d009 beq.n 10002e44 <_ftoa+0x260>
|
|
10002e30: aa0c add r2, sp, #48 @ 0x30
|
|
10002e32: 2130 movs r1, #48 @ 0x30
|
|
10002e34: 5511 strb r1, [r2, r4]
|
|
10002e36: 001f movs r7, r3
|
|
10002e38: 3401 adds r4, #1
|
|
10002e3a: e7f4 b.n 10002e26 <_ftoa+0x242>
|
|
10002e3c: 002b movs r3, r5
|
|
10002e3e: 4655 mov r5, sl
|
|
10002e40: 001c movs r4, r3
|
|
10002e42: e7f0 b.n 10002e26 <_ftoa+0x242>
|
|
10002e44: 2c1f cmp r4, #31
|
|
10002e46: d803 bhi.n 10002e50 <_ftoa+0x26c>
|
|
10002e48: ab0c add r3, sp, #48 @ 0x30
|
|
10002e4a: 222e movs r2, #46 @ 0x2e
|
|
10002e4c: 551a strb r2, [r3, r4]
|
|
10002e4e: 3401 adds r4, #1
|
|
10002e50: 2c1f cmp r4, #31
|
|
10002e52: d810 bhi.n 10002e76 <_ftoa+0x292>
|
|
10002e54: 210a movs r1, #10
|
|
10002e56: 0028 movs r0, r5
|
|
10002e58: f000 fbe6 bl 10003628 <__wrap___aeabi_idiv>
|
|
10002e5c: 1c66 adds r6, r4, #1
|
|
10002e5e: 3130 adds r1, #48 @ 0x30
|
|
10002e60: ab0c add r3, sp, #48 @ 0x30
|
|
10002e62: 5519 strb r1, [r3, r4]
|
|
10002e64: 210a movs r1, #10
|
|
10002e66: 0028 movs r0, r5
|
|
10002e68: f000 fbde bl 10003628 <__wrap___aeabi_idiv>
|
|
10002e6c: 1e05 subs r5, r0, #0
|
|
10002e6e: d001 beq.n 10002e74 <_ftoa+0x290>
|
|
10002e70: 0034 movs r4, r6
|
|
10002e72: e7ed b.n 10002e50 <_ftoa+0x26c>
|
|
10002e74: 0034 movs r4, r6
|
|
10002e76: 2303 movs r3, #3
|
|
10002e78: 9a22 ldr r2, [sp, #136] @ 0x88
|
|
10002e7a: 4013 ands r3, r2
|
|
10002e7c: 2b01 cmp r3, #1
|
|
10002e7e: d01c beq.n 10002eba <_ftoa+0x2d6>
|
|
10002e80: 2c1f cmp r4, #31
|
|
10002e82: d806 bhi.n 10002e92 <_ftoa+0x2ae>
|
|
10002e84: 4643 mov r3, r8
|
|
10002e86: 2b00 cmp r3, #0
|
|
10002e88: d032 beq.n 10002ef0 <_ftoa+0x30c>
|
|
10002e8a: ab0c add r3, sp, #48 @ 0x30
|
|
10002e8c: 222d movs r2, #45 @ 0x2d
|
|
10002e8e: 551a strb r2, [r3, r4]
|
|
10002e90: 3401 adds r4, #1
|
|
10002e92: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002e94: 9303 str r3, [sp, #12]
|
|
10002e96: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002e98: 9302 str r3, [sp, #8]
|
|
10002e9a: 9401 str r4, [sp, #4]
|
|
10002e9c: ab0c add r3, sp, #48 @ 0x30
|
|
10002e9e: 9300 str r3, [sp, #0]
|
|
10002ea0: 464b mov r3, r9
|
|
10002ea2: 465a mov r2, fp
|
|
10002ea4: 9907 ldr r1, [sp, #28]
|
|
10002ea6: 9806 ldr r0, [sp, #24]
|
|
10002ea8: f7ff fac8 bl 1000243c <_out_rev>
|
|
10002eac: b015 add sp, #84 @ 0x54
|
|
10002eae: bcf0 pop {r4, r5, r6, r7}
|
|
10002eb0: 46bb mov fp, r7
|
|
10002eb2: 46b2 mov sl, r6
|
|
10002eb4: 46a9 mov r9, r5
|
|
10002eb6: 46a0 mov r8, r4
|
|
10002eb8: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10002eba: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002ebc: 2b00 cmp r3, #0
|
|
10002ebe: d013 beq.n 10002ee8 <_ftoa+0x304>
|
|
10002ec0: 4643 mov r3, r8
|
|
10002ec2: 2b00 cmp r3, #0
|
|
10002ec4: d102 bne.n 10002ecc <_ftoa+0x2e8>
|
|
10002ec6: 330c adds r3, #12
|
|
10002ec8: 4213 tst r3, r2
|
|
10002eca: d00f beq.n 10002eec <_ftoa+0x308>
|
|
10002ecc: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002ece: 3b01 subs r3, #1
|
|
10002ed0: 9321 str r3, [sp, #132] @ 0x84
|
|
10002ed2: 0019 movs r1, r3
|
|
10002ed4: e003 b.n 10002ede <_ftoa+0x2fa>
|
|
10002ed6: ab0c add r3, sp, #48 @ 0x30
|
|
10002ed8: 2230 movs r2, #48 @ 0x30
|
|
10002eda: 551a strb r2, [r3, r4]
|
|
10002edc: 3401 adds r4, #1
|
|
10002ede: 428c cmp r4, r1
|
|
10002ee0: d2ce bcs.n 10002e80 <_ftoa+0x29c>
|
|
10002ee2: 2c1f cmp r4, #31
|
|
10002ee4: d9f7 bls.n 10002ed6 <_ftoa+0x2f2>
|
|
10002ee6: e7cb b.n 10002e80 <_ftoa+0x29c>
|
|
10002ee8: 9921 ldr r1, [sp, #132] @ 0x84
|
|
10002eea: e7f8 b.n 10002ede <_ftoa+0x2fa>
|
|
10002eec: 9921 ldr r1, [sp, #132] @ 0x84
|
|
10002eee: e7f6 b.n 10002ede <_ftoa+0x2fa>
|
|
10002ef0: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002ef2: 075b lsls r3, r3, #29
|
|
10002ef4: d504 bpl.n 10002f00 <_ftoa+0x31c>
|
|
10002ef6: ab0c add r3, sp, #48 @ 0x30
|
|
10002ef8: 222b movs r2, #43 @ 0x2b
|
|
10002efa: 551a strb r2, [r3, r4]
|
|
10002efc: 3401 adds r4, #1
|
|
10002efe: e7c8 b.n 10002e92 <_ftoa+0x2ae>
|
|
10002f00: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002f02: 071b lsls r3, r3, #28
|
|
10002f04: d5c5 bpl.n 10002e92 <_ftoa+0x2ae>
|
|
10002f06: ab0c add r3, sp, #48 @ 0x30
|
|
10002f08: 2220 movs r2, #32
|
|
10002f0a: 551a strb r2, [r3, r4]
|
|
10002f0c: 3401 adds r4, #1
|
|
10002f0e: e7c0 b.n 10002e92 <_ftoa+0x2ae>
|
|
10002f10: ffefffff .word 0xffefffff
|
|
10002f14: 7fefffff .word 0x7fefffff
|
|
10002f18: 41cdcd65 .word 0x41cdcd65
|
|
10002f1c: c1cdcd65 .word 0xc1cdcd65
|
|
10002f20: 10006094 .word 0x10006094
|
|
10002f24: 10006098 .word 0x10006098
|
|
10002f28: 10006088 .word 0x10006088
|
|
10002f2c: 10006090 .word 0x10006090
|
|
10002f30: 10006240 .word 0x10006240
|
|
10002f34: 3fe00000 .word 0x3fe00000
|
|
|
|
10002f38 <_vsnprintf>:
|
|
10002f38: b5f0 push {r4, r5, r6, r7, lr}
|
|
10002f3a: 46de mov lr, fp
|
|
10002f3c: 4657 mov r7, sl
|
|
10002f3e: 464e mov r6, r9
|
|
10002f40: 4645 mov r5, r8
|
|
10002f42: b5e0 push {r5, r6, r7, lr}
|
|
10002f44: b093 sub sp, #76 @ 0x4c
|
|
10002f46: 4682 mov sl, r0
|
|
10002f48: 4688 mov r8, r1
|
|
10002f4a: 4693 mov fp, r2
|
|
10002f4c: 9311 str r3, [sp, #68] @ 0x44
|
|
10002f4e: 2900 cmp r1, #0
|
|
10002f50: d100 bne.n 10002f54 <_vsnprintf+0x1c>
|
|
10002f52: e30d b.n 10003570 <_vsnprintf+0x638>
|
|
10002f54: 2500 movs r5, #0
|
|
10002f56: 4656 mov r6, sl
|
|
10002f58: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10002f5a: 7818 ldrb r0, [r3, #0]
|
|
10002f5c: 2800 cmp r0, #0
|
|
10002f5e: d100 bne.n 10002f62 <_vsnprintf+0x2a>
|
|
10002f60: e309 b.n 10003576 <_vsnprintf+0x63e>
|
|
10002f62: 2825 cmp r0, #37 @ 0x25
|
|
10002f64: d009 beq.n 10002f7a <_vsnprintf+0x42>
|
|
10002f66: 1c6c adds r4, r5, #1
|
|
10002f68: 465b mov r3, fp
|
|
10002f6a: 002a movs r2, r5
|
|
10002f6c: 4641 mov r1, r8
|
|
10002f6e: 47b0 blx r6
|
|
10002f70: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10002f72: 3301 adds r3, #1
|
|
10002f74: 9311 str r3, [sp, #68] @ 0x44
|
|
10002f76: 0025 movs r5, r4
|
|
10002f78: e7ee b.n 10002f58 <_vsnprintf+0x20>
|
|
10002f7a: 3301 adds r3, #1
|
|
10002f7c: 9311 str r3, [sp, #68] @ 0x44
|
|
10002f7e: 2700 movs r7, #0
|
|
10002f80: e020 b.n 10002fc4 <_vsnprintf+0x8c>
|
|
10002f82: 2301 movs r3, #1
|
|
10002f84: 431f orrs r7, r3
|
|
10002f86: 3201 adds r2, #1
|
|
10002f88: 9211 str r2, [sp, #68] @ 0x44
|
|
10002f8a: 2401 movs r4, #1
|
|
10002f8c: e018 b.n 10002fc0 <_vsnprintf+0x88>
|
|
10002f8e: 2302 movs r3, #2
|
|
10002f90: 431f orrs r7, r3
|
|
10002f92: 3201 adds r2, #1
|
|
10002f94: 9211 str r2, [sp, #68] @ 0x44
|
|
10002f96: 2401 movs r4, #1
|
|
10002f98: e012 b.n 10002fc0 <_vsnprintf+0x88>
|
|
10002f9a: 2304 movs r3, #4
|
|
10002f9c: 431f orrs r7, r3
|
|
10002f9e: 3201 adds r2, #1
|
|
10002fa0: 9211 str r2, [sp, #68] @ 0x44
|
|
10002fa2: 2401 movs r4, #1
|
|
10002fa4: e00c b.n 10002fc0 <_vsnprintf+0x88>
|
|
10002fa6: 2308 movs r3, #8
|
|
10002fa8: 431f orrs r7, r3
|
|
10002faa: 3201 adds r2, #1
|
|
10002fac: 9211 str r2, [sp, #68] @ 0x44
|
|
10002fae: 2401 movs r4, #1
|
|
10002fb0: e006 b.n 10002fc0 <_vsnprintf+0x88>
|
|
10002fb2: 2310 movs r3, #16
|
|
10002fb4: 431f orrs r7, r3
|
|
10002fb6: 3201 adds r2, #1
|
|
10002fb8: 9211 str r2, [sp, #68] @ 0x44
|
|
10002fba: 2401 movs r4, #1
|
|
10002fbc: e000 b.n 10002fc0 <_vsnprintf+0x88>
|
|
10002fbe: 2400 movs r4, #0
|
|
10002fc0: 2c00 cmp r4, #0
|
|
10002fc2: d009 beq.n 10002fd8 <_vsnprintf+0xa0>
|
|
10002fc4: 9a11 ldr r2, [sp, #68] @ 0x44
|
|
10002fc6: 7813 ldrb r3, [r2, #0]
|
|
10002fc8: 3b20 subs r3, #32
|
|
10002fca: b2d9 uxtb r1, r3
|
|
10002fcc: 2910 cmp r1, #16
|
|
10002fce: d8f6 bhi.n 10002fbe <_vsnprintf+0x86>
|
|
10002fd0: 008b lsls r3, r1, #2
|
|
10002fd2: 49c8 ldr r1, [pc, #800] @ (100032f4 <_vsnprintf+0x3bc>)
|
|
10002fd4: 58cb ldr r3, [r1, r3]
|
|
10002fd6: 469f mov pc, r3
|
|
10002fd8: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10002fda: 781a ldrb r2, [r3, #0]
|
|
10002fdc: 0013 movs r3, r2
|
|
10002fde: 3b30 subs r3, #48 @ 0x30
|
|
10002fe0: b2db uxtb r3, r3
|
|
10002fe2: 2b09 cmp r3, #9
|
|
10002fe4: d910 bls.n 10003008 <_vsnprintf+0xd0>
|
|
10002fe6: 2a2a cmp r2, #42 @ 0x2a
|
|
10002fe8: d013 beq.n 10003012 <_vsnprintf+0xda>
|
|
10002fea: 940b str r4, [sp, #44] @ 0x2c
|
|
10002fec: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10002fee: 781a ldrb r2, [r3, #0]
|
|
10002ff0: 2a2e cmp r2, #46 @ 0x2e
|
|
10002ff2: d01e beq.n 10003032 <_vsnprintf+0xfa>
|
|
10002ff4: 9a11 ldr r2, [sp, #68] @ 0x44
|
|
10002ff6: 7813 ldrb r3, [r2, #0]
|
|
10002ff8: 3b68 subs r3, #104 @ 0x68
|
|
10002ffa: b2d9 uxtb r1, r3
|
|
10002ffc: 2912 cmp r1, #18
|
|
10002ffe: d859 bhi.n 100030b4 <_vsnprintf+0x17c>
|
|
10003000: 008b lsls r3, r1, #2
|
|
10003002: 49bd ldr r1, [pc, #756] @ (100032f8 <_vsnprintf+0x3c0>)
|
|
10003004: 58cb ldr r3, [r1, r3]
|
|
10003006: 469f mov pc, r3
|
|
10003008: a811 add r0, sp, #68 @ 0x44
|
|
1000300a: f7ff fa05 bl 10002418 <_atoi>
|
|
1000300e: 900b str r0, [sp, #44] @ 0x2c
|
|
10003010: e7ec b.n 10002fec <_vsnprintf+0xb4>
|
|
10003012: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10003014: 1d1a adds r2, r3, #4
|
|
10003016: 921c str r2, [sp, #112] @ 0x70
|
|
10003018: 681b ldr r3, [r3, #0]
|
|
1000301a: 2b00 cmp r3, #0
|
|
1000301c: db04 blt.n 10003028 <_vsnprintf+0xf0>
|
|
1000301e: 930b str r3, [sp, #44] @ 0x2c
|
|
10003020: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003022: 3301 adds r3, #1
|
|
10003024: 9311 str r3, [sp, #68] @ 0x44
|
|
10003026: e7e1 b.n 10002fec <_vsnprintf+0xb4>
|
|
10003028: 2202 movs r2, #2
|
|
1000302a: 4317 orrs r7, r2
|
|
1000302c: 425b negs r3, r3
|
|
1000302e: 930b str r3, [sp, #44] @ 0x2c
|
|
10003030: e7f6 b.n 10003020 <_vsnprintf+0xe8>
|
|
10003032: 2280 movs r2, #128 @ 0x80
|
|
10003034: 00d2 lsls r2, r2, #3
|
|
10003036: 4317 orrs r7, r2
|
|
10003038: 1c5a adds r2, r3, #1
|
|
1000303a: 9211 str r2, [sp, #68] @ 0x44
|
|
1000303c: 785a ldrb r2, [r3, #1]
|
|
1000303e: 0013 movs r3, r2
|
|
10003040: 3b30 subs r3, #48 @ 0x30
|
|
10003042: b2db uxtb r3, r3
|
|
10003044: 2b09 cmp r3, #9
|
|
10003046: d90b bls.n 10003060 <_vsnprintf+0x128>
|
|
10003048: 2a2a cmp r2, #42 @ 0x2a
|
|
1000304a: d1d3 bne.n 10002ff4 <_vsnprintf+0xbc>
|
|
1000304c: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
1000304e: 1d1a adds r2, r3, #4
|
|
10003050: 921c str r2, [sp, #112] @ 0x70
|
|
10003052: 681c ldr r4, [r3, #0]
|
|
10003054: 2c00 cmp r4, #0
|
|
10003056: db08 blt.n 1000306a <_vsnprintf+0x132>
|
|
10003058: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
1000305a: 3301 adds r3, #1
|
|
1000305c: 9311 str r3, [sp, #68] @ 0x44
|
|
1000305e: e7c9 b.n 10002ff4 <_vsnprintf+0xbc>
|
|
10003060: a811 add r0, sp, #68 @ 0x44
|
|
10003062: f7ff f9d9 bl 10002418 <_atoi>
|
|
10003066: 0004 movs r4, r0
|
|
10003068: e7c4 b.n 10002ff4 <_vsnprintf+0xbc>
|
|
1000306a: 2400 movs r4, #0
|
|
1000306c: e7f4 b.n 10003058 <_vsnprintf+0x120>
|
|
1000306e: 2380 movs r3, #128 @ 0x80
|
|
10003070: 005b lsls r3, r3, #1
|
|
10003072: 433b orrs r3, r7
|
|
10003074: 1c51 adds r1, r2, #1
|
|
10003076: 9111 str r1, [sp, #68] @ 0x44
|
|
10003078: 7851 ldrb r1, [r2, #1]
|
|
1000307a: 296c cmp r1, #108 @ 0x6c
|
|
1000307c: d001 beq.n 10003082 <_vsnprintf+0x14a>
|
|
1000307e: 001f movs r7, r3
|
|
10003080: e018 b.n 100030b4 <_vsnprintf+0x17c>
|
|
10003082: 23c0 movs r3, #192 @ 0xc0
|
|
10003084: 009b lsls r3, r3, #2
|
|
10003086: 431f orrs r7, r3
|
|
10003088: 3202 adds r2, #2
|
|
1000308a: 9211 str r2, [sp, #68] @ 0x44
|
|
1000308c: e012 b.n 100030b4 <_vsnprintf+0x17c>
|
|
1000308e: 2380 movs r3, #128 @ 0x80
|
|
10003090: 433b orrs r3, r7
|
|
10003092: 1c51 adds r1, r2, #1
|
|
10003094: 9111 str r1, [sp, #68] @ 0x44
|
|
10003096: 7851 ldrb r1, [r2, #1]
|
|
10003098: 2968 cmp r1, #104 @ 0x68
|
|
1000309a: d001 beq.n 100030a0 <_vsnprintf+0x168>
|
|
1000309c: 001f movs r7, r3
|
|
1000309e: e009 b.n 100030b4 <_vsnprintf+0x17c>
|
|
100030a0: 23c0 movs r3, #192 @ 0xc0
|
|
100030a2: 431f orrs r7, r3
|
|
100030a4: 3202 adds r2, #2
|
|
100030a6: 9211 str r2, [sp, #68] @ 0x44
|
|
100030a8: e004 b.n 100030b4 <_vsnprintf+0x17c>
|
|
100030aa: 2380 movs r3, #128 @ 0x80
|
|
100030ac: 005b lsls r3, r3, #1
|
|
100030ae: 431f orrs r7, r3
|
|
100030b0: 3201 adds r2, #1
|
|
100030b2: 9211 str r2, [sp, #68] @ 0x44
|
|
100030b4: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100030b6: 7818 ldrb r0, [r3, #0]
|
|
100030b8: 2867 cmp r0, #103 @ 0x67
|
|
100030ba: d818 bhi.n 100030ee <_vsnprintf+0x1b6>
|
|
100030bc: 2825 cmp r0, #37 @ 0x25
|
|
100030be: d200 bcs.n 100030c2 <_vsnprintf+0x18a>
|
|
100030c0: e24c b.n 1000355c <_vsnprintf+0x624>
|
|
100030c2: 0003 movs r3, r0
|
|
100030c4: 3b25 subs r3, #37 @ 0x25
|
|
100030c6: b2da uxtb r2, r3
|
|
100030c8: 2a42 cmp r2, #66 @ 0x42
|
|
100030ca: d900 bls.n 100030ce <_vsnprintf+0x196>
|
|
100030cc: e246 b.n 1000355c <_vsnprintf+0x624>
|
|
100030ce: 0093 lsls r3, r2, #2
|
|
100030d0: 4a8a ldr r2, [pc, #552] @ (100032fc <_vsnprintf+0x3c4>)
|
|
100030d2: 58d3 ldr r3, [r2, r3]
|
|
100030d4: 469f mov pc, r3
|
|
100030d6: 2380 movs r3, #128 @ 0x80
|
|
100030d8: 009b lsls r3, r3, #2
|
|
100030da: 431f orrs r7, r3
|
|
100030dc: 3201 adds r2, #1
|
|
100030de: 9211 str r2, [sp, #68] @ 0x44
|
|
100030e0: e7e8 b.n 100030b4 <_vsnprintf+0x17c>
|
|
100030e2: 2380 movs r3, #128 @ 0x80
|
|
100030e4: 005b lsls r3, r3, #1
|
|
100030e6: 431f orrs r7, r3
|
|
100030e8: 3201 adds r2, #1
|
|
100030ea: 9211 str r2, [sp, #68] @ 0x44
|
|
100030ec: e7e2 b.n 100030b4 <_vsnprintf+0x17c>
|
|
100030ee: 2878 cmp r0, #120 @ 0x78
|
|
100030f0: d900 bls.n 100030f4 <_vsnprintf+0x1bc>
|
|
100030f2: e233 b.n 1000355c <_vsnprintf+0x624>
|
|
100030f4: 2869 cmp r0, #105 @ 0x69
|
|
100030f6: d200 bcs.n 100030fa <_vsnprintf+0x1c2>
|
|
100030f8: e230 b.n 1000355c <_vsnprintf+0x624>
|
|
100030fa: 0002 movs r2, r0
|
|
100030fc: 3a69 subs r2, #105 @ 0x69
|
|
100030fe: b2d2 uxtb r2, r2
|
|
10003100: 2301 movs r3, #1
|
|
10003102: 4093 lsls r3, r2
|
|
10003104: 4a7e ldr r2, [pc, #504] @ (10003300 <_vsnprintf+0x3c8>)
|
|
10003106: 4213 tst r3, r2
|
|
10003108: d111 bne.n 1000312e <_vsnprintf+0x1f6>
|
|
1000310a: 061a lsls r2, r3, #24
|
|
1000310c: d500 bpl.n 10003110 <_vsnprintf+0x1d8>
|
|
1000310e: e200 b.n 10003512 <_vsnprintf+0x5da>
|
|
10003110: 055b lsls r3, r3, #21
|
|
10003112: d400 bmi.n 10003116 <_vsnprintf+0x1de>
|
|
10003114: e222 b.n 1000355c <_vsnprintf+0x624>
|
|
10003116: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10003118: 1d1a adds r2, r3, #4
|
|
1000311a: 921c str r2, [sp, #112] @ 0x70
|
|
1000311c: 681b ldr r3, [r3, #0]
|
|
1000311e: 469a mov sl, r3
|
|
10003120: 2c00 cmp r4, #0
|
|
10003122: d000 beq.n 10003126 <_vsnprintf+0x1ee>
|
|
10003124: e1b2 b.n 1000348c <_vsnprintf+0x554>
|
|
10003126: 2201 movs r2, #1
|
|
10003128: 4252 negs r2, r2
|
|
1000312a: 4653 mov r3, sl
|
|
1000312c: e18e b.n 1000344c <_vsnprintf+0x514>
|
|
1000312e: 286f cmp r0, #111 @ 0x6f
|
|
10003130: d00e beq.n 10003150 <_vsnprintf+0x218>
|
|
10003132: d806 bhi.n 10003142 <_vsnprintf+0x20a>
|
|
10003134: 2858 cmp r0, #88 @ 0x58
|
|
10003136: d03d beq.n 100031b4 <_vsnprintf+0x27c>
|
|
10003138: 2862 cmp r0, #98 @ 0x62
|
|
1000313a: d104 bne.n 10003146 <_vsnprintf+0x20e>
|
|
1000313c: 2302 movs r3, #2
|
|
1000313e: 469c mov ip, r3
|
|
10003140: e008 b.n 10003154 <_vsnprintf+0x21c>
|
|
10003142: 2878 cmp r0, #120 @ 0x78
|
|
10003144: d039 beq.n 100031ba <_vsnprintf+0x282>
|
|
10003146: 2310 movs r3, #16
|
|
10003148: 439f bics r7, r3
|
|
1000314a: 3b06 subs r3, #6
|
|
1000314c: 469c mov ip, r3
|
|
1000314e: e001 b.n 10003154 <_vsnprintf+0x21c>
|
|
10003150: 2308 movs r3, #8
|
|
10003152: 469c mov ip, r3
|
|
10003154: 2858 cmp r0, #88 @ 0x58
|
|
10003156: d033 beq.n 100031c0 <_vsnprintf+0x288>
|
|
10003158: 2869 cmp r0, #105 @ 0x69
|
|
1000315a: d003 beq.n 10003164 <_vsnprintf+0x22c>
|
|
1000315c: 2864 cmp r0, #100 @ 0x64
|
|
1000315e: d001 beq.n 10003164 <_vsnprintf+0x22c>
|
|
10003160: 220c movs r2, #12
|
|
10003162: 4397 bics r7, r2
|
|
10003164: 057a lsls r2, r7, #21
|
|
10003166: d501 bpl.n 1000316c <_vsnprintf+0x234>
|
|
10003168: 2201 movs r2, #1
|
|
1000316a: 4397 bics r7, r2
|
|
1000316c: 2869 cmp r0, #105 @ 0x69
|
|
1000316e: d02a beq.n 100031c6 <_vsnprintf+0x28e>
|
|
10003170: 2864 cmp r0, #100 @ 0x64
|
|
10003172: d028 beq.n 100031c6 <_vsnprintf+0x28e>
|
|
10003174: 05ba lsls r2, r7, #22
|
|
10003176: d500 bpl.n 1000317a <_vsnprintf+0x242>
|
|
10003178: e09f b.n 100032ba <_vsnprintf+0x382>
|
|
1000317a: 05fa lsls r2, r7, #23
|
|
1000317c: d500 bpl.n 10003180 <_vsnprintf+0x248>
|
|
1000317e: e0c1 b.n 10003304 <_vsnprintf+0x3cc>
|
|
10003180: 067a lsls r2, r7, #25
|
|
10003182: d400 bmi.n 10003186 <_vsnprintf+0x24e>
|
|
10003184: e0d3 b.n 1000332e <_vsnprintf+0x3f6>
|
|
10003186: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003188: 1d11 adds r1, r2, #4
|
|
1000318a: 911c str r1, [sp, #112] @ 0x70
|
|
1000318c: 6811 ldr r1, [r2, #0]
|
|
1000318e: 22ff movs r2, #255 @ 0xff
|
|
10003190: 400a ands r2, r1
|
|
10003192: 9705 str r7, [sp, #20]
|
|
10003194: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
10003196: 9304 str r3, [sp, #16]
|
|
10003198: 9403 str r4, [sp, #12]
|
|
1000319a: 4663 mov r3, ip
|
|
1000319c: 9302 str r3, [sp, #8]
|
|
1000319e: 2300 movs r3, #0
|
|
100031a0: 9301 str r3, [sp, #4]
|
|
100031a2: 9200 str r2, [sp, #0]
|
|
100031a4: 465b mov r3, fp
|
|
100031a6: 002a movs r2, r5
|
|
100031a8: 4641 mov r1, r8
|
|
100031aa: 0030 movs r0, r6
|
|
100031ac: f7ff fa25 bl 100025fa <_ntoa_long>
|
|
100031b0: 0005 movs r5, r0
|
|
100031b2: e027 b.n 10003204 <_vsnprintf+0x2cc>
|
|
100031b4: 2310 movs r3, #16
|
|
100031b6: 469c mov ip, r3
|
|
100031b8: e7cc b.n 10003154 <_vsnprintf+0x21c>
|
|
100031ba: 2310 movs r3, #16
|
|
100031bc: 469c mov ip, r3
|
|
100031be: e7c9 b.n 10003154 <_vsnprintf+0x21c>
|
|
100031c0: 2220 movs r2, #32
|
|
100031c2: 4317 orrs r7, r2
|
|
100031c4: e7c8 b.n 10003158 <_vsnprintf+0x220>
|
|
100031c6: 05ba lsls r2, r7, #22
|
|
100031c8: d420 bmi.n 1000320c <_vsnprintf+0x2d4>
|
|
100031ca: 05fa lsls r2, r7, #23
|
|
100031cc: d450 bmi.n 10003270 <_vsnprintf+0x338>
|
|
100031ce: 067a lsls r2, r7, #25
|
|
100031d0: d566 bpl.n 100032a0 <_vsnprintf+0x368>
|
|
100031d2: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100031d4: 1d11 adds r1, r2, #4
|
|
100031d6: 911c str r1, [sp, #112] @ 0x70
|
|
100031d8: 6811 ldr r1, [r2, #0]
|
|
100031da: 22ff movs r2, #255 @ 0xff
|
|
100031dc: 400a ands r2, r1
|
|
100031de: 17d0 asrs r0, r2, #31
|
|
100031e0: 1811 adds r1, r2, r0
|
|
100031e2: 4041 eors r1, r0
|
|
100031e4: 9705 str r7, [sp, #20]
|
|
100031e6: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
100031e8: 9304 str r3, [sp, #16]
|
|
100031ea: 9403 str r4, [sp, #12]
|
|
100031ec: 4663 mov r3, ip
|
|
100031ee: 9302 str r3, [sp, #8]
|
|
100031f0: 0fd2 lsrs r2, r2, #31
|
|
100031f2: 9201 str r2, [sp, #4]
|
|
100031f4: 9100 str r1, [sp, #0]
|
|
100031f6: 465b mov r3, fp
|
|
100031f8: 002a movs r2, r5
|
|
100031fa: 4641 mov r1, r8
|
|
100031fc: 0030 movs r0, r6
|
|
100031fe: f7ff f9fc bl 100025fa <_ntoa_long>
|
|
10003202: 0005 movs r5, r0
|
|
10003204: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003206: 3301 adds r3, #1
|
|
10003208: 9311 str r3, [sp, #68] @ 0x44
|
|
1000320a: e6a5 b.n 10002f58 <_vsnprintf+0x20>
|
|
1000320c: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
1000320e: 3207 adds r2, #7
|
|
10003210: 2107 movs r1, #7
|
|
10003212: 438a bics r2, r1
|
|
10003214: 0011 movs r1, r2
|
|
10003216: 3108 adds r1, #8
|
|
10003218: 911c str r1, [sp, #112] @ 0x70
|
|
1000321a: 6811 ldr r1, [r2, #0]
|
|
1000321c: 6853 ldr r3, [r2, #4]
|
|
1000321e: 4699 mov r9, r3
|
|
10003220: 17db asrs r3, r3, #31
|
|
10003222: 930c str r3, [sp, #48] @ 0x30
|
|
10003224: 930d str r3, [sp, #52] @ 0x34
|
|
10003226: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10003228: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000322a: 0010 movs r0, r2
|
|
1000322c: 4048 eors r0, r1
|
|
1000322e: 900e str r0, [sp, #56] @ 0x38
|
|
10003230: 464a mov r2, r9
|
|
10003232: 4053 eors r3, r2
|
|
10003234: 930f str r3, [sp, #60] @ 0x3c
|
|
10003236: 980e ldr r0, [sp, #56] @ 0x38
|
|
10003238: 990f ldr r1, [sp, #60] @ 0x3c
|
|
1000323a: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
1000323c: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000323e: 1a80 subs r0, r0, r2
|
|
10003240: 4199 sbcs r1, r3
|
|
10003242: 900e str r0, [sp, #56] @ 0x38
|
|
10003244: 910f str r1, [sp, #60] @ 0x3c
|
|
10003246: 9708 str r7, [sp, #32]
|
|
10003248: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
1000324a: 9307 str r3, [sp, #28]
|
|
1000324c: 9406 str r4, [sp, #24]
|
|
1000324e: 4663 mov r3, ip
|
|
10003250: 9304 str r3, [sp, #16]
|
|
10003252: 2300 movs r3, #0
|
|
10003254: 9305 str r3, [sp, #20]
|
|
10003256: 464b mov r3, r9
|
|
10003258: 0fda lsrs r2, r3, #31
|
|
1000325a: 9202 str r2, [sp, #8]
|
|
1000325c: 9000 str r0, [sp, #0]
|
|
1000325e: 9101 str r1, [sp, #4]
|
|
10003260: 465b mov r3, fp
|
|
10003262: 002a movs r2, r5
|
|
10003264: 4641 mov r1, r8
|
|
10003266: 0030 movs r0, r6
|
|
10003268: f7ff fa25 bl 100026b6 <_ntoa_long_long>
|
|
1000326c: 0005 movs r5, r0
|
|
1000326e: e7c9 b.n 10003204 <_vsnprintf+0x2cc>
|
|
10003270: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003272: 1d11 adds r1, r2, #4
|
|
10003274: 911c str r1, [sp, #112] @ 0x70
|
|
10003276: 6812 ldr r2, [r2, #0]
|
|
10003278: 17d0 asrs r0, r2, #31
|
|
1000327a: 1811 adds r1, r2, r0
|
|
1000327c: 4041 eors r1, r0
|
|
1000327e: 9705 str r7, [sp, #20]
|
|
10003280: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
10003282: 9304 str r3, [sp, #16]
|
|
10003284: 9403 str r4, [sp, #12]
|
|
10003286: 4663 mov r3, ip
|
|
10003288: 9302 str r3, [sp, #8]
|
|
1000328a: 0fd2 lsrs r2, r2, #31
|
|
1000328c: 9201 str r2, [sp, #4]
|
|
1000328e: 9100 str r1, [sp, #0]
|
|
10003290: 465b mov r3, fp
|
|
10003292: 002a movs r2, r5
|
|
10003294: 4641 mov r1, r8
|
|
10003296: 0030 movs r0, r6
|
|
10003298: f7ff f9af bl 100025fa <_ntoa_long>
|
|
1000329c: 0005 movs r5, r0
|
|
1000329e: e7b1 b.n 10003204 <_vsnprintf+0x2cc>
|
|
100032a0: 063a lsls r2, r7, #24
|
|
100032a2: d505 bpl.n 100032b0 <_vsnprintf+0x378>
|
|
100032a4: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100032a6: 1d11 adds r1, r2, #4
|
|
100032a8: 911c str r1, [sp, #112] @ 0x70
|
|
100032aa: 2300 movs r3, #0
|
|
100032ac: 5ed2 ldrsh r2, [r2, r3]
|
|
100032ae: e796 b.n 100031de <_vsnprintf+0x2a6>
|
|
100032b0: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100032b2: 1d11 adds r1, r2, #4
|
|
100032b4: 911c str r1, [sp, #112] @ 0x70
|
|
100032b6: 6812 ldr r2, [r2, #0]
|
|
100032b8: e791 b.n 100031de <_vsnprintf+0x2a6>
|
|
100032ba: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100032bc: 3207 adds r2, #7
|
|
100032be: 2107 movs r1, #7
|
|
100032c0: 438a bics r2, r1
|
|
100032c2: 0011 movs r1, r2
|
|
100032c4: 3108 adds r1, #8
|
|
100032c6: 911c str r1, [sp, #112] @ 0x70
|
|
100032c8: 9708 str r7, [sp, #32]
|
|
100032ca: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
100032cc: 9307 str r3, [sp, #28]
|
|
100032ce: 9406 str r4, [sp, #24]
|
|
100032d0: 4663 mov r3, ip
|
|
100032d2: 9304 str r3, [sp, #16]
|
|
100032d4: 2300 movs r3, #0
|
|
100032d6: 9305 str r3, [sp, #20]
|
|
100032d8: 9302 str r3, [sp, #8]
|
|
100032da: 6853 ldr r3, [r2, #4]
|
|
100032dc: 6812 ldr r2, [r2, #0]
|
|
100032de: 9200 str r2, [sp, #0]
|
|
100032e0: 9301 str r3, [sp, #4]
|
|
100032e2: 465b mov r3, fp
|
|
100032e4: 002a movs r2, r5
|
|
100032e6: 4641 mov r1, r8
|
|
100032e8: 0030 movs r0, r6
|
|
100032ea: f7ff f9e4 bl 100026b6 <_ntoa_long_long>
|
|
100032ee: 0005 movs r5, r0
|
|
100032f0: e788 b.n 10003204 <_vsnprintf+0x2cc>
|
|
100032f2: 46c0 nop @ (mov r8, r8)
|
|
100032f4: 100060a0 .word 0x100060a0
|
|
100032f8: 100060e4 .word 0x100060e4
|
|
100032fc: 10006130 .word 0x10006130
|
|
10003300: 00009041 .word 0x00009041
|
|
10003304: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003306: 1d11 adds r1, r2, #4
|
|
10003308: 911c str r1, [sp, #112] @ 0x70
|
|
1000330a: 9705 str r7, [sp, #20]
|
|
1000330c: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
1000330e: 9304 str r3, [sp, #16]
|
|
10003310: 9403 str r4, [sp, #12]
|
|
10003312: 4663 mov r3, ip
|
|
10003314: 9302 str r3, [sp, #8]
|
|
10003316: 2300 movs r3, #0
|
|
10003318: 9301 str r3, [sp, #4]
|
|
1000331a: 6813 ldr r3, [r2, #0]
|
|
1000331c: 9300 str r3, [sp, #0]
|
|
1000331e: 465b mov r3, fp
|
|
10003320: 002a movs r2, r5
|
|
10003322: 4641 mov r1, r8
|
|
10003324: 0030 movs r0, r6
|
|
10003326: f7ff f968 bl 100025fa <_ntoa_long>
|
|
1000332a: 0005 movs r5, r0
|
|
1000332c: e76a b.n 10003204 <_vsnprintf+0x2cc>
|
|
1000332e: 063a lsls r2, r7, #24
|
|
10003330: d506 bpl.n 10003340 <_vsnprintf+0x408>
|
|
10003332: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003334: 1d11 adds r1, r2, #4
|
|
10003336: 911c str r1, [sp, #112] @ 0x70
|
|
10003338: 6812 ldr r2, [r2, #0]
|
|
1000333a: 0412 lsls r2, r2, #16
|
|
1000333c: 0c12 lsrs r2, r2, #16
|
|
1000333e: e728 b.n 10003192 <_vsnprintf+0x25a>
|
|
10003340: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003342: 1d11 adds r1, r2, #4
|
|
10003344: 911c str r1, [sp, #112] @ 0x70
|
|
10003346: 6812 ldr r2, [r2, #0]
|
|
10003348: e723 b.n 10003192 <_vsnprintf+0x25a>
|
|
1000334a: 2846 cmp r0, #70 @ 0x46
|
|
1000334c: d019 beq.n 10003382 <_vsnprintf+0x44a>
|
|
1000334e: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10003350: 3307 adds r3, #7
|
|
10003352: 2207 movs r2, #7
|
|
10003354: 4393 bics r3, r2
|
|
10003356: 001a movs r2, r3
|
|
10003358: 3208 adds r2, #8
|
|
1000335a: 921c str r2, [sp, #112] @ 0x70
|
|
1000335c: 9704 str r7, [sp, #16]
|
|
1000335e: 9a0b ldr r2, [sp, #44] @ 0x2c
|
|
10003360: 9203 str r2, [sp, #12]
|
|
10003362: 9402 str r4, [sp, #8]
|
|
10003364: 681a ldr r2, [r3, #0]
|
|
10003366: 685b ldr r3, [r3, #4]
|
|
10003368: 9200 str r2, [sp, #0]
|
|
1000336a: 9301 str r3, [sp, #4]
|
|
1000336c: 465b mov r3, fp
|
|
1000336e: 002a movs r2, r5
|
|
10003370: 4641 mov r1, r8
|
|
10003372: 0030 movs r0, r6
|
|
10003374: f7ff fc36 bl 10002be4 <_ftoa>
|
|
10003378: 0005 movs r5, r0
|
|
1000337a: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
1000337c: 3301 adds r3, #1
|
|
1000337e: 9311 str r3, [sp, #68] @ 0x44
|
|
10003380: e5ea b.n 10002f58 <_vsnprintf+0x20>
|
|
10003382: 2320 movs r3, #32
|
|
10003384: 431f orrs r7, r3
|
|
10003386: e7e2 b.n 1000334e <_vsnprintf+0x416>
|
|
10003388: 2867 cmp r0, #103 @ 0x67
|
|
1000338a: d001 beq.n 10003390 <_vsnprintf+0x458>
|
|
1000338c: 2847 cmp r0, #71 @ 0x47
|
|
1000338e: d102 bne.n 10003396 <_vsnprintf+0x45e>
|
|
10003390: 2380 movs r3, #128 @ 0x80
|
|
10003392: 011b lsls r3, r3, #4
|
|
10003394: 431f orrs r7, r3
|
|
10003396: 2845 cmp r0, #69 @ 0x45
|
|
10003398: d001 beq.n 1000339e <_vsnprintf+0x466>
|
|
1000339a: 2847 cmp r0, #71 @ 0x47
|
|
1000339c: d101 bne.n 100033a2 <_vsnprintf+0x46a>
|
|
1000339e: 2320 movs r3, #32
|
|
100033a0: 431f orrs r7, r3
|
|
100033a2: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
100033a4: 3307 adds r3, #7
|
|
100033a6: 2207 movs r2, #7
|
|
100033a8: 4393 bics r3, r2
|
|
100033aa: 001a movs r2, r3
|
|
100033ac: 3208 adds r2, #8
|
|
100033ae: 921c str r2, [sp, #112] @ 0x70
|
|
100033b0: 9704 str r7, [sp, #16]
|
|
100033b2: 9a0b ldr r2, [sp, #44] @ 0x2c
|
|
100033b4: 9203 str r2, [sp, #12]
|
|
100033b6: 9402 str r4, [sp, #8]
|
|
100033b8: 681a ldr r2, [r3, #0]
|
|
100033ba: 685b ldr r3, [r3, #4]
|
|
100033bc: 9200 str r2, [sp, #0]
|
|
100033be: 9301 str r3, [sp, #4]
|
|
100033c0: 465b mov r3, fp
|
|
100033c2: 002a movs r2, r5
|
|
100033c4: 4641 mov r1, r8
|
|
100033c6: 0030 movs r0, r6
|
|
100033c8: f7ff f9fc bl 100027c4 <_etoa>
|
|
100033cc: 0005 movs r5, r0
|
|
100033ce: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100033d0: 3301 adds r3, #1
|
|
100033d2: 9311 str r3, [sp, #68] @ 0x44
|
|
100033d4: e5c0 b.n 10002f58 <_vsnprintf+0x20>
|
|
100033d6: 2302 movs r3, #2
|
|
100033d8: 001a movs r2, r3
|
|
100033da: 403a ands r2, r7
|
|
100033dc: 4691 mov r9, r2
|
|
100033de: 423b tst r3, r7
|
|
100033e0: d01d beq.n 1000341e <_vsnprintf+0x4e6>
|
|
100033e2: 2401 movs r4, #1
|
|
100033e4: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
100033e6: 1d1a adds r2, r3, #4
|
|
100033e8: 921c str r2, [sp, #112] @ 0x70
|
|
100033ea: 1c6f adds r7, r5, #1
|
|
100033ec: 7818 ldrb r0, [r3, #0]
|
|
100033ee: 465b mov r3, fp
|
|
100033f0: 002a movs r2, r5
|
|
100033f2: 4641 mov r1, r8
|
|
100033f4: 47b0 blx r6
|
|
100033f6: 464b mov r3, r9
|
|
100033f8: 2b00 cmp r3, #0
|
|
100033fa: d114 bne.n 10003426 <_vsnprintf+0x4ee>
|
|
100033fc: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100033fe: 3301 adds r3, #1
|
|
10003400: 9311 str r3, [sp, #68] @ 0x44
|
|
10003402: 003d movs r5, r7
|
|
10003404: e5a8 b.n 10002f58 <_vsnprintf+0x20>
|
|
10003406: 1c57 adds r7, r2, #1
|
|
10003408: 465b mov r3, fp
|
|
1000340a: 4641 mov r1, r8
|
|
1000340c: 2020 movs r0, #32
|
|
1000340e: 47b0 blx r6
|
|
10003410: 0023 movs r3, r4
|
|
10003412: 003a movs r2, r7
|
|
10003414: 1c5c adds r4, r3, #1
|
|
10003416: 429d cmp r5, r3
|
|
10003418: d8f5 bhi.n 10003406 <_vsnprintf+0x4ce>
|
|
1000341a: 0015 movs r5, r2
|
|
1000341c: e7e2 b.n 100033e4 <_vsnprintf+0x4ac>
|
|
1000341e: 2301 movs r3, #1
|
|
10003420: 002a movs r2, r5
|
|
10003422: 9d0b ldr r5, [sp, #44] @ 0x2c
|
|
10003424: e7f6 b.n 10003414 <_vsnprintf+0x4dc>
|
|
10003426: 003a movs r2, r7
|
|
10003428: 46b1 mov r9, r6
|
|
1000342a: 9e0b ldr r6, [sp, #44] @ 0x2c
|
|
1000342c: e006 b.n 1000343c <_vsnprintf+0x504>
|
|
1000342e: 1c57 adds r7, r2, #1
|
|
10003430: 465b mov r3, fp
|
|
10003432: 4641 mov r1, r8
|
|
10003434: 2020 movs r0, #32
|
|
10003436: 47c8 blx r9
|
|
10003438: 002c movs r4, r5
|
|
1000343a: 003a movs r2, r7
|
|
1000343c: 1c65 adds r5, r4, #1
|
|
1000343e: 42a6 cmp r6, r4
|
|
10003440: d8f5 bhi.n 1000342e <_vsnprintf+0x4f6>
|
|
10003442: 0017 movs r7, r2
|
|
10003444: 464e mov r6, r9
|
|
10003446: e7d9 b.n 100033fc <_vsnprintf+0x4c4>
|
|
10003448: 3301 adds r3, #1
|
|
1000344a: 000a movs r2, r1
|
|
1000344c: 7819 ldrb r1, [r3, #0]
|
|
1000344e: 2900 cmp r1, #0
|
|
10003450: d002 beq.n 10003458 <_vsnprintf+0x520>
|
|
10003452: 1e51 subs r1, r2, #1
|
|
10003454: 2a00 cmp r2, #0
|
|
10003456: d1f7 bne.n 10003448 <_vsnprintf+0x510>
|
|
10003458: 4652 mov r2, sl
|
|
1000345a: 1a9b subs r3, r3, r2
|
|
1000345c: 2280 movs r2, #128 @ 0x80
|
|
1000345e: 00d2 lsls r2, r2, #3
|
|
10003460: 0039 movs r1, r7
|
|
10003462: 4011 ands r1, r2
|
|
10003464: 4689 mov r9, r1
|
|
10003466: 4217 tst r7, r2
|
|
10003468: d002 beq.n 10003470 <_vsnprintf+0x538>
|
|
1000346a: 42a3 cmp r3, r4
|
|
1000346c: d900 bls.n 10003470 <_vsnprintf+0x538>
|
|
1000346e: 0023 movs r3, r4
|
|
10003470: 2202 movs r2, #2
|
|
10003472: 0011 movs r1, r2
|
|
10003474: 4039 ands r1, r7
|
|
10003476: 9110 str r1, [sp, #64] @ 0x40
|
|
10003478: 423a tst r2, r7
|
|
1000347a: d009 beq.n 10003490 <_vsnprintf+0x558>
|
|
1000347c: 002a movs r2, r5
|
|
1000347e: 0025 movs r5, r4
|
|
10003480: 4657 mov r7, sl
|
|
10003482: 469a mov sl, r3
|
|
10003484: 0033 movs r3, r6
|
|
10003486: 464e mov r6, r9
|
|
10003488: 4699 mov r9, r3
|
|
1000348a: e021 b.n 100034d0 <_vsnprintf+0x598>
|
|
1000348c: 0022 movs r2, r4
|
|
1000348e: e64c b.n 1000312a <_vsnprintf+0x1f2>
|
|
10003490: 002a movs r2, r5
|
|
10003492: 4645 mov r5, r8
|
|
10003494: 46a0 mov r8, r4
|
|
10003496: e006 b.n 100034a6 <_vsnprintf+0x56e>
|
|
10003498: 1c54 adds r4, r2, #1
|
|
1000349a: 465b mov r3, fp
|
|
1000349c: 0029 movs r1, r5
|
|
1000349e: 2020 movs r0, #32
|
|
100034a0: 47b0 blx r6
|
|
100034a2: 003b movs r3, r7
|
|
100034a4: 0022 movs r2, r4
|
|
100034a6: 1c5f adds r7, r3, #1
|
|
100034a8: 990b ldr r1, [sp, #44] @ 0x2c
|
|
100034aa: 4299 cmp r1, r3
|
|
100034ac: d8f4 bhi.n 10003498 <_vsnprintf+0x560>
|
|
100034ae: 4644 mov r4, r8
|
|
100034b0: 46a8 mov r8, r5
|
|
100034b2: 003b movs r3, r7
|
|
100034b4: 0025 movs r5, r4
|
|
100034b6: 4657 mov r7, sl
|
|
100034b8: 469a mov sl, r3
|
|
100034ba: 0033 movs r3, r6
|
|
100034bc: 464e mov r6, r9
|
|
100034be: 4699 mov r9, r3
|
|
100034c0: e006 b.n 100034d0 <_vsnprintf+0x598>
|
|
100034c2: 001d movs r5, r3
|
|
100034c4: 3701 adds r7, #1
|
|
100034c6: 1c54 adds r4, r2, #1
|
|
100034c8: 465b mov r3, fp
|
|
100034ca: 4641 mov r1, r8
|
|
100034cc: 47c8 blx r9
|
|
100034ce: 0022 movs r2, r4
|
|
100034d0: 7838 ldrb r0, [r7, #0]
|
|
100034d2: 2800 cmp r0, #0
|
|
100034d4: d004 beq.n 100034e0 <_vsnprintf+0x5a8>
|
|
100034d6: 2e00 cmp r6, #0
|
|
100034d8: d0f4 beq.n 100034c4 <_vsnprintf+0x58c>
|
|
100034da: 1e6b subs r3, r5, #1
|
|
100034dc: 2d00 cmp r5, #0
|
|
100034de: d1f0 bne.n 100034c2 <_vsnprintf+0x58a>
|
|
100034e0: 0015 movs r5, r2
|
|
100034e2: 4653 mov r3, sl
|
|
100034e4: 464e mov r6, r9
|
|
100034e6: 9a10 ldr r2, [sp, #64] @ 0x40
|
|
100034e8: 2a00 cmp r2, #0
|
|
100034ea: d103 bne.n 100034f4 <_vsnprintf+0x5bc>
|
|
100034ec: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100034ee: 3301 adds r3, #1
|
|
100034f0: 9311 str r3, [sp, #68] @ 0x44
|
|
100034f2: e531 b.n 10002f58 <_vsnprintf+0x20>
|
|
100034f4: 9f0b ldr r7, [sp, #44] @ 0x2c
|
|
100034f6: 002a movs r2, r5
|
|
100034f8: e006 b.n 10003508 <_vsnprintf+0x5d0>
|
|
100034fa: 1c55 adds r5, r2, #1
|
|
100034fc: 465b mov r3, fp
|
|
100034fe: 4641 mov r1, r8
|
|
10003500: 2020 movs r0, #32
|
|
10003502: 47b0 blx r6
|
|
10003504: 0023 movs r3, r4
|
|
10003506: 002a movs r2, r5
|
|
10003508: 1c5c adds r4, r3, #1
|
|
1000350a: 429f cmp r7, r3
|
|
1000350c: d8f5 bhi.n 100034fa <_vsnprintf+0x5c2>
|
|
1000350e: 0015 movs r5, r2
|
|
10003510: e7ec b.n 100034ec <_vsnprintf+0x5b4>
|
|
10003512: 2321 movs r3, #33 @ 0x21
|
|
10003514: 433b orrs r3, r7
|
|
10003516: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003518: 1d11 adds r1, r2, #4
|
|
1000351a: 911c str r1, [sp, #112] @ 0x70
|
|
1000351c: 6812 ldr r2, [r2, #0]
|
|
1000351e: 9305 str r3, [sp, #20]
|
|
10003520: 2308 movs r3, #8
|
|
10003522: 9304 str r3, [sp, #16]
|
|
10003524: 9403 str r4, [sp, #12]
|
|
10003526: 3308 adds r3, #8
|
|
10003528: 9302 str r3, [sp, #8]
|
|
1000352a: 2300 movs r3, #0
|
|
1000352c: 9301 str r3, [sp, #4]
|
|
1000352e: 9200 str r2, [sp, #0]
|
|
10003530: 465b mov r3, fp
|
|
10003532: 002a movs r2, r5
|
|
10003534: 4641 mov r1, r8
|
|
10003536: 0030 movs r0, r6
|
|
10003538: f7ff f85f bl 100025fa <_ntoa_long>
|
|
1000353c: 0005 movs r5, r0
|
|
1000353e: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003540: 3301 adds r3, #1
|
|
10003542: 9311 str r3, [sp, #68] @ 0x44
|
|
10003544: e508 b.n 10002f58 <_vsnprintf+0x20>
|
|
10003546: 1c6c adds r4, r5, #1
|
|
10003548: 465b mov r3, fp
|
|
1000354a: 002a movs r2, r5
|
|
1000354c: 4641 mov r1, r8
|
|
1000354e: 2025 movs r0, #37 @ 0x25
|
|
10003550: 47b0 blx r6
|
|
10003552: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003554: 3301 adds r3, #1
|
|
10003556: 9311 str r3, [sp, #68] @ 0x44
|
|
10003558: 0025 movs r5, r4
|
|
1000355a: e4fd b.n 10002f58 <_vsnprintf+0x20>
|
|
1000355c: 1c6c adds r4, r5, #1
|
|
1000355e: 465b mov r3, fp
|
|
10003560: 002a movs r2, r5
|
|
10003562: 4641 mov r1, r8
|
|
10003564: 47b0 blx r6
|
|
10003566: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003568: 3301 adds r3, #1
|
|
1000356a: 9311 str r3, [sp, #68] @ 0x44
|
|
1000356c: 0025 movs r5, r4
|
|
1000356e: e4f3 b.n 10002f58 <_vsnprintf+0x20>
|
|
10003570: 4b0a ldr r3, [pc, #40] @ (1000359c <_vsnprintf+0x664>)
|
|
10003572: 469a mov sl, r3
|
|
10003574: e4ee b.n 10002f54 <_vsnprintf+0x1c>
|
|
10003576: 46b2 mov sl, r6
|
|
10003578: 455d cmp r5, fp
|
|
1000357a: d30d bcc.n 10003598 <_vsnprintf+0x660>
|
|
1000357c: 465b mov r3, fp
|
|
1000357e: 1e5a subs r2, r3, #1
|
|
10003580: 465b mov r3, fp
|
|
10003582: 4641 mov r1, r8
|
|
10003584: 2000 movs r0, #0
|
|
10003586: 47d0 blx sl
|
|
10003588: 0028 movs r0, r5
|
|
1000358a: b013 add sp, #76 @ 0x4c
|
|
1000358c: bcf0 pop {r4, r5, r6, r7}
|
|
1000358e: 46bb mov fp, r7
|
|
10003590: 46b2 mov sl, r6
|
|
10003592: 46a9 mov r9, r5
|
|
10003594: 46a0 mov r8, r4
|
|
10003596: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003598: 002a movs r2, r5
|
|
1000359a: e7f1 b.n 10003580 <_vsnprintf+0x648>
|
|
1000359c: 10002409 .word 0x10002409
|
|
|
|
100035a0 <vfctprintf>:
|
|
100035a0: b500 push {lr}
|
|
100035a2: b085 sub sp, #20
|
|
100035a4: 9002 str r0, [sp, #8]
|
|
100035a6: 9103 str r1, [sp, #12]
|
|
100035a8: 2101 movs r1, #1
|
|
100035aa: 4804 ldr r0, [pc, #16] @ (100035bc <vfctprintf+0x1c>)
|
|
100035ac: 9300 str r3, [sp, #0]
|
|
100035ae: 0013 movs r3, r2
|
|
100035b0: 424a negs r2, r1
|
|
100035b2: a902 add r1, sp, #8
|
|
100035b4: f7ff fcc0 bl 10002f38 <_vsnprintf>
|
|
100035b8: b005 add sp, #20
|
|
100035ba: bd00 pop {pc}
|
|
100035bc: 1000240b .word 0x1000240b
|
|
|
|
100035c0 <__aeabi_bits_init>:
|
|
100035c0: 4801 ldr r0, [pc, #4] @ (100035c8 <__aeabi_bits_init+0x8>)
|
|
100035c2: 2104 movs r1, #4
|
|
100035c4: 4b01 ldr r3, [pc, #4] @ (100035cc <__aeabi_bits_init+0xc>)
|
|
100035c6: 4718 bx r3
|
|
100035c8: 200002b0 .word 0x200002b0
|
|
100035cc: 100035f1 .word 0x100035f1
|
|
|
|
100035d0 <rom_func_lookup>:
|
|
100035d0: b510 push {r4, lr}
|
|
100035d2: 0001 movs r1, r0
|
|
100035d4: 2318 movs r3, #24
|
|
100035d6: 881b ldrh r3, [r3, #0]
|
|
100035d8: 2214 movs r2, #20
|
|
100035da: 8810 ldrh r0, [r2, #0]
|
|
100035dc: 4798 blx r3
|
|
100035de: bd10 pop {r4, pc}
|
|
|
|
100035e0 <rom_data_lookup>:
|
|
100035e0: b510 push {r4, lr}
|
|
100035e2: 0001 movs r1, r0
|
|
100035e4: 2318 movs r3, #24
|
|
100035e6: 881b ldrh r3, [r3, #0]
|
|
100035e8: 2216 movs r2, #22
|
|
100035ea: 8810 ldrh r0, [r2, #0]
|
|
100035ec: 4798 blx r3
|
|
100035ee: bd10 pop {r4, pc}
|
|
|
|
100035f0 <rom_funcs_lookup>:
|
|
100035f0: b5f0 push {r4, r5, r6, r7, lr}
|
|
100035f2: 46c6 mov lr, r8
|
|
100035f4: b500 push {lr}
|
|
100035f6: 0007 movs r7, r0
|
|
100035f8: 000e movs r6, r1
|
|
100035fa: 2500 movs r5, #0
|
|
100035fc: 2301 movs r3, #1
|
|
100035fe: 4698 mov r8, r3
|
|
10003600: e000 b.n 10003604 <rom_funcs_lookup+0x14>
|
|
10003602: 3501 adds r5, #1
|
|
10003604: 42b5 cmp r5, r6
|
|
10003606: d20a bcs.n 1000361e <rom_funcs_lookup+0x2e>
|
|
10003608: 00ac lsls r4, r5, #2
|
|
1000360a: 193c adds r4, r7, r4
|
|
1000360c: 6820 ldr r0, [r4, #0]
|
|
1000360e: f7ff ffdf bl 100035d0 <rom_func_lookup>
|
|
10003612: 6020 str r0, [r4, #0]
|
|
10003614: 2800 cmp r0, #0
|
|
10003616: d1f4 bne.n 10003602 <rom_funcs_lookup+0x12>
|
|
10003618: 2300 movs r3, #0
|
|
1000361a: 4698 mov r8, r3
|
|
1000361c: e7f1 b.n 10003602 <rom_funcs_lookup+0x12>
|
|
1000361e: 4640 mov r0, r8
|
|
10003620: bc80 pop {r7}
|
|
10003622: 46b8 mov r8, r7
|
|
10003624: bdf0 pop {r4, r5, r6, r7, pc}
|
|
...
|
|
|
|
10003628 <__wrap___aeabi_idiv>:
|
|
10003628: 4a12 ldr r2, [pc, #72] @ (10003674 <divmod_s32s32_savestate+0x18>)
|
|
1000362a: 6f93 ldr r3, [r2, #120] @ 0x78
|
|
1000362c: 089b lsrs r3, r3, #2
|
|
1000362e: d215 bcs.n 1000365c <divmod_s32s32_savestate>
|
|
|
|
10003630 <divmod_s32s32_unsafe>:
|
|
10003630: 6690 str r0, [r2, #104] @ 0x68
|
|
10003632: 66d1 str r1, [r2, #108] @ 0x6c
|
|
10003634: 2900 cmp r1, #0
|
|
10003636: d005 beq.n 10003644 <divmod_s32s32_unsafe+0x14>
|
|
10003638: e7ff b.n 1000363a <divmod_s32s32_unsafe+0xa>
|
|
1000363a: e7ff b.n 1000363c <divmod_s32s32_unsafe+0xc>
|
|
1000363c: e7ff b.n 1000363e <divmod_s32s32_unsafe+0xe>
|
|
1000363e: 6f51 ldr r1, [r2, #116] @ 0x74
|
|
10003640: 6f10 ldr r0, [r2, #112] @ 0x70
|
|
10003642: 4770 bx lr
|
|
10003644: b504 push {r2, lr}
|
|
10003646: 2180 movs r1, #128 @ 0x80
|
|
10003648: 0609 lsls r1, r1, #24
|
|
1000364a: 17c2 asrs r2, r0, #31
|
|
1000364c: 4051 eors r1, r2
|
|
1000364e: 2800 cmp r0, #0
|
|
10003650: d000 beq.n 10003654 <divmod_s32s32_unsafe+0x24>
|
|
10003652: 43c8 mvns r0, r1
|
|
10003654: f001 ff38 bl 100054c8 <____aeabi_idiv0_veneer>
|
|
10003658: 2100 movs r1, #0
|
|
1000365a: bd04 pop {r2, pc}
|
|
|
|
1000365c <divmod_s32s32_savestate>:
|
|
1000365c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000365e: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
10003660: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
10003662: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
10003664: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
10003666: f7ff ffe3 bl 10003630 <divmod_s32s32_unsafe>
|
|
1000366a: 6614 str r4, [r2, #96] @ 0x60
|
|
1000366c: 6655 str r5, [r2, #100] @ 0x64
|
|
1000366e: 6757 str r7, [r2, #116] @ 0x74
|
|
10003670: 6716 str r6, [r2, #112] @ 0x70
|
|
10003672: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003674: d0000000 .word 0xd0000000
|
|
|
|
10003678 <__wrap___aeabi_uidiv>:
|
|
10003678: 4a11 ldr r2, [pc, #68] @ (100036c0 <divmod_u32u32_savestate+0x18>)
|
|
1000367a: 6f93 ldr r3, [r2, #120] @ 0x78
|
|
1000367c: 089b lsrs r3, r3, #2
|
|
1000367e: d213 bcs.n 100036a8 <divmod_u32u32_savestate>
|
|
|
|
10003680 <divmod_u32u32_unsafe>:
|
|
10003680: 6610 str r0, [r2, #96] @ 0x60
|
|
10003682: 6651 str r1, [r2, #100] @ 0x64
|
|
10003684: 2900 cmp r1, #0
|
|
10003686: d005 beq.n 10003694 <divmod_u32u32_unsafe+0x14>
|
|
10003688: e7ff b.n 1000368a <divmod_u32u32_unsafe+0xa>
|
|
1000368a: e7ff b.n 1000368c <divmod_u32u32_unsafe+0xc>
|
|
1000368c: e7ff b.n 1000368e <divmod_u32u32_unsafe+0xe>
|
|
1000368e: 6f51 ldr r1, [r2, #116] @ 0x74
|
|
10003690: 6f10 ldr r0, [r2, #112] @ 0x70
|
|
10003692: 4770 bx lr
|
|
10003694: b504 push {r2, lr}
|
|
10003696: 2800 cmp r0, #0
|
|
10003698: d001 beq.n 1000369e <divmod_u32u32_unsafe+0x1e>
|
|
1000369a: 2000 movs r0, #0
|
|
1000369c: 43c0 mvns r0, r0
|
|
1000369e: f001 ff13 bl 100054c8 <____aeabi_idiv0_veneer>
|
|
100036a2: 2100 movs r1, #0
|
|
100036a4: bd04 pop {r2, pc}
|
|
100036a6: 46c0 nop @ (mov r8, r8)
|
|
|
|
100036a8 <divmod_u32u32_savestate>:
|
|
100036a8: b5f0 push {r4, r5, r6, r7, lr}
|
|
100036aa: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
100036ac: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
100036ae: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
100036b0: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
100036b2: f7ff ffe5 bl 10003680 <divmod_u32u32_unsafe>
|
|
100036b6: 6614 str r4, [r2, #96] @ 0x60
|
|
100036b8: 6655 str r5, [r2, #100] @ 0x64
|
|
100036ba: 6757 str r7, [r2, #116] @ 0x74
|
|
100036bc: 6716 str r6, [r2, #112] @ 0x70
|
|
100036be: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100036c0: d0000000 .word 0xd0000000
|
|
|
|
100036c4 <__wrap___aeabi_ldivmod>:
|
|
100036c4: 4694 mov ip, r2
|
|
100036c6: 4a4a ldr r2, [pc, #296] @ (100037f0 <udiv0+0x1a>)
|
|
100036c8: 6f92 ldr r2, [r2, #120] @ 0x78
|
|
100036ca: 0892 lsrs r2, r2, #2
|
|
100036cc: 4662 mov r2, ip
|
|
100036ce: d201 bcs.n 100036d4 <divmod_s64s64_savestate>
|
|
100036d0: e028 b.n 10003724 <divmod_s64s64_unsafe>
|
|
100036d2: 46c0 nop @ (mov r8, r8)
|
|
|
|
100036d4 <divmod_s64s64_savestate>:
|
|
100036d4: b5f0 push {r4, r5, r6, r7, lr}
|
|
100036d6: 4e46 ldr r6, [pc, #280] @ (100037f0 <udiv0+0x1a>)
|
|
100036d8: 6e34 ldr r4, [r6, #96] @ 0x60
|
|
100036da: 6e75 ldr r5, [r6, #100] @ 0x64
|
|
100036dc: 6f77 ldr r7, [r6, #116] @ 0x74
|
|
100036de: 6f36 ldr r6, [r6, #112] @ 0x70
|
|
100036e0: f000 f820 bl 10003724 <divmod_s64s64_unsafe>
|
|
100036e4: 4694 mov ip, r2
|
|
100036e6: 4a42 ldr r2, [pc, #264] @ (100037f0 <udiv0+0x1a>)
|
|
100036e8: 6614 str r4, [r2, #96] @ 0x60
|
|
100036ea: 6655 str r5, [r2, #100] @ 0x64
|
|
100036ec: 6757 str r7, [r2, #116] @ 0x74
|
|
100036ee: 6716 str r6, [r2, #112] @ 0x70
|
|
100036f0: 4662 mov r2, ip
|
|
100036f2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100036f4 <__wrap___aeabi_uldivmod>:
|
|
100036f4: 4694 mov ip, r2
|
|
100036f6: 4a3e ldr r2, [pc, #248] @ (100037f0 <udiv0+0x1a>)
|
|
100036f8: 6f92 ldr r2, [r2, #120] @ 0x78
|
|
100036fa: 0892 lsrs r2, r2, #2
|
|
100036fc: 4662 mov r2, ip
|
|
100036fe: d201 bcs.n 10003704 <divmod_u64u64_savestate>
|
|
10003700: e054 b.n 100037ac <divmod_u64u64_unsafe>
|
|
10003702: 46c0 nop @ (mov r8, r8)
|
|
|
|
10003704 <divmod_u64u64_savestate>:
|
|
10003704: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003706: 4e3a ldr r6, [pc, #232] @ (100037f0 <udiv0+0x1a>)
|
|
10003708: 6e34 ldr r4, [r6, #96] @ 0x60
|
|
1000370a: 6e75 ldr r5, [r6, #100] @ 0x64
|
|
1000370c: 6f77 ldr r7, [r6, #116] @ 0x74
|
|
1000370e: 6f36 ldr r6, [r6, #112] @ 0x70
|
|
10003710: f000 f84c bl 100037ac <divmod_u64u64_unsafe>
|
|
10003714: 4694 mov ip, r2
|
|
10003716: 4a36 ldr r2, [pc, #216] @ (100037f0 <udiv0+0x1a>)
|
|
10003718: 6614 str r4, [r2, #96] @ 0x60
|
|
1000371a: 6655 str r5, [r2, #100] @ 0x64
|
|
1000371c: 6757 str r7, [r2, #116] @ 0x74
|
|
1000371e: 6716 str r6, [r2, #112] @ 0x70
|
|
10003720: 4662 mov r2, ip
|
|
10003722: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003724 <divmod_s64s64_unsafe>:
|
|
10003724: 2b00 cmp r3, #0
|
|
10003726: db24 blt.n 10003772 <l41_1+0x26>
|
|
10003728: d011 beq.n 1000374e <l41_1+0x2>
|
|
1000372a: 2900 cmp r1, #0
|
|
1000372c: da3e bge.n 100037ac <divmod_u64u64_unsafe>
|
|
1000372e: b500 push {lr}
|
|
10003730: 43c9 mvns r1, r1
|
|
10003732: 4240 negs r0, r0
|
|
10003734: d100 bne.n 10003738 <l39_1>
|
|
10003736: 3101 adds r1, #1
|
|
|
|
10003738 <l39_1>:
|
|
10003738: f000 f838 bl 100037ac <divmod_u64u64_unsafe>
|
|
1000373c: 43c9 mvns r1, r1
|
|
1000373e: 4240 negs r0, r0
|
|
10003740: d100 bne.n 10003744 <l40_1>
|
|
10003742: 3101 adds r1, #1
|
|
|
|
10003744 <l40_1>:
|
|
10003744: 43db mvns r3, r3
|
|
10003746: 4252 negs r2, r2
|
|
10003748: d100 bne.n 1000374c <l41_1>
|
|
1000374a: 3301 adds r3, #1
|
|
|
|
1000374c <l41_1>:
|
|
1000374c: bd00 pop {pc}
|
|
1000374e: 2a00 cmp r2, #0
|
|
10003750: d1eb bne.n 1000372a <divmod_s64s64_unsafe+0x6>
|
|
10003752: 2800 cmp r0, #0
|
|
10003754: d101 bne.n 1000375a <l41_1+0xe>
|
|
10003756: 2900 cmp r1, #0
|
|
10003758: d005 beq.n 10003766 <l41_1+0x1a>
|
|
1000375a: 2000 movs r0, #0
|
|
1000375c: 0fc9 lsrs r1, r1, #31
|
|
1000375e: 07c9 lsls r1, r1, #31
|
|
10003760: d101 bne.n 10003766 <l41_1+0x1a>
|
|
10003762: 43c0 mvns r0, r0
|
|
10003764: 0841 lsrs r1, r0, #1
|
|
10003766: b500 push {lr}
|
|
10003768: f001 fea6 bl 100054b8 <____aeabi_ldiv0_veneer>
|
|
1000376c: 2200 movs r2, #0
|
|
1000376e: 2300 movs r3, #0
|
|
10003770: bd00 pop {pc}
|
|
10003772: b500 push {lr}
|
|
10003774: 2900 cmp r1, #0
|
|
10003776: db0a blt.n 1000378e <l43_1+0x2>
|
|
10003778: 43db mvns r3, r3
|
|
1000377a: 4252 negs r2, r2
|
|
1000377c: d100 bne.n 10003780 <l42_1>
|
|
1000377e: 3301 adds r3, #1
|
|
|
|
10003780 <l42_1>:
|
|
10003780: f000 f814 bl 100037ac <divmod_u64u64_unsafe>
|
|
10003784: 43c9 mvns r1, r1
|
|
10003786: 4240 negs r0, r0
|
|
10003788: d100 bne.n 1000378c <l43_1>
|
|
1000378a: 3101 adds r1, #1
|
|
|
|
1000378c <l43_1>:
|
|
1000378c: bd00 pop {pc}
|
|
1000378e: 43c9 mvns r1, r1
|
|
10003790: 4240 negs r0, r0
|
|
10003792: d100 bne.n 10003796 <l44_1>
|
|
10003794: 3101 adds r1, #1
|
|
|
|
10003796 <l44_1>:
|
|
10003796: 43db mvns r3, r3
|
|
10003798: 4252 negs r2, r2
|
|
1000379a: d100 bne.n 1000379e <l45_1>
|
|
1000379c: 3301 adds r3, #1
|
|
|
|
1000379e <l45_1>:
|
|
1000379e: f000 f805 bl 100037ac <divmod_u64u64_unsafe>
|
|
100037a2: 43db mvns r3, r3
|
|
100037a4: 4252 negs r2, r2
|
|
100037a6: d100 bne.n 100037aa <l46_1>
|
|
100037a8: 3301 adds r3, #1
|
|
|
|
100037aa <l46_1>:
|
|
100037aa: bd00 pop {pc}
|
|
|
|
100037ac <divmod_u64u64_unsafe>:
|
|
100037ac: 2900 cmp r1, #0
|
|
100037ae: d123 bne.n 100037f8 <y64>
|
|
100037b0: 2b00 cmp r3, #0
|
|
100037b2: d118 bne.n 100037e6 <udiv0+0x10>
|
|
100037b4: 2a00 cmp r2, #0
|
|
100037b6: d00c beq.n 100037d2 <divmod_u64u64_unsafe+0x26>
|
|
100037b8: 46bc mov ip, r7
|
|
100037ba: 4f0d ldr r7, [pc, #52] @ (100037f0 <udiv0+0x1a>)
|
|
100037bc: 6638 str r0, [r7, #96] @ 0x60
|
|
100037be: 667a str r2, [r7, #100] @ 0x64
|
|
100037c0: 2100 movs r1, #0
|
|
100037c2: 2300 movs r3, #0
|
|
100037c4: e7ff b.n 100037c6 <divmod_u64u64_unsafe+0x1a>
|
|
100037c6: e7ff b.n 100037c8 <divmod_u64u64_unsafe+0x1c>
|
|
100037c8: e7ff b.n 100037ca <divmod_u64u64_unsafe+0x1e>
|
|
100037ca: 6f7a ldr r2, [r7, #116] @ 0x74
|
|
100037cc: 6f38 ldr r0, [r7, #112] @ 0x70
|
|
100037ce: 4667 mov r7, ip
|
|
100037d0: 4770 bx lr
|
|
100037d2: 2800 cmp r0, #0
|
|
100037d4: d001 beq.n 100037da <udiv0+0x4>
|
|
|
|
100037d6 <udiv0>:
|
|
100037d6: 4807 ldr r0, [pc, #28] @ (100037f4 <udiv0+0x1e>)
|
|
100037d8: 0001 movs r1, r0
|
|
100037da: b500 push {lr}
|
|
100037dc: f001 fe6c bl 100054b8 <____aeabi_ldiv0_veneer>
|
|
100037e0: 2200 movs r2, #0
|
|
100037e2: 2300 movs r3, #0
|
|
100037e4: bd00 pop {pc}
|
|
100037e6: 0002 movs r2, r0
|
|
100037e8: 000b movs r3, r1
|
|
100037ea: 2000 movs r0, #0
|
|
100037ec: 2100 movs r1, #0
|
|
100037ee: 4770 bx lr
|
|
100037f0: d0000000 .word 0xd0000000
|
|
100037f4: ffffffff .word 0xffffffff
|
|
|
|
100037f8 <y64>:
|
|
100037f8: 2b00 cmp r3, #0
|
|
100037fa: d000 beq.n 100037fe <y64+0x6>
|
|
100037fc: e0bf b.n 1000397e <y64_x48>
|
|
100037fe: 0c13 lsrs r3, r2, #16
|
|
10003800: d128 bne.n 10003854 <y64_x32>
|
|
10003802: 2a00 cmp r2, #0
|
|
10003804: d0e7 beq.n 100037d6 <udiv0>
|
|
10003806: b480 push {r7}
|
|
10003808: 4f11 ldr r7, [pc, #68] @ (10003850 <y64+0x58>)
|
|
1000380a: 6639 str r1, [r7, #96] @ 0x60
|
|
1000380c: 667a str r2, [r7, #100] @ 0x64
|
|
1000380e: e7ff b.n 10003810 <y64+0x18>
|
|
10003810: e7ff b.n 10003812 <y64+0x1a>
|
|
10003812: b430 push {r4, r5}
|
|
10003814: 0c04 lsrs r4, r0, #16
|
|
10003816: 6f7b ldr r3, [r7, #116] @ 0x74
|
|
10003818: 6f39 ldr r1, [r7, #112] @ 0x70
|
|
1000381a: 041b lsls r3, r3, #16
|
|
1000381c: 4323 orrs r3, r4
|
|
1000381e: 663b str r3, [r7, #96] @ 0x60
|
|
10003820: 667a str r2, [r7, #100] @ 0x64
|
|
10003822: e7ff b.n 10003824 <y64+0x2c>
|
|
10003824: e7ff b.n 10003826 <y64+0x2e>
|
|
10003826: e7ff b.n 10003828 <y64+0x30>
|
|
10003828: 46c0 nop @ (mov r8, r8)
|
|
1000382a: b284 uxth r4, r0
|
|
1000382c: 6f7b ldr r3, [r7, #116] @ 0x74
|
|
1000382e: 6f3d ldr r5, [r7, #112] @ 0x70
|
|
10003830: 041b lsls r3, r3, #16
|
|
10003832: 4323 orrs r3, r4
|
|
10003834: 663b str r3, [r7, #96] @ 0x60
|
|
10003836: 667a str r2, [r7, #100] @ 0x64
|
|
10003838: e7ff b.n 1000383a <y64+0x42>
|
|
1000383a: e7ff b.n 1000383c <y64+0x44>
|
|
1000383c: 46c0 nop @ (mov r8, r8)
|
|
1000383e: 2300 movs r3, #0
|
|
10003840: 042c lsls r4, r5, #16
|
|
10003842: 0c2d lsrs r5, r5, #16
|
|
10003844: 6f7a ldr r2, [r7, #116] @ 0x74
|
|
10003846: 6f38 ldr r0, [r7, #112] @ 0x70
|
|
10003848: 1900 adds r0, r0, r4
|
|
1000384a: 4169 adcs r1, r5
|
|
1000384c: bcb0 pop {r4, r5, r7}
|
|
1000384e: 4770 bx lr
|
|
10003850: d0000000 .word 0xd0000000
|
|
|
|
10003854 <y64_x32>:
|
|
10003854: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003856: 4694 mov ip, r2
|
|
10003858: 2500 movs r5, #0
|
|
1000385a: 0e14 lsrs r4, r2, #24
|
|
1000385c: d101 bne.n 10003862 <y64_x32+0xe>
|
|
1000385e: 0212 lsls r2, r2, #8
|
|
10003860: 3508 adds r5, #8
|
|
10003862: 0f14 lsrs r4, r2, #28
|
|
10003864: d101 bne.n 1000386a <y64_x32+0x16>
|
|
10003866: 0112 lsls r2, r2, #4
|
|
10003868: 3504 adds r5, #4
|
|
1000386a: 0f94 lsrs r4, r2, #30
|
|
1000386c: d101 bne.n 10003872 <y64_x32+0x1e>
|
|
1000386e: 0092 lsls r2, r2, #2
|
|
10003870: 3502 adds r5, #2
|
|
10003872: 0fd4 lsrs r4, r2, #31
|
|
10003874: d101 bne.n 1000387a <y64_x32+0x26>
|
|
10003876: 0052 lsls r2, r2, #1
|
|
10003878: 3501 adds r5, #1
|
|
1000387a: 0bd4 lsrs r4, r2, #15
|
|
1000387c: 3401 adds r4, #1
|
|
1000387e: 4f25 ldr r7, [pc, #148] @ (10003914 <y64_x32+0xc0>)
|
|
10003880: 667c str r4, [r7, #100] @ 0x64
|
|
10003882: 4c25 ldr r4, [pc, #148] @ (10003918 <y64_x32+0xc4>)
|
|
10003884: 663c str r4, [r7, #96] @ 0x60
|
|
10003886: 0c0e lsrs r6, r1, #16
|
|
10003888: b293 uxth r3, r2
|
|
1000388a: e7ff b.n 1000388c <y64_x32+0x38>
|
|
1000388c: e7ff b.n 1000388e <y64_x32+0x3a>
|
|
1000388e: e7ff b.n 10003890 <y64_x32+0x3c>
|
|
10003890: 6f3c ldr r4, [r7, #112] @ 0x70
|
|
10003892: 4366 muls r6, r4
|
|
10003894: 0c36 lsrs r6, r6, #16
|
|
10003896: 0377 lsls r7, r6, #13
|
|
10003898: 46be mov lr, r7
|
|
1000389a: 4373 muls r3, r6
|
|
1000389c: 0bdf lsrs r7, r3, #15
|
|
1000389e: 045b lsls r3, r3, #17
|
|
100038a0: 1ac0 subs r0, r0, r3
|
|
100038a2: 41b9 sbcs r1, r7
|
|
100038a4: 0c13 lsrs r3, r2, #16
|
|
100038a6: 4373 muls r3, r6
|
|
100038a8: 18db adds r3, r3, r3
|
|
100038aa: 1ac9 subs r1, r1, r3
|
|
100038ac: 08ce lsrs r6, r1, #3
|
|
100038ae: 4366 muls r6, r4
|
|
100038b0: 0c36 lsrs r6, r6, #16
|
|
100038b2: 44b6 add lr, r6
|
|
100038b4: b293 uxth r3, r2
|
|
100038b6: 4373 muls r3, r6
|
|
100038b8: 0f1f lsrs r7, r3, #28
|
|
100038ba: 011b lsls r3, r3, #4
|
|
100038bc: 1ac0 subs r0, r0, r3
|
|
100038be: 41b9 sbcs r1, r7
|
|
100038c0: 0c13 lsrs r3, r2, #16
|
|
100038c2: 4373 muls r3, r6
|
|
100038c4: 0b1f lsrs r7, r3, #12
|
|
100038c6: 051b lsls r3, r3, #20
|
|
100038c8: 1ac0 subs r0, r0, r3
|
|
100038ca: 41b9 sbcs r1, r7
|
|
100038cc: 0d86 lsrs r6, r0, #22
|
|
100038ce: 028f lsls r7, r1, #10
|
|
100038d0: 433e orrs r6, r7
|
|
100038d2: 4366 muls r6, r4
|
|
100038d4: 0c36 lsrs r6, r6, #16
|
|
100038d6: 2d09 cmp r5, #9
|
|
100038d8: db24 blt.n 10003924 <last0>
|
|
100038da: 0a52 lsrs r2, r2, #9
|
|
100038dc: 4372 muls r2, r6
|
|
100038de: 1a80 subs r0, r0, r2
|
|
100038e0: 0377 lsls r7, r6, #13
|
|
100038e2: 0a46 lsrs r6, r0, #9
|
|
100038e4: 4366 muls r6, r4
|
|
100038e6: 0c36 lsrs r6, r6, #16
|
|
100038e8: 2316 movs r3, #22
|
|
100038ea: 1b5b subs r3, r3, r5
|
|
100038ec: 40de lsrs r6, r3
|
|
100038ee: 40df lsrs r7, r3
|
|
100038f0: 19bf adds r7, r7, r6
|
|
100038f2: 4664 mov r4, ip
|
|
100038f4: 4366 muls r6, r4
|
|
100038f6: 1b82 subs r2, r0, r6
|
|
100038f8: 4670 mov r0, lr
|
|
100038fa: 3504 adds r5, #4
|
|
100038fc: 3306 adds r3, #6
|
|
100038fe: 0001 movs r1, r0
|
|
10003900: 40d9 lsrs r1, r3
|
|
10003902: 40a8 lsls r0, r5
|
|
10003904: 19c0 adds r0, r0, r7
|
|
10003906: d300 bcc.n 1000390a <y64_x32+0xb6>
|
|
10003908: 3101 adds r1, #1
|
|
1000390a: 42a2 cmp r2, r4
|
|
1000390c: d206 bcs.n 1000391c <y64_x32+0xc8>
|
|
1000390e: 2300 movs r3, #0
|
|
10003910: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003912: 0000 .short 0x0000
|
|
10003914: d0000000 .word 0xd0000000
|
|
10003918: ffffffff .word 0xffffffff
|
|
1000391c: 1b12 subs r2, r2, r4
|
|
1000391e: 3001 adds r0, #1
|
|
10003920: d3f3 bcc.n 1000390a <y64_x32+0xb6>
|
|
10003922: e7f1 b.n 10003908 <y64_x32+0xb4>
|
|
|
|
10003924 <last0>:
|
|
10003924: 2709 movs r7, #9
|
|
10003926: 1b7f subs r7, r7, r5
|
|
10003928: 40fe lsrs r6, r7
|
|
1000392a: 4664 mov r4, ip
|
|
1000392c: b2a2 uxth r2, r4
|
|
1000392e: 4372 muls r2, r6
|
|
10003930: 1a80 subs r0, r0, r2
|
|
10003932: d200 bcs.n 10003936 <last0+0x12>
|
|
10003934: 3901 subs r1, #1
|
|
10003936: 0c22 lsrs r2, r4, #16
|
|
10003938: 4372 muls r2, r6
|
|
1000393a: 0c13 lsrs r3, r2, #16
|
|
1000393c: 0412 lsls r2, r2, #16
|
|
1000393e: 1a82 subs r2, r0, r2
|
|
10003940: 4199 sbcs r1, r3
|
|
10003942: 000b movs r3, r1
|
|
10003944: 4670 mov r0, lr
|
|
10003946: 3504 adds r5, #4
|
|
10003948: 3713 adds r7, #19
|
|
1000394a: 0001 movs r1, r0
|
|
1000394c: 40f9 lsrs r1, r7
|
|
1000394e: 40a8 lsls r0, r5
|
|
10003950: 1980 adds r0, r0, r6
|
|
10003952: d300 bcc.n 10003956 <last0+0x32>
|
|
10003954: 3101 adds r1, #1
|
|
10003956: 2b00 cmp r3, #0
|
|
10003958: d102 bne.n 10003960 <last0+0x3c>
|
|
1000395a: 42a2 cmp r2, r4
|
|
1000395c: d20a bcs.n 10003974 <last0+0x50>
|
|
1000395e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003960: 3001 adds r0, #1
|
|
10003962: d300 bcc.n 10003966 <last0+0x42>
|
|
10003964: 3101 adds r1, #1
|
|
10003966: 1b12 subs r2, r2, r4
|
|
10003968: d2fa bcs.n 10003960 <last0+0x3c>
|
|
1000396a: 3b01 subs r3, #1
|
|
1000396c: d1f8 bne.n 10003960 <last0+0x3c>
|
|
1000396e: 42a2 cmp r2, r4
|
|
10003970: d200 bcs.n 10003974 <last0+0x50>
|
|
10003972: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003974: 3001 adds r0, #1
|
|
10003976: d300 bcc.n 1000397a <last0+0x56>
|
|
10003978: 3101 adds r1, #1
|
|
1000397a: 1b12 subs r2, r2, r4
|
|
1000397c: e7f7 b.n 1000396e <last0+0x4a>
|
|
|
|
1000397e <y64_x48>:
|
|
1000397e: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003980: 0c1c lsrs r4, r3, #16
|
|
10003982: d000 beq.n 10003986 <y64_x48+0x8>
|
|
10003984: e080 b.n 10003a88 <y64_x64>
|
|
10003986: b40c push {r2, r3}
|
|
10003988: 2500 movs r5, #0
|
|
1000398a: 0a1c lsrs r4, r3, #8
|
|
1000398c: d104 bne.n 10003998 <y64_x48+0x1a>
|
|
1000398e: 021b lsls r3, r3, #8
|
|
10003990: 0e16 lsrs r6, r2, #24
|
|
10003992: 4333 orrs r3, r6
|
|
10003994: 0212 lsls r2, r2, #8
|
|
10003996: 3508 adds r5, #8
|
|
10003998: 0b1c lsrs r4, r3, #12
|
|
1000399a: d104 bne.n 100039a6 <y64_x48+0x28>
|
|
1000399c: 011b lsls r3, r3, #4
|
|
1000399e: 0f16 lsrs r6, r2, #28
|
|
100039a0: 4333 orrs r3, r6
|
|
100039a2: 0112 lsls r2, r2, #4
|
|
100039a4: 3504 adds r5, #4
|
|
100039a6: 0b9c lsrs r4, r3, #14
|
|
100039a8: d104 bne.n 100039b4 <y64_x48+0x36>
|
|
100039aa: 009b lsls r3, r3, #2
|
|
100039ac: 0f96 lsrs r6, r2, #30
|
|
100039ae: 4333 orrs r3, r6
|
|
100039b0: 0092 lsls r2, r2, #2
|
|
100039b2: 3502 adds r5, #2
|
|
100039b4: 0bdc lsrs r4, r3, #15
|
|
100039b6: d102 bne.n 100039be <y64_x48+0x40>
|
|
100039b8: 1892 adds r2, r2, r2
|
|
100039ba: 415b adcs r3, r3
|
|
100039bc: 3501 adds r5, #1
|
|
100039be: 001c movs r4, r3
|
|
100039c0: 1897 adds r7, r2, r2
|
|
100039c2: 4164 adcs r4, r4
|
|
100039c4: 3401 adds r4, #1
|
|
100039c6: 4f46 ldr r7, [pc, #280] @ (10003ae0 <y64_x64+0x58>)
|
|
100039c8: 667c str r4, [r7, #100] @ 0x64
|
|
100039ca: 4c46 ldr r4, [pc, #280] @ (10003ae4 <y64_x64+0x5c>)
|
|
100039cc: 663c str r4, [r7, #96] @ 0x60
|
|
100039ce: 0c0e lsrs r6, r1, #16
|
|
100039d0: e7ff b.n 100039d2 <y64_x48+0x54>
|
|
100039d2: e7ff b.n 100039d4 <y64_x48+0x56>
|
|
100039d4: e7ff b.n 100039d6 <y64_x48+0x58>
|
|
100039d6: 46c0 nop @ (mov r8, r8)
|
|
100039d8: 6f3c ldr r4, [r7, #112] @ 0x70
|
|
100039da: 4366 muls r6, r4
|
|
100039dc: 0c36 lsrs r6, r6, #16
|
|
100039de: 0377 lsls r7, r6, #13
|
|
100039e0: 46be mov lr, r7
|
|
100039e2: b297 uxth r7, r2
|
|
100039e4: 4377 muls r7, r6
|
|
100039e6: 1bc0 subs r0, r0, r7
|
|
100039e8: d200 bcs.n 100039ec <y64_x48+0x6e>
|
|
100039ea: 3901 subs r1, #1
|
|
100039ec: 1bc0 subs r0, r0, r7
|
|
100039ee: d200 bcs.n 100039f2 <y64_x48+0x74>
|
|
100039f0: 3901 subs r1, #1
|
|
100039f2: b29f uxth r7, r3
|
|
100039f4: 4377 muls r7, r6
|
|
100039f6: 1bc9 subs r1, r1, r7
|
|
100039f8: 1bc9 subs r1, r1, r7
|
|
100039fa: 0c17 lsrs r7, r2, #16
|
|
100039fc: 4377 muls r7, r6
|
|
100039fe: 047e lsls r6, r7, #17
|
|
10003a00: 0bff lsrs r7, r7, #15
|
|
10003a02: 1b80 subs r0, r0, r6
|
|
10003a04: 41b9 sbcs r1, r7
|
|
10003a06: 08ce lsrs r6, r1, #3
|
|
10003a08: 4366 muls r6, r4
|
|
10003a0a: 0c36 lsrs r6, r6, #16
|
|
10003a0c: 2d0c cmp r5, #12
|
|
10003a0e: db33 blt.n 10003a78 <last1>
|
|
10003a10: 44b6 add lr, r6
|
|
10003a12: 0b12 lsrs r2, r2, #12
|
|
10003a14: 051f lsls r7, r3, #20
|
|
10003a16: 433a orrs r2, r7
|
|
10003a18: 0b1b lsrs r3, r3, #12
|
|
10003a1a: b297 uxth r7, r2
|
|
10003a1c: 4377 muls r7, r6
|
|
10003a1e: 1bc0 subs r0, r0, r7
|
|
10003a20: d200 bcs.n 10003a24 <y64_x48+0xa6>
|
|
10003a22: 3901 subs r1, #1
|
|
10003a24: b29f uxth r7, r3
|
|
10003a26: 4377 muls r7, r6
|
|
10003a28: 1bc9 subs r1, r1, r7
|
|
10003a2a: 0c17 lsrs r7, r2, #16
|
|
10003a2c: 4377 muls r7, r6
|
|
10003a2e: 043e lsls r6, r7, #16
|
|
10003a30: 0c3f lsrs r7, r7, #16
|
|
10003a32: 1b80 subs r0, r0, r6
|
|
10003a34: 41b9 sbcs r1, r7
|
|
10003a36: 0d86 lsrs r6, r0, #22
|
|
10003a38: 028f lsls r7, r1, #10
|
|
10003a3a: 433e orrs r6, r7
|
|
10003a3c: 4366 muls r6, r4
|
|
10003a3e: 2729 movs r7, #41 @ 0x29
|
|
10003a40: 1b7f subs r7, r7, r5
|
|
10003a42: 40fe lsrs r6, r7
|
|
10003a44: 3d0c subs r5, #12
|
|
10003a46: 4677 mov r7, lr
|
|
10003a48: 40af lsls r7, r5
|
|
10003a4a: 19bf adds r7, r7, r6
|
|
10003a4c: bc30 pop {r4, r5}
|
|
10003a4e: b2a2 uxth r2, r4
|
|
10003a50: b2ab uxth r3, r5
|
|
10003a52: 4372 muls r2, r6
|
|
10003a54: 4373 muls r3, r6
|
|
10003a56: 1a80 subs r0, r0, r2
|
|
10003a58: 4199 sbcs r1, r3
|
|
10003a5a: 0c22 lsrs r2, r4, #16
|
|
10003a5c: 4372 muls r2, r6
|
|
10003a5e: 0c13 lsrs r3, r2, #16
|
|
10003a60: 0412 lsls r2, r2, #16
|
|
10003a62: 1a80 subs r0, r0, r2
|
|
10003a64: 4199 sbcs r1, r3
|
|
10003a66: 0002 movs r2, r0
|
|
10003a68: 000b movs r3, r1
|
|
10003a6a: 3701 adds r7, #1
|
|
10003a6c: 1b00 subs r0, r0, r4
|
|
10003a6e: 41a9 sbcs r1, r5
|
|
10003a70: d2f9 bcs.n 10003a66 <y64_x48+0xe8>
|
|
10003a72: 1e78 subs r0, r7, #1
|
|
10003a74: 2100 movs r1, #0
|
|
10003a76: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003a78 <last1>:
|
|
10003a78: 270c movs r7, #12
|
|
10003a7a: 1b7f subs r7, r7, r5
|
|
10003a7c: 40fe lsrs r6, r7
|
|
10003a7e: 4677 mov r7, lr
|
|
10003a80: 0b7f lsrs r7, r7, #13
|
|
10003a82: 40af lsls r7, r5
|
|
10003a84: 19ff adds r7, r7, r7
|
|
10003a86: e7e0 b.n 10003a4a <y64_x48+0xcc>
|
|
|
|
10003a88 <y64_x64>:
|
|
10003a88: 2400 movs r4, #0
|
|
10003a8a: 1c5d adds r5, r3, #1
|
|
10003a8c: d007 beq.n 10003a9e <y64_x64+0x16>
|
|
10003a8e: 4f14 ldr r7, [pc, #80] @ (10003ae0 <y64_x64+0x58>)
|
|
10003a90: 667d str r5, [r7, #100] @ 0x64
|
|
10003a92: 6639 str r1, [r7, #96] @ 0x60
|
|
10003a94: e7ff b.n 10003a96 <y64_x64+0xe>
|
|
10003a96: e7ff b.n 10003a98 <y64_x64+0x10>
|
|
10003a98: e7ff b.n 10003a9a <y64_x64+0x12>
|
|
10003a9a: e7ff b.n 10003a9c <y64_x64+0x14>
|
|
10003a9c: 6f3c ldr r4, [r7, #112] @ 0x70
|
|
10003a9e: b295 uxth r5, r2
|
|
10003aa0: b29e uxth r6, r3
|
|
10003aa2: 4365 muls r5, r4
|
|
10003aa4: 4366 muls r6, r4
|
|
10003aa6: 1b40 subs r0, r0, r5
|
|
10003aa8: 41b1 sbcs r1, r6
|
|
10003aaa: 0c15 lsrs r5, r2, #16
|
|
10003aac: 0c1e lsrs r6, r3, #16
|
|
10003aae: 4365 muls r5, r4
|
|
10003ab0: 4366 muls r6, r4
|
|
10003ab2: 0436 lsls r6, r6, #16
|
|
10003ab4: 0c2f lsrs r7, r5, #16
|
|
10003ab6: 433e orrs r6, r7
|
|
10003ab8: 042d lsls r5, r5, #16
|
|
10003aba: 1b40 subs r0, r0, r5
|
|
10003abc: 41b1 sbcs r1, r6
|
|
10003abe: 4299 cmp r1, r3
|
|
10003ac0: d204 bcs.n 10003acc <y64_x64+0x44>
|
|
10003ac2: 0002 movs r2, r0
|
|
10003ac4: 000b movs r3, r1
|
|
10003ac6: 0020 movs r0, r4
|
|
10003ac8: 2100 movs r1, #0
|
|
10003aca: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003acc: d101 bne.n 10003ad2 <y64_x64+0x4a>
|
|
10003ace: 4290 cmp r0, r2
|
|
10003ad0: d3f7 bcc.n 10003ac2 <y64_x64+0x3a>
|
|
10003ad2: 1a80 subs r0, r0, r2
|
|
10003ad4: 4199 sbcs r1, r3
|
|
10003ad6: 3401 adds r4, #1
|
|
10003ad8: 4299 cmp r1, r3
|
|
10003ada: d3f2 bcc.n 10003ac2 <y64_x64+0x3a>
|
|
10003adc: e7f6 b.n 10003acc <y64_x64+0x44>
|
|
10003ade: 0000 .short 0x0000
|
|
10003ae0: d0000000 .word 0xd0000000
|
|
10003ae4: ffffffff .word 0xffffffff
|
|
|
|
10003ae8 <__wrap___aeabi_drsub>:
|
|
10003ae8: 4048 eors r0, r1
|
|
10003aea: 4041 eors r1, r0
|
|
10003aec: 4048 eors r0, r1
|
|
|
|
10003aee <__wrap___aeabi_dsub>:
|
|
10003aee: b418 push {r3, r4}
|
|
10003af0: 4b1b ldr r3, [pc, #108] @ (10003b60 <__wrap___aeabi_dmul+0x12>)
|
|
10003af2: 685b ldr r3, [r3, #4]
|
|
10003af4: 46fc mov ip, pc
|
|
10003af6: 9301 str r3, [sp, #4]
|
|
10003af8: bd08 pop {r3, pc}
|
|
10003afa: df04 .short 0xdf04
|
|
10003afc: 10003dc7 .word 0x10003dc7
|
|
|
|
10003b00 <__wrap___aeabi_dadd>:
|
|
10003b00: b418 push {r3, r4}
|
|
10003b02: 4b17 ldr r3, [pc, #92] @ (10003b60 <__wrap___aeabi_dmul+0x12>)
|
|
10003b04: 681b ldr r3, [r3, #0]
|
|
10003b06: 46fc mov ip, pc
|
|
10003b08: 9301 str r3, [sp, #4]
|
|
10003b0a: bd08 pop {r3, pc}
|
|
10003b0c: 3dd1df00 .word 0x3dd1df00
|
|
10003b10: 1000 .short 0x1000
|
|
|
|
10003b12 <__wrap___aeabi_ddiv>:
|
|
10003b12: 4694 mov ip, r2
|
|
10003b14: 4a13 ldr r2, [pc, #76] @ (10003b64 <__wrap___aeabi_dmul+0x16>)
|
|
10003b16: 6f92 ldr r2, [r2, #120] @ 0x78
|
|
10003b18: 0892 lsrs r2, r2, #2
|
|
10003b1a: d209 bcs.n 10003b30 <ddiv_save_state>
|
|
10003b1c: 4662 mov r2, ip
|
|
|
|
10003b1e <ddiv_shim_call>:
|
|
10003b1e: b418 push {r3, r4}
|
|
10003b20: 4b0f ldr r3, [pc, #60] @ (10003b60 <__wrap___aeabi_dmul+0x12>)
|
|
10003b22: 68db ldr r3, [r3, #12]
|
|
10003b24: 46fc mov ip, pc
|
|
10003b26: 9301 str r3, [sp, #4]
|
|
10003b28: bd08 pop {r3, pc}
|
|
10003b2a: df0c .short 0xdf0c
|
|
10003b2c: 10004089 .word 0x10004089
|
|
|
|
10003b30 <ddiv_save_state>:
|
|
10003b30: 4a0c ldr r2, [pc, #48] @ (10003b64 <__wrap___aeabi_dmul+0x16>)
|
|
10003b32: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003b34: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
10003b36: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
10003b38: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
10003b3a: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
10003b3c: 4662 mov r2, ip
|
|
10003b3e: f7ff ffee bl 10003b1e <ddiv_shim_call>
|
|
10003b42: 4a08 ldr r2, [pc, #32] @ (10003b64 <__wrap___aeabi_dmul+0x16>)
|
|
10003b44: 6614 str r4, [r2, #96] @ 0x60
|
|
10003b46: 6655 str r5, [r2, #100] @ 0x64
|
|
10003b48: 6757 str r7, [r2, #116] @ 0x74
|
|
10003b4a: 6716 str r6, [r2, #112] @ 0x70
|
|
10003b4c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003b4e <__wrap___aeabi_dmul>:
|
|
10003b4e: b418 push {r3, r4}
|
|
10003b50: 4b03 ldr r3, [pc, #12] @ (10003b60 <__wrap___aeabi_dmul+0x12>)
|
|
10003b52: 689b ldr r3, [r3, #8]
|
|
10003b54: 46fc mov ip, pc
|
|
10003b56: 9301 str r3, [sp, #4]
|
|
10003b58: bd08 pop {r3, pc}
|
|
10003b5a: df08 .short 0xdf08
|
|
10003b5c: 10003f2d .word 0x10003f2d
|
|
10003b60: 20000b48 .word 0x20000b48
|
|
10003b64: d0000000 .word 0xd0000000
|
|
|
|
10003b68 <__wrap___aeabi_cdrcmple>:
|
|
10003b68: b5ff push {r0, r1, r2, r3, r4, r5, r6, r7, lr}
|
|
10003b6a: 4050 eors r0, r2
|
|
10003b6c: 4042 eors r2, r0
|
|
10003b6e: 4050 eors r0, r2
|
|
10003b70: 4059 eors r1, r3
|
|
10003b72: 404b eors r3, r1
|
|
10003b74: 4059 eors r1, r3
|
|
10003b76: e000 b.n 10003b7a <__aeabi_dfcmple_guts>
|
|
|
|
10003b78 <__wrap___aeabi_cdcmpeq>:
|
|
10003b78: b5ff push {r0, r1, r2, r3, r4, r5, r6, r7, lr}
|
|
|
|
10003b7a <__aeabi_dfcmple_guts>:
|
|
10003b7a: 4f15 ldr r7, [pc, #84] @ (10003bd0 <__aeabi_dfcmple_guts+0x56>)
|
|
10003b7c: 004c lsls r4, r1, #1
|
|
10003b7e: 0d64 lsrs r4, r4, #21
|
|
10003b80: d003 beq.n 10003b8a <__aeabi_dfcmple_guts+0x10>
|
|
10003b82: 42bc cmp r4, r7
|
|
10003b84: d104 bne.n 10003b90 <__aeabi_dfcmple_guts+0x16>
|
|
10003b86: 030c lsls r4, r1, #12
|
|
10003b88: d814 bhi.n 10003bb4 <__aeabi_dfcmple_guts+0x3a>
|
|
10003b8a: 2000 movs r0, #0
|
|
10003b8c: 0d09 lsrs r1, r1, #20
|
|
10003b8e: 0509 lsls r1, r1, #20
|
|
10003b90: 005c lsls r4, r3, #1
|
|
10003b92: 0d64 lsrs r4, r4, #21
|
|
10003b94: d003 beq.n 10003b9e <__aeabi_dfcmple_guts+0x24>
|
|
10003b96: 42bc cmp r4, r7
|
|
10003b98: d104 bne.n 10003ba4 <__aeabi_dfcmple_guts+0x2a>
|
|
10003b9a: 031c lsls r4, r3, #12
|
|
10003b9c: d80a bhi.n 10003bb4 <__aeabi_dfcmple_guts+0x3a>
|
|
10003b9e: 2200 movs r2, #0
|
|
10003ba0: 0d1b lsrs r3, r3, #20
|
|
10003ba2: 051b lsls r3, r3, #20
|
|
10003ba4: 2601 movs r6, #1
|
|
10003ba6: 404b eors r3, r1
|
|
10003ba8: d409 bmi.n 10003bbe <__aeabi_dfcmple_guts+0x44>
|
|
10003baa: 404b eors r3, r1
|
|
10003bac: d503 bpl.n 10003bb6 <__aeabi_dfcmple_guts+0x3c>
|
|
10003bae: 428b cmp r3, r1
|
|
10003bb0: d100 bne.n 10003bb4 <__aeabi_dfcmple_guts+0x3a>
|
|
10003bb2: 4282 cmp r2, r0
|
|
10003bb4: bdff pop {r0, r1, r2, r3, r4, r5, r6, r7, pc}
|
|
10003bb6: 4299 cmp r1, r3
|
|
10003bb8: d1fc bne.n 10003bb4 <__aeabi_dfcmple_guts+0x3a>
|
|
10003bba: 4290 cmp r0, r2
|
|
10003bbc: bdff pop {r0, r1, r2, r3, r4, r5, r6, r7, pc}
|
|
10003bbe: 430b orrs r3, r1
|
|
10003bc0: 18db adds r3, r3, r3
|
|
10003bc2: 4303 orrs r3, r0
|
|
10003bc4: 4313 orrs r3, r2
|
|
10003bc6: d0f5 beq.n 10003bb4 <__aeabi_dfcmple_guts+0x3a>
|
|
10003bc8: 43c9 mvns r1, r1
|
|
10003bca: 1849 adds r1, r1, r1
|
|
10003bcc: bdff pop {r0, r1, r2, r3, r4, r5, r6, r7, pc}
|
|
10003bce: 0000 .short 0x0000
|
|
10003bd0: 000007ff .word 0x000007ff
|
|
|
|
10003bd4 <__wrap___aeabi_dcmplt>:
|
|
10003bd4: b500 push {lr}
|
|
10003bd6: f7ff ffcf bl 10003b78 <__wrap___aeabi_cdcmpeq>
|
|
10003bda: 4180 sbcs r0, r0
|
|
10003bdc: bd00 pop {pc}
|
|
10003bde: 46c0 nop @ (mov r8, r8)
|
|
|
|
10003be0 <__wrap___aeabi_dcmple>:
|
|
10003be0: b500 push {lr}
|
|
10003be2: f7ff ffc9 bl 10003b78 <__wrap___aeabi_cdcmpeq>
|
|
10003be6: d901 bls.n 10003bec <__wrap___aeabi_dcmple+0xc>
|
|
10003be8: 2000 movs r0, #0
|
|
10003bea: bd00 pop {pc}
|
|
10003bec: 2001 movs r0, #1
|
|
10003bee: bd00 pop {pc}
|
|
|
|
10003bf0 <__wrap___aeabi_dcmpge>:
|
|
10003bf0: b500 push {lr}
|
|
10003bf2: f7ff ffb9 bl 10003b68 <__wrap___aeabi_cdrcmple>
|
|
10003bf6: d901 bls.n 10003bfc <__wrap___aeabi_dcmpge+0xc>
|
|
10003bf8: 2000 movs r0, #0
|
|
10003bfa: bd00 pop {pc}
|
|
10003bfc: 2001 movs r0, #1
|
|
10003bfe: bd00 pop {pc}
|
|
|
|
10003c00 <__wrap___aeabi_dcmpgt>:
|
|
10003c00: b500 push {lr}
|
|
10003c02: f7ff ffb1 bl 10003b68 <__wrap___aeabi_cdrcmple>
|
|
10003c06: 4180 sbcs r0, r0
|
|
10003c08: bd00 pop {pc}
|
|
|
|
10003c0a <__wrap___aeabi_dcmpun>:
|
|
10003c0a: 2001 movs r0, #1
|
|
10003c0c: 0540 lsls r0, r0, #21
|
|
10003c0e: 004a lsls r2, r1, #1
|
|
10003c10: 1812 adds r2, r2, r0
|
|
10003c12: d804 bhi.n 10003c1e <__wrap___aeabi_dcmpun+0x14>
|
|
10003c14: 005a lsls r2, r3, #1
|
|
10003c16: 1812 adds r2, r2, r0
|
|
10003c18: d801 bhi.n 10003c1e <__wrap___aeabi_dcmpun+0x14>
|
|
10003c1a: 2000 movs r0, #0
|
|
10003c1c: 4770 bx lr
|
|
10003c1e: 2001 movs r0, #1
|
|
10003c20: 4770 bx lr
|
|
10003c22: 2000 movs r0, #0
|
|
10003c24: 4770 bx lr
|
|
...
|
|
|
|
10003c28 <__wrap___aeabi_ui2d>:
|
|
10003c28: 2100 movs r1, #0
|
|
10003c2a: 2800 cmp r0, #0
|
|
10003c2c: d105 bne.n 10003c3a <__wrap___aeabi_i2d+0xa>
|
|
10003c2e: 4770 bx lr
|
|
|
|
10003c30 <__wrap___aeabi_i2d>:
|
|
10003c30: 17c1 asrs r1, r0, #31
|
|
10003c32: 4048 eors r0, r1
|
|
10003c34: 1a40 subs r0, r0, r1
|
|
10003c36: d0fa beq.n 10003c2e <__wrap___aeabi_ui2d+0x6>
|
|
10003c38: 07c9 lsls r1, r1, #31
|
|
10003c3a: b513 push {r0, r1, r4, lr}
|
|
10003c3c: 4b06 ldr r3, [pc, #24] @ (10003c58 <__wrap___aeabi_i2d+0x28>)
|
|
10003c3e: 681b ldr r3, [r3, #0]
|
|
10003c40: 4798 blx r3
|
|
10003c42: bc0c pop {r2, r3}
|
|
10003c44: 1c44 adds r4, r0, #1
|
|
10003c46: 40a2 lsls r2, r4
|
|
10003c48: 0510 lsls r0, r2, #20
|
|
10003c4a: 0b12 lsrs r2, r2, #12
|
|
10003c4c: 4903 ldr r1, [pc, #12] @ (10003c5c <__wrap___aeabi_i2d+0x2c>)
|
|
10003c4e: 1b09 subs r1, r1, r4
|
|
10003c50: 0509 lsls r1, r1, #20
|
|
10003c52: 4319 orrs r1, r3
|
|
10003c54: 4311 orrs r1, r2
|
|
10003c56: bd10 pop {r4, pc}
|
|
10003c58: 20000c48 .word 0x20000c48
|
|
10003c5c: 0000041f .word 0x0000041f
|
|
|
|
10003c60 <__wrap___aeabi_d2iz>:
|
|
10003c60: b510 push {r4, lr}
|
|
10003c62: 004c lsls r4, r1, #1
|
|
10003c64: 0d62 lsrs r2, r4, #21
|
|
10003c66: 2380 movs r3, #128 @ 0x80
|
|
10003c68: 18d2 adds r2, r2, r3
|
|
10003c6a: 00db lsls r3, r3, #3
|
|
10003c6c: 1ad2 subs r2, r2, r3
|
|
10003c6e: 055b lsls r3, r3, #21
|
|
10003c70: 2a7e cmp r2, #126 @ 0x7e
|
|
10003c72: dd10 ble.n 10003c96 <__wrap___aeabi_d2iz+0x36>
|
|
10003c74: 3a9e subs r2, #158 @ 0x9e
|
|
10003c76: da13 bge.n 10003ca0 <__wrap___aeabi_d2iz+0x40>
|
|
10003c78: 17cc asrs r4, r1, #31
|
|
10003c7a: 0309 lsls r1, r1, #12
|
|
10003c7c: 0849 lsrs r1, r1, #1
|
|
10003c7e: 4319 orrs r1, r3
|
|
10003c80: 4252 negs r2, r2
|
|
10003c82: 40d1 lsrs r1, r2
|
|
10003c84: 0064 lsls r4, r4, #1
|
|
10003c86: 3401 adds r4, #1
|
|
10003c88: 3215 adds r2, #21
|
|
10003c8a: 2a20 cmp r2, #32
|
|
10003c8c: da05 bge.n 10003c9a <__wrap___aeabi_d2iz+0x3a>
|
|
10003c8e: 40d0 lsrs r0, r2
|
|
10003c90: 4308 orrs r0, r1
|
|
10003c92: 4360 muls r0, r4
|
|
10003c94: bd10 pop {r4, pc}
|
|
10003c96: 2000 movs r0, #0
|
|
10003c98: bd10 pop {r4, pc}
|
|
10003c9a: 4608 mov r0, r1
|
|
10003c9c: 4360 muls r0, r4
|
|
10003c9e: bd10 pop {r4, pc}
|
|
10003ca0: 0fc8 lsrs r0, r1, #31
|
|
10003ca2: 18c0 adds r0, r0, r3
|
|
10003ca4: 3801 subs r0, #1
|
|
10003ca6: bd10 pop {r4, pc}
|
|
|
|
10003ca8 <__wrap___aeabi_d2uiz>:
|
|
10003ca8: b418 push {r3, r4}
|
|
10003caa: 4b04 ldr r3, [pc, #16] @ (10003cbc <__wrap___aeabi_d2uiz+0x14>)
|
|
10003cac: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10003cae: 46fc mov ip, pc
|
|
10003cb0: 9301 str r3, [sp, #4]
|
|
10003cb2: bd08 pop {r3, pc}
|
|
10003cb4: 4239df24 .word 0x4239df24
|
|
10003cb8: 00001000 .word 0x00001000
|
|
10003cbc: 20000b48 .word 0x20000b48
|
|
|
|
10003cc0 <__aeabi_double_init>:
|
|
10003cc0: b570 push {r4, r5, r6, lr}
|
|
10003cc2: 2313 movs r3, #19
|
|
10003cc4: 781c ldrb r4, [r3, #0]
|
|
10003cc6: 2c01 cmp r4, #1
|
|
10003cc8: d012 beq.n 10003cf0 <__aeabi_double_init+0x30>
|
|
10003cca: 2c01 cmp r4, #1
|
|
10003ccc: dc12 bgt.n 10003cf4 <__aeabi_double_init+0x34>
|
|
10003cce: 4b21 ldr r3, [pc, #132] @ (10003d54 <__aeabi_double_init+0x94>)
|
|
10003cd0: 4a21 ldr r2, [pc, #132] @ (10003d58 <__aeabi_double_init+0x98>)
|
|
10003cd2: 6493 str r3, [r2, #72] @ 0x48
|
|
10003cd4: 4821 ldr r0, [pc, #132] @ (10003d5c <__aeabi_double_init+0x9c>)
|
|
10003cd6: f7ff fc7b bl 100035d0 <rom_func_lookup>
|
|
10003cda: 4b21 ldr r3, [pc, #132] @ (10003d60 <__aeabi_double_init+0xa0>)
|
|
10003cdc: 6018 str r0, [r3, #0]
|
|
10003cde: bd70 pop {r4, r5, r6, pc}
|
|
10003ce0: 491c ldr r1, [pc, #112] @ (10003d54 <__aeabi_double_init+0x94>)
|
|
10003ce2: 4a1d ldr r2, [pc, #116] @ (10003d58 <__aeabi_double_init+0x98>)
|
|
10003ce4: 0098 lsls r0, r3, #2
|
|
10003ce6: 5081 str r1, [r0, r2]
|
|
10003ce8: 3301 adds r3, #1
|
|
10003cea: 2b1f cmp r3, #31
|
|
10003cec: d9f8 bls.n 10003ce0 <__aeabi_double_init+0x20>
|
|
10003cee: e7ec b.n 10003cca <__aeabi_double_init+0xa>
|
|
10003cf0: 2300 movs r3, #0
|
|
10003cf2: e7fa b.n 10003cea <__aeabi_double_init+0x2a>
|
|
10003cf4: 481b ldr r0, [pc, #108] @ (10003d64 <__aeabi_double_init+0xa4>)
|
|
10003cf6: f7ff fc73 bl 100035e0 <rom_data_lookup>
|
|
10003cfa: 0005 movs r5, r0
|
|
10003cfc: 481a ldr r0, [pc, #104] @ (10003d68 <__aeabi_double_init+0xa8>)
|
|
10003cfe: f7ff fc6f bl 100035e0 <rom_data_lookup>
|
|
10003d02: 3802 subs r0, #2
|
|
10003d04: 7803 ldrb r3, [r0, #0]
|
|
10003d06: 009b lsls r3, r3, #2
|
|
10003d08: 2b7f cmp r3, #127 @ 0x7f
|
|
10003d0a: dd09 ble.n 10003d20 <__aeabi_double_init+0x60>
|
|
10003d0c: 4812 ldr r0, [pc, #72] @ (10003d58 <__aeabi_double_init+0x98>)
|
|
10003d0e: 2280 movs r2, #128 @ 0x80
|
|
10003d10: 0029 movs r1, r5
|
|
10003d12: f000 fc29 bl 10004568 <__wrap___aeabi_memcpy>
|
|
10003d16: 2c02 cmp r4, #2
|
|
10003d18: d008 beq.n 10003d2c <__aeabi_double_init+0x6c>
|
|
10003d1a: 2c02 cmp r4, #2
|
|
10003d1c: dcda bgt.n 10003cd4 <__aeabi_double_init+0x14>
|
|
10003d1e: e7d6 b.n 10003cce <__aeabi_double_init+0xe>
|
|
10003d20: 4b12 ldr r3, [pc, #72] @ (10003d6c <__aeabi_double_init+0xac>)
|
|
10003d22: 4a13 ldr r2, [pc, #76] @ (10003d70 <__aeabi_double_init+0xb0>)
|
|
10003d24: 4813 ldr r0, [pc, #76] @ (10003d74 <__aeabi_double_init+0xb4>)
|
|
10003d26: 2132 movs r1, #50 @ 0x32
|
|
10003d28: f7fe fabe bl 100022a8 <__assert_func>
|
|
10003d2c: 4b12 ldr r3, [pc, #72] @ (10003d78 <__aeabi_double_init+0xb8>)
|
|
10003d2e: 881a ldrh r2, [r3, #0]
|
|
10003d30: 23b5 movs r3, #181 @ 0xb5
|
|
10003d32: 021b lsls r3, r3, #8
|
|
10003d34: 429a cmp r2, r3
|
|
10003d36: d109 bne.n 10003d4c <__aeabi_double_init+0x8c>
|
|
10003d38: 4b10 ldr r3, [pc, #64] @ (10003d7c <__aeabi_double_init+0xbc>)
|
|
10003d3a: 881a ldrh r2, [r3, #0]
|
|
10003d3c: 4b10 ldr r3, [pc, #64] @ (10003d80 <__aeabi_double_init+0xc0>)
|
|
10003d3e: 429a cmp r2, r3
|
|
10003d40: d104 bne.n 10003d4c <__aeabi_double_init+0x8c>
|
|
10003d42: 4b10 ldr r3, [pc, #64] @ (10003d84 <__aeabi_double_init+0xc4>)
|
|
10003d44: 881a ldrh r2, [r3, #0]
|
|
10003d46: 4b10 ldr r3, [pc, #64] @ (10003d88 <__aeabi_double_init+0xc8>)
|
|
10003d48: 429a cmp r2, r3
|
|
10003d4a: d0e6 beq.n 10003d1a <__aeabi_double_init+0x5a>
|
|
10003d4c: 2000 movs r0, #0
|
|
10003d4e: f7fe fb43 bl 100023d8 <panic>
|
|
10003d52: 46c0 nop @ (mov r8, r8)
|
|
10003d54: 10003d8d .word 0x10003d8d
|
|
10003d58: 20000b48 .word 0x20000b48
|
|
10003d5c: 0000334c .word 0x0000334c
|
|
10003d60: 20000c48 .word 0x20000c48
|
|
10003d64: 00004453 .word 0x00004453
|
|
10003d68: 00004653 .word 0x00004653
|
|
10003d6c: 10006290 .word 0x10006290
|
|
10003d70: 10006344 .word 0x10006344
|
|
10003d74: 100062f0 .word 0x100062f0
|
|
10003d78: 00003854 .word 0x00003854
|
|
10003d7c: 000038d8 .word 0x000038d8
|
|
10003d80: 00004649 .word 0x00004649
|
|
10003d84: 0000389c .word 0x0000389c
|
|
10003d88: 00004659 .word 0x00004659
|
|
|
|
10003d8c <double_table_shim_on_use_helper>:
|
|
10003d8c: b507 push {r0, r1, r2, lr}
|
|
10003d8e: 4660 mov r0, ip
|
|
10003d90: 2800 cmp r0, #0
|
|
10003d92: d100 bne.n 10003d96 <double_table_shim_on_use_helper+0xa>
|
|
10003d94: be00 bkpt 0x0000
|
|
10003d96: 8801 ldrh r1, [r0, #0]
|
|
10003d98: 0a0a lsrs r2, r1, #8
|
|
10003d9a: 3002 adds r0, #2
|
|
10003d9c: 2adf cmp r2, #223 @ 0xdf
|
|
10003d9e: d1fa bne.n 10003d96 <double_table_shim_on_use_helper+0xa>
|
|
10003da0: b2c9 uxtb r1, r1
|
|
10003da2: 0882 lsrs r2, r0, #2
|
|
10003da4: d304 bcc.n 10003db0 <double_table_shim_on_use_helper+0x24>
|
|
10003da6: 8802 ldrh r2, [r0, #0]
|
|
10003da8: 8840 ldrh r0, [r0, #2]
|
|
10003daa: 0400 lsls r0, r0, #16
|
|
10003dac: 4310 orrs r0, r2
|
|
10003dae: e000 b.n 10003db2 <double_table_shim_on_use_helper+0x26>
|
|
10003db0: 6800 ldr r0, [r0, #0]
|
|
10003db2: 4a02 ldr r2, [pc, #8] @ (10003dbc <double_table_shim_on_use_helper+0x30>)
|
|
10003db4: 5050 str r0, [r2, r1]
|
|
10003db6: 9003 str r0, [sp, #12]
|
|
10003db8: bd07 pop {r0, r1, r2, pc}
|
|
10003dba: 0000 .short 0x0000
|
|
10003dbc: 20000b48 .word 0x20000b48
|
|
|
|
10003dc0 <drsub_shim>:
|
|
10003dc0: b40f push {r0, r1, r2, r3}
|
|
10003dc2: bc03 pop {r0, r1}
|
|
10003dc4: bc0c pop {r2, r3}
|
|
|
|
10003dc6 <dsub_shim>:
|
|
10003dc6: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003dc8: 2401 movs r4, #1
|
|
10003dca: 07e4 lsls r4, r4, #31
|
|
10003dcc: 4063 eors r3, r4
|
|
10003dce: e000 b.n 10003dd2 <da_entry>
|
|
|
|
10003dd0 <dadd_shim>:
|
|
10003dd0: b5f0 push {r4, r5, r6, r7, lr}
|
|
|
|
10003dd2 <da_entry>:
|
|
10003dd2: 0d0c lsrs r4, r1, #20
|
|
10003dd4: 0fcf lsrs r7, r1, #31
|
|
10003dd6: 1e66 subs r6, r4, #1
|
|
10003dd8: 0536 lsls r6, r6, #20
|
|
10003dda: 1b89 subs r1, r1, r6
|
|
10003ddc: 0564 lsls r4, r4, #21
|
|
10003dde: d303 bcc.n 10003de8 <l7_1>
|
|
10003de0: 43c9 mvns r1, r1
|
|
10003de2: 4240 negs r0, r0
|
|
10003de4: d300 bcc.n 10003de8 <l7_1>
|
|
10003de6: 3101 adds r1, #1
|
|
|
|
10003de8 <l7_1>:
|
|
10003de8: 0d64 lsrs r4, r4, #21
|
|
10003dea: d003 beq.n 10003df4 <l7_2>
|
|
10003dec: 1c66 adds r6, r4, #1
|
|
10003dee: 0af6 lsrs r6, r6, #11
|
|
10003df0: d007 beq.n 10003e02 <l7_3>
|
|
10003df2: 1be4 subs r4, r4, r7
|
|
|
|
10003df4 <l7_2>:
|
|
10003df4: 2000 movs r0, #0
|
|
10003df6: 007f lsls r7, r7, #1
|
|
10003df8: 1c79 adds r1, r7, #1
|
|
10003dfa: 0789 lsls r1, r1, #30
|
|
10003dfc: 1289 asrs r1, r1, #10
|
|
10003dfe: 3c80 subs r4, #128 @ 0x80
|
|
10003e00: 0324 lsls r4, r4, #12
|
|
|
|
10003e02 <l7_3>:
|
|
10003e02: 0d1d lsrs r5, r3, #20
|
|
10003e04: 0fdf lsrs r7, r3, #31
|
|
10003e06: 1e6e subs r6, r5, #1
|
|
10003e08: 0536 lsls r6, r6, #20
|
|
10003e0a: 1b9b subs r3, r3, r6
|
|
10003e0c: 056d lsls r5, r5, #21
|
|
10003e0e: d303 bcc.n 10003e18 <l8_1>
|
|
10003e10: 43db mvns r3, r3
|
|
10003e12: 4252 negs r2, r2
|
|
10003e14: d300 bcc.n 10003e18 <l8_1>
|
|
10003e16: 3301 adds r3, #1
|
|
|
|
10003e18 <l8_1>:
|
|
10003e18: 0d6d lsrs r5, r5, #21
|
|
10003e1a: d003 beq.n 10003e24 <l8_2>
|
|
10003e1c: 1c6e adds r6, r5, #1
|
|
10003e1e: 0af6 lsrs r6, r6, #11
|
|
10003e20: d007 beq.n 10003e32 <l8_3>
|
|
10003e22: 1bed subs r5, r5, r7
|
|
|
|
10003e24 <l8_2>:
|
|
10003e24: 2200 movs r2, #0
|
|
10003e26: 007f lsls r7, r7, #1
|
|
10003e28: 1c7b adds r3, r7, #1
|
|
10003e2a: 079b lsls r3, r3, #30
|
|
10003e2c: 129b asrs r3, r3, #10
|
|
10003e2e: 3d80 subs r5, #128 @ 0x80
|
|
10003e30: 032d lsls r5, r5, #12
|
|
|
|
10003e32 <l8_3>:
|
|
10003e32: 1b2f subs r7, r5, r4
|
|
10003e34: 1b66 subs r6, r4, r5
|
|
10003e36: d458 bmi.n 10003eea <da_ygtx>
|
|
10003e38: 46a4 mov ip, r4
|
|
10003e3a: 2e20 cmp r6, #32
|
|
10003e3c: da46 bge.n 10003ecc <da_xrgty>
|
|
10003e3e: 3720 adds r7, #32
|
|
10003e40: 0014 movs r4, r2
|
|
10003e42: 40bc lsls r4, r7
|
|
|
|
10003e44 <da_xgty0>:
|
|
10003e44: 001d movs r5, r3
|
|
10003e46: 40bd lsls r5, r7
|
|
10003e48: 40f2 lsrs r2, r6
|
|
10003e4a: 4133 asrs r3, r6
|
|
10003e4c: 432a orrs r2, r5
|
|
|
|
10003e4e <da_add>:
|
|
10003e4e: 1880 adds r0, r0, r2
|
|
10003e50: 4159 adcs r1, r3
|
|
|
|
10003e52 <da_pack>:
|
|
10003e52: 0fcb lsrs r3, r1, #31
|
|
10003e54: d005 beq.n 10003e62 <da_pack+0x10>
|
|
10003e56: 43c9 mvns r1, r1
|
|
10003e58: 43c0 mvns r0, r0
|
|
10003e5a: 2200 movs r2, #0
|
|
10003e5c: 4264 negs r4, r4
|
|
10003e5e: 4150 adcs r0, r2
|
|
10003e60: 4151 adcs r1, r2
|
|
10003e62: 4662 mov r2, ip
|
|
10003e64: 0d4d lsrs r5, r1, #21
|
|
10003e66: d128 bne.n 10003eba <da_0>
|
|
10003e68: 0d0d lsrs r5, r1, #20
|
|
10003e6a: d107 bne.n 10003e7c <da_1>
|
|
10003e6c: 2800 cmp r0, #0
|
|
10003e6e: d01f beq.n 10003eb0 <da_5>
|
|
|
|
10003e70 <da_2>:
|
|
10003e70: 1924 adds r4, r4, r4
|
|
10003e72: 4140 adcs r0, r0
|
|
10003e74: 4149 adcs r1, r1
|
|
10003e76: 3a01 subs r2, #1
|
|
10003e78: 0d0d lsrs r5, r1, #20
|
|
10003e7a: d0f9 beq.n 10003e70 <da_2>
|
|
|
|
10003e7c <da_1>:
|
|
10003e7c: 0064 lsls r4, r4, #1
|
|
10003e7e: d306 bcc.n 10003e8e <da_3>
|
|
|
|
10003e80 <da_4>:
|
|
10003e80: 3001 adds r0, #1
|
|
10003e82: d300 bcc.n 10003e86 <da_4+0x6>
|
|
10003e84: 3101 adds r1, #1
|
|
10003e86: 2c00 cmp r4, #0
|
|
10003e88: d101 bne.n 10003e8e <da_3>
|
|
10003e8a: 0840 lsrs r0, r0, #1
|
|
10003e8c: 0040 lsls r0, r0, #1
|
|
|
|
10003e8e <da_3>:
|
|
10003e8e: 3a01 subs r2, #1
|
|
10003e90: d40b bmi.n 10003eaa <da_6>
|
|
10003e92: 1c94 adds r4, r2, #2
|
|
10003e94: 0ae4 lsrs r4, r4, #11
|
|
10003e96: d104 bne.n 10003ea2 <da_7>
|
|
10003e98: 0512 lsls r2, r2, #20
|
|
10003e9a: 4411 add r1, r2
|
|
10003e9c: 07db lsls r3, r3, #31
|
|
10003e9e: 4419 add r1, r3
|
|
10003ea0: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003ea2 <da_7>:
|
|
10003ea2: 07d9 lsls r1, r3, #31
|
|
10003ea4: 4b20 ldr r3, [pc, #128] @ (10003f28 <da_xmgty+0x4>)
|
|
10003ea6: 4319 orrs r1, r3
|
|
10003ea8: e000 b.n 10003eac <da_6+0x2>
|
|
|
|
10003eaa <da_6>:
|
|
10003eaa: 07d9 lsls r1, r3, #31
|
|
10003eac: 2000 movs r0, #0
|
|
10003eae: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003eb0 <da_5>:
|
|
10003eb0: 2900 cmp r1, #0
|
|
10003eb2: d1dd bne.n 10003e70 <da_2>
|
|
10003eb4: 2c00 cmp r4, #0
|
|
10003eb6: d1db bne.n 10003e70 <da_2>
|
|
10003eb8: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003eba <da_0>:
|
|
10003eba: 3201 adds r2, #1
|
|
10003ebc: 07c6 lsls r6, r0, #31
|
|
10003ebe: 0840 lsrs r0, r0, #1
|
|
10003ec0: 07cd lsls r5, r1, #31
|
|
10003ec2: 4328 orrs r0, r5
|
|
10003ec4: 0849 lsrs r1, r1, #1
|
|
10003ec6: 2e00 cmp r6, #0
|
|
10003ec8: d0e1 beq.n 10003e8e <da_3>
|
|
10003eca: e7d9 b.n 10003e80 <da_4>
|
|
|
|
10003ecc <da_xrgty>:
|
|
10003ecc: 2e3c cmp r6, #60 @ 0x3c
|
|
10003ece: da29 bge.n 10003f24 <da_xmgty>
|
|
10003ed0: 3e20 subs r6, #32
|
|
10003ed2: 3740 adds r7, #64 @ 0x40
|
|
10003ed4: 0014 movs r4, r2
|
|
10003ed6: 40bc lsls r4, r7
|
|
10003ed8: d000 beq.n 10003edc <da_xrgty+0x10>
|
|
10003eda: 2401 movs r4, #1
|
|
10003edc: 40f2 lsrs r2, r6
|
|
10003ede: 4314 orrs r4, r2
|
|
10003ee0: 001a movs r2, r3
|
|
10003ee2: 40bb lsls r3, r7
|
|
10003ee4: 431c orrs r4, r3
|
|
10003ee6: 17d3 asrs r3, r2, #31
|
|
10003ee8: e7ac b.n 10003e44 <da_xgty0>
|
|
|
|
10003eea <da_ygtx>:
|
|
10003eea: 46ac mov ip, r5
|
|
10003eec: 2f20 cmp r7, #32
|
|
10003eee: da08 bge.n 10003f02 <da_yrgtx>
|
|
10003ef0: 3620 adds r6, #32
|
|
10003ef2: 0004 movs r4, r0
|
|
10003ef4: 40b4 lsls r4, r6
|
|
|
|
10003ef6 <da_ygtx0>:
|
|
10003ef6: 000d movs r5, r1
|
|
10003ef8: 40b5 lsls r5, r6
|
|
10003efa: 40f8 lsrs r0, r7
|
|
10003efc: 4139 asrs r1, r7
|
|
10003efe: 4328 orrs r0, r5
|
|
10003f00: e7a5 b.n 10003e4e <da_add>
|
|
|
|
10003f02 <da_yrgtx>:
|
|
10003f02: 2f3c cmp r7, #60 @ 0x3c
|
|
10003f04: da0c bge.n 10003f20 <da_ymgtx>
|
|
10003f06: 3f20 subs r7, #32
|
|
10003f08: 3640 adds r6, #64 @ 0x40
|
|
10003f0a: 0004 movs r4, r0
|
|
10003f0c: 40b4 lsls r4, r6
|
|
10003f0e: d000 beq.n 10003f12 <da_yrgtx+0x10>
|
|
10003f10: 2401 movs r4, #1
|
|
10003f12: 40f8 lsrs r0, r7
|
|
10003f14: 4304 orrs r4, r0
|
|
10003f16: 0008 movs r0, r1
|
|
10003f18: 40b1 lsls r1, r6
|
|
10003f1a: 430c orrs r4, r1
|
|
10003f1c: 17c1 asrs r1, r0, #31
|
|
10003f1e: e7ea b.n 10003ef6 <da_ygtx0>
|
|
|
|
10003f20 <da_ymgtx>:
|
|
10003f20: 0010 movs r0, r2
|
|
10003f22: 0019 movs r1, r3
|
|
|
|
10003f24 <da_xmgty>:
|
|
10003f24: 2400 movs r4, #0
|
|
10003f26: e794 b.n 10003e52 <da_pack>
|
|
10003f28: 7ff00000 .word 0x7ff00000
|
|
|
|
10003f2c <dmul_shim>:
|
|
10003f2c: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003f2e: 0d0c lsrs r4, r1, #20
|
|
10003f30: 1e66 subs r6, r4, #1
|
|
10003f32: 0536 lsls r6, r6, #20
|
|
10003f34: 1b89 subs r1, r1, r6
|
|
10003f36: 0ae6 lsrs r6, r4, #11
|
|
10003f38: 0564 lsls r4, r4, #21
|
|
10003f3a: 0d64 lsrs r4, r4, #21
|
|
10003f3c: d002 beq.n 10003f44 <l11_1>
|
|
10003f3e: 1c65 adds r5, r4, #1
|
|
10003f40: 0aed lsrs r5, r5, #11
|
|
10003f42: d004 beq.n 10003f4e <l11_2>
|
|
|
|
10003f44 <l11_1>:
|
|
10003f44: 2000 movs r0, #0
|
|
10003f46: 2101 movs r1, #1
|
|
10003f48: 0509 lsls r1, r1, #20
|
|
10003f4a: 3c80 subs r4, #128 @ 0x80
|
|
10003f4c: 0324 lsls r4, r4, #12
|
|
|
|
10003f4e <l11_2>:
|
|
10003f4e: 46a4 mov ip, r4
|
|
10003f50: 0d1c lsrs r4, r3, #20
|
|
10003f52: 1e67 subs r7, r4, #1
|
|
10003f54: 053f lsls r7, r7, #20
|
|
10003f56: 1bdb subs r3, r3, r7
|
|
10003f58: 0ae7 lsrs r7, r4, #11
|
|
10003f5a: 0564 lsls r4, r4, #21
|
|
10003f5c: 0d64 lsrs r4, r4, #21
|
|
10003f5e: d002 beq.n 10003f66 <l12_1>
|
|
10003f60: 1c65 adds r5, r4, #1
|
|
10003f62: 0aed lsrs r5, r5, #11
|
|
10003f64: d004 beq.n 10003f70 <l12_2>
|
|
|
|
10003f66 <l12_1>:
|
|
10003f66: 2200 movs r2, #0
|
|
10003f68: 2301 movs r3, #1
|
|
10003f6a: 051b lsls r3, r3, #20
|
|
10003f6c: 3c80 subs r4, #128 @ 0x80
|
|
10003f6e: 0324 lsls r4, r4, #12
|
|
|
|
10003f70 <l12_2>:
|
|
10003f70: 4077 eors r7, r6
|
|
10003f72: 4464 add r4, ip
|
|
10003f74: b497 push {r0, r1, r2, r4, r7}
|
|
10003f76: b284 uxth r4, r0
|
|
10003f78: b296 uxth r6, r2
|
|
10003f7a: 4374 muls r4, r6
|
|
10003f7c: 0c07 lsrs r7, r0, #16
|
|
10003f7e: 437e muls r6, r7
|
|
10003f80: 0c15 lsrs r5, r2, #16
|
|
10003f82: 436f muls r7, r5
|
|
10003f84: b280 uxth r0, r0
|
|
10003f86: 4368 muls r0, r5
|
|
10003f88: 1836 adds r6, r6, r0
|
|
10003f8a: d302 bcc.n 10003f92 <l13_1>
|
|
10003f8c: 2001 movs r0, #1
|
|
10003f8e: 0400 lsls r0, r0, #16
|
|
10003f90: 183f adds r7, r7, r0
|
|
|
|
10003f92 <l13_1>:
|
|
10003f92: 0430 lsls r0, r6, #16
|
|
10003f94: 0c35 lsrs r5, r6, #16
|
|
10003f96: 1900 adds r0, r0, r4
|
|
10003f98: 417d adcs r5, r7
|
|
10003f9a: 4684 mov ip, r0
|
|
10003f9c: b288 uxth r0, r1
|
|
10003f9e: b29a uxth r2, r3
|
|
10003fa0: 4350 muls r0, r2
|
|
10003fa2: 0c0c lsrs r4, r1, #16
|
|
10003fa4: 4362 muls r2, r4
|
|
10003fa6: 0c1f lsrs r7, r3, #16
|
|
10003fa8: 437c muls r4, r7
|
|
10003faa: b28e uxth r6, r1
|
|
10003fac: 437e muls r6, r7
|
|
10003fae: 1992 adds r2, r2, r6
|
|
10003fb0: d302 bcc.n 10003fb8 <l14_1>
|
|
10003fb2: 2601 movs r6, #1
|
|
10003fb4: 0436 lsls r6, r6, #16
|
|
10003fb6: 19a4 adds r4, r4, r6
|
|
|
|
10003fb8 <l14_1>:
|
|
10003fb8: 0416 lsls r6, r2, #16
|
|
10003fba: 0c17 lsrs r7, r2, #16
|
|
10003fbc: 1836 adds r6, r6, r0
|
|
10003fbe: 4167 adcs r7, r4
|
|
10003fc0: bc01 pop {r0}
|
|
10003fc2: b281 uxth r1, r0
|
|
10003fc4: b29a uxth r2, r3
|
|
10003fc6: 4351 muls r1, r2
|
|
10003fc8: 0c04 lsrs r4, r0, #16
|
|
10003fca: 4362 muls r2, r4
|
|
10003fcc: 0c1b lsrs r3, r3, #16
|
|
10003fce: 435c muls r4, r3
|
|
10003fd0: b280 uxth r0, r0
|
|
10003fd2: 4358 muls r0, r3
|
|
10003fd4: 1812 adds r2, r2, r0
|
|
10003fd6: d302 bcc.n 10003fde <l15_1>
|
|
10003fd8: 2001 movs r0, #1
|
|
10003fda: 0400 lsls r0, r0, #16
|
|
10003fdc: 1824 adds r4, r4, r0
|
|
|
|
10003fde <l15_1>:
|
|
10003fde: 0410 lsls r0, r2, #16
|
|
10003fe0: 0c13 lsrs r3, r2, #16
|
|
10003fe2: 1840 adds r0, r0, r1
|
|
10003fe4: 4163 adcs r3, r4
|
|
10003fe6: 182d adds r5, r5, r0
|
|
10003fe8: 415e adcs r6, r3
|
|
10003fea: 2000 movs r0, #0
|
|
10003fec: 4147 adcs r7, r0
|
|
10003fee: bc06 pop {r1, r2}
|
|
10003ff0: b288 uxth r0, r1
|
|
10003ff2: b293 uxth r3, r2
|
|
10003ff4: 4358 muls r0, r3
|
|
10003ff6: 0c0c lsrs r4, r1, #16
|
|
10003ff8: 4363 muls r3, r4
|
|
10003ffa: 0c12 lsrs r2, r2, #16
|
|
10003ffc: 4354 muls r4, r2
|
|
10003ffe: b289 uxth r1, r1
|
|
10004000: 4351 muls r1, r2
|
|
10004002: 185b adds r3, r3, r1
|
|
10004004: d302 bcc.n 1000400c <l16_1>
|
|
10004006: 2101 movs r1, #1
|
|
10004008: 0409 lsls r1, r1, #16
|
|
1000400a: 1864 adds r4, r4, r1
|
|
|
|
1000400c <l16_1>:
|
|
1000400c: 0419 lsls r1, r3, #16
|
|
1000400e: 0c1a lsrs r2, r3, #16
|
|
10004010: 1809 adds r1, r1, r0
|
|
10004012: 4162 adcs r2, r4
|
|
10004014: 186d adds r5, r5, r1
|
|
10004016: 4156 adcs r6, r2
|
|
10004018: 2000 movs r0, #0
|
|
1000401a: 4147 adcs r7, r0
|
|
1000401c: bc18 pop {r3, r4}
|
|
1000401e: 02f9 lsls r1, r7, #11
|
|
10004020: 0d72 lsrs r2, r6, #21
|
|
10004022: 4311 orrs r1, r2
|
|
10004024: 02f0 lsls r0, r6, #11
|
|
10004026: 0d6a lsrs r2, r5, #21
|
|
10004028: 4310 orrs r0, r2
|
|
1000402a: 02ed lsls r5, r5, #11
|
|
1000402c: 0d0a lsrs r2, r1, #20
|
|
1000402e: d103 bne.n 10004038 <l16_1+0x2c>
|
|
10004030: 196d adds r5, r5, r5
|
|
10004032: 4140 adcs r0, r0
|
|
10004034: 4149 adcs r1, r1
|
|
10004036: 3b01 subs r3, #1
|
|
10004038: 4e12 ldr r6, [pc, #72] @ (10004084 <dm_1+0xa>)
|
|
1000403a: 1b9b subs r3, r3, r6
|
|
1000403c: 0076 lsls r6, r6, #1
|
|
1000403e: 42b3 cmp r3, r6
|
|
10004040: d20e bcs.n 10004060 <dm_0>
|
|
10004042: 006d lsls r5, r5, #1
|
|
10004044: d307 bcc.n 10004056 <l16_1+0x4a>
|
|
10004046: 3001 adds r0, #1
|
|
10004048: 2600 movs r6, #0
|
|
1000404a: 4171 adcs r1, r6
|
|
1000404c: 4666 mov r6, ip
|
|
1000404e: 4335 orrs r5, r6
|
|
10004050: d101 bne.n 10004056 <l16_1+0x4a>
|
|
10004052: 0840 lsrs r0, r0, #1
|
|
10004054: 0040 lsls r0, r0, #1
|
|
10004056: 051b lsls r3, r3, #20
|
|
10004058: 18c9 adds r1, r1, r3
|
|
|
|
1000405a <dm_2>:
|
|
1000405a: 07e4 lsls r4, r4, #31
|
|
1000405c: 4421 add r1, r4
|
|
1000405e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10004060 <dm_0>:
|
|
10004060: da0b bge.n 1000407a <dm_1>
|
|
10004062: 3301 adds r3, #1
|
|
10004064: d106 bne.n 10004074 <dm_0+0x14>
|
|
10004066: 3001 adds r0, #1
|
|
10004068: d104 bne.n 10004074 <dm_0+0x14>
|
|
1000406a: 3101 adds r1, #1
|
|
1000406c: 0d4f lsrs r7, r1, #21
|
|
1000406e: d001 beq.n 10004074 <dm_0+0x14>
|
|
10004070: 0849 lsrs r1, r1, #1
|
|
10004072: e7f2 b.n 1000405a <dm_2>
|
|
10004074: 07e1 lsls r1, r4, #31
|
|
10004076: 2000 movs r0, #0
|
|
10004078: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
1000407a <dm_1>:
|
|
1000407a: 3601 adds r6, #1
|
|
1000407c: 0531 lsls r1, r6, #20
|
|
1000407e: 2000 movs r0, #0
|
|
10004080: e7eb b.n 1000405a <dm_2>
|
|
10004082: 0000 .short 0x0000
|
|
10004084: 000003ff .word 0x000003ff
|
|
|
|
10004088 <ddiv_shim>:
|
|
10004088: b5f0 push {r4, r5, r6, r7, lr}
|
|
|
|
1000408a <ddiv0>:
|
|
1000408a: 0d1c lsrs r4, r3, #20
|
|
1000408c: 1e67 subs r7, r4, #1
|
|
1000408e: 053f lsls r7, r7, #20
|
|
10004090: 1bdb subs r3, r3, r7
|
|
10004092: 0ae7 lsrs r7, r4, #11
|
|
10004094: 0564 lsls r4, r4, #21
|
|
10004096: 0d64 lsrs r4, r4, #21
|
|
10004098: d002 beq.n 100040a0 <l19_1>
|
|
1000409a: 1c66 adds r6, r4, #1
|
|
1000409c: 0af6 lsrs r6, r6, #11
|
|
1000409e: d004 beq.n 100040aa <l19_2>
|
|
|
|
100040a0 <l19_1>:
|
|
100040a0: 2200 movs r2, #0
|
|
100040a2: 2301 movs r3, #1
|
|
100040a4: 051b lsls r3, r3, #20
|
|
100040a6: 3c80 subs r4, #128 @ 0x80
|
|
100040a8: 0324 lsls r4, r4, #12
|
|
|
|
100040aa <l19_2>:
|
|
100040aa: 25d0 movs r5, #208 @ 0xd0
|
|
100040ac: 062d lsls r5, r5, #24
|
|
100040ae: 2600 movs r6, #0
|
|
100040b0: 43f6 mvns r6, r6
|
|
100040b2: 662e str r6, [r5, #96] @ 0x60
|
|
100040b4: 091e lsrs r6, r3, #4
|
|
100040b6: 666e str r6, [r5, #100] @ 0x64
|
|
100040b8: 0fce lsrs r6, r1, #31
|
|
100040ba: 19f6 adds r6, r6, r7
|
|
100040bc: 46b4 mov ip, r6
|
|
100040be: 0049 lsls r1, r1, #1
|
|
100040c0: 0d4f lsrs r7, r1, #21
|
|
100040c2: d002 beq.n 100040ca <l19_2+0x20>
|
|
100040c4: 1c7e adds r6, r7, #1
|
|
100040c6: 0af6 lsrs r6, r6, #11
|
|
100040c8: d003 beq.n 100040d2 <l19_2+0x28>
|
|
100040ca: 2000 movs r0, #0
|
|
100040cc: 2100 movs r1, #0
|
|
100040ce: 3f40 subs r7, #64 @ 0x40
|
|
100040d0: 033f lsls r7, r7, #12
|
|
100040d2: 1b3e subs r6, r7, r4
|
|
100040d4: 00b6 lsls r6, r6, #2
|
|
100040d6: 44b4 add ip, r6
|
|
100040d8: 3f01 subs r7, #1
|
|
100040da: 057f lsls r7, r7, #21
|
|
100040dc: 1bc9 subs r1, r1, r7
|
|
100040de: 0849 lsrs r1, r1, #1
|
|
100040e0: 6f2e ldr r6, [r5, #112] @ 0x70
|
|
100040e2: 3601 adds r6, #1
|
|
100040e4: 0876 lsrs r6, r6, #1
|
|
100040e6: 029c lsls r4, r3, #10
|
|
100040e8: 0d95 lsrs r5, r2, #22
|
|
100040ea: 4325 orrs r5, r4
|
|
100040ec: 4375 muls r5, r6
|
|
100040ee: 13ed asrs r5, r5, #15
|
|
100040f0: 4375 muls r5, r6
|
|
100040f2: 13ad asrs r5, r5, #14
|
|
100040f4: 3501 adds r5, #1
|
|
100040f6: 106d asrs r5, r5, #1
|
|
100040f8: 03f6 lsls r6, r6, #15
|
|
100040fa: 1b76 subs r6, r6, r5
|
|
100040fc: b40c push {r2, r3}
|
|
100040fe: 02cc lsls r4, r1, #11
|
|
10004100: 0d45 lsrs r5, r0, #21
|
|
10004102: 432c orrs r4, r5
|
|
10004104: b2a2 uxth r2, r4
|
|
10004106: b2b3 uxth r3, r6
|
|
10004108: 435a muls r2, r3
|
|
1000410a: 0c27 lsrs r7, r4, #16
|
|
1000410c: 437b muls r3, r7
|
|
1000410e: 0c35 lsrs r5, r6, #16
|
|
10004110: 436f muls r7, r5
|
|
10004112: b2a4 uxth r4, r4
|
|
10004114: 436c muls r4, r5
|
|
10004116: 191b adds r3, r3, r4
|
|
10004118: d302 bcc.n 10004120 <l20_1>
|
|
1000411a: 2401 movs r4, #1
|
|
1000411c: 0424 lsls r4, r4, #16
|
|
1000411e: 193f adds r7, r7, r4
|
|
|
|
10004120 <l20_1>:
|
|
10004120: 041c lsls r4, r3, #16
|
|
10004122: 0c1d lsrs r5, r3, #16
|
|
10004124: 18a4 adds r4, r4, r2
|
|
10004126: 417d adcs r5, r7
|
|
10004128: 1924 adds r4, r4, r4
|
|
1000412a: 416d adcs r5, r5
|
|
1000412c: 9a00 ldr r2, [sp, #0]
|
|
1000412e: b291 uxth r1, r2
|
|
10004130: b2ac uxth r4, r5
|
|
10004132: 4361 muls r1, r4
|
|
10004134: 0c17 lsrs r7, r2, #16
|
|
10004136: 437c muls r4, r7
|
|
10004138: 0c2b lsrs r3, r5, #16
|
|
1000413a: 435f muls r7, r3
|
|
1000413c: b292 uxth r2, r2
|
|
1000413e: 435a muls r2, r3
|
|
10004140: 18a4 adds r4, r4, r2
|
|
10004142: d302 bcc.n 1000414a <l21_1>
|
|
10004144: 2201 movs r2, #1
|
|
10004146: 0412 lsls r2, r2, #16
|
|
10004148: 18bf adds r7, r7, r2
|
|
|
|
1000414a <l21_1>:
|
|
1000414a: 0422 lsls r2, r4, #16
|
|
1000414c: 0c23 lsrs r3, r4, #16
|
|
1000414e: 1852 adds r2, r2, r1
|
|
10004150: 417b adcs r3, r7
|
|
10004152: 9c01 ldr r4, [sp, #4]
|
|
10004154: 436c muls r4, r5
|
|
10004156: 191b adds r3, r3, r4
|
|
10004158: 0e52 lsrs r2, r2, #25
|
|
1000415a: 01d9 lsls r1, r3, #7
|
|
1000415c: 430a orrs r2, r1
|
|
1000415e: 0144 lsls r4, r0, #5
|
|
10004160: 1aa0 subs r0, r4, r2
|
|
10004162: b281 uxth r1, r0
|
|
10004164: b2b2 uxth r2, r6
|
|
10004166: 4351 muls r1, r2
|
|
10004168: 1403 asrs r3, r0, #16
|
|
1000416a: 435a muls r2, r3
|
|
1000416c: 0c36 lsrs r6, r6, #16
|
|
1000416e: 4373 muls r3, r6
|
|
10004170: b287 uxth r7, r0
|
|
10004172: 4377 muls r7, r6
|
|
10004174: 17d6 asrs r6, r2, #31
|
|
10004176: 19d2 adds r2, r2, r7
|
|
10004178: 2700 movs r7, #0
|
|
1000417a: 417e adcs r6, r7
|
|
1000417c: 0436 lsls r6, r6, #16
|
|
1000417e: 199b adds r3, r3, r6
|
|
10004180: 0417 lsls r7, r2, #16
|
|
10004182: 0c16 lsrs r6, r2, #16
|
|
10004184: 187f adds r7, r7, r1
|
|
10004186: 415e adcs r6, r3
|
|
10004188: 1673 asrs r3, r6, #25
|
|
1000418a: 18ed adds r5, r5, r3
|
|
1000418c: 01f3 lsls r3, r6, #7
|
|
1000418e: 2600 movs r6, #0
|
|
10004190: 3380 adds r3, #128 @ 0x80
|
|
10004192: 4175 adcs r5, r6
|
|
10004194: 0fa9 lsrs r1, r5, #30
|
|
10004196: d106 bne.n 100041a6 <dd_0>
|
|
10004198: 0064 lsls r4, r4, #1
|
|
1000419a: 0a69 lsrs r1, r5, #9
|
|
1000419c: 05e8 lsls r0, r5, #23
|
|
1000419e: 0a5b lsrs r3, r3, #9
|
|
100041a0: 4318 orrs r0, r3
|
|
100041a2: d209 bcs.n 100041b8 <dd_1>
|
|
100041a4: e02f b.n 10004206 <dd_2>
|
|
|
|
100041a6 <dd_0>:
|
|
100041a6: 2204 movs r2, #4
|
|
100041a8: 4494 add ip, r2
|
|
100041aa: 3380 adds r3, #128 @ 0x80
|
|
100041ac: 4175 adcs r5, r6
|
|
100041ae: 0aa9 lsrs r1, r5, #10
|
|
100041b0: 05a8 lsls r0, r5, #22
|
|
100041b2: 0a9b lsrs r3, r3, #10
|
|
100041b4: 4318 orrs r0, r3
|
|
100041b6: d326 bcc.n 10004206 <dd_2>
|
|
|
|
100041b8 <dd_1>:
|
|
100041b8: 4140 adcs r0, r0
|
|
100041ba: 4149 adcs r1, r1
|
|
100041bc: 0424 lsls r4, r4, #16
|
|
100041be: 9a00 ldr r2, [sp, #0]
|
|
100041c0: 9b01 ldr r3, [sp, #4]
|
|
100041c2: 000d movs r5, r1
|
|
100041c4: 4355 muls r5, r2
|
|
100041c6: 1b64 subs r4, r4, r5
|
|
100041c8: 4343 muls r3, r0
|
|
100041ca: 1ae4 subs r4, r4, r3
|
|
100041cc: b295 uxth r5, r2
|
|
100041ce: b286 uxth r6, r0
|
|
100041d0: 4375 muls r5, r6
|
|
100041d2: 0c17 lsrs r7, r2, #16
|
|
100041d4: 437e muls r6, r7
|
|
100041d6: 0c03 lsrs r3, r0, #16
|
|
100041d8: 435f muls r7, r3
|
|
100041da: b292 uxth r2, r2
|
|
100041dc: 435a muls r2, r3
|
|
100041de: 18b6 adds r6, r6, r2
|
|
100041e0: d302 bcc.n 100041e8 <l23_1>
|
|
100041e2: 2201 movs r2, #1
|
|
100041e4: 0412 lsls r2, r2, #16
|
|
100041e6: 18bf adds r7, r7, r2
|
|
|
|
100041e8 <l23_1>:
|
|
100041e8: 0432 lsls r2, r6, #16
|
|
100041ea: 0c33 lsrs r3, r6, #16
|
|
100041ec: 1952 adds r2, r2, r5
|
|
100041ee: 417b adcs r3, r7
|
|
100041f0: 4252 negs r2, r2
|
|
100041f2: 419c sbcs r4, r3
|
|
100041f4: 2c00 cmp r4, #0
|
|
100041f6: d402 bmi.n 100041fe <l23_1+0x16>
|
|
100041f8: 2200 movs r2, #0
|
|
100041fa: 3001 adds r0, #1
|
|
100041fc: 4151 adcs r1, r2
|
|
100041fe: 0840 lsrs r0, r0, #1
|
|
10004200: 07ca lsls r2, r1, #31
|
|
10004202: 4310 orrs r0, r2
|
|
10004204: 0849 lsrs r1, r1, #1
|
|
|
|
10004206 <dd_2>:
|
|
10004206: b002 add sp, #8
|
|
10004208: 4662 mov r2, ip
|
|
1000420a: 07d7 lsls r7, r2, #31
|
|
1000420c: 1092 asrs r2, r2, #2
|
|
1000420e: 4b08 ldr r3, [pc, #32] @ (10004230 <dd_4+0x6>)
|
|
10004210: 18d2 adds r2, r2, r3
|
|
10004212: 4b08 ldr r3, [pc, #32] @ (10004234 <dd_4+0xa>)
|
|
10004214: 429a cmp r2, r3
|
|
10004216: d203 bcs.n 10004220 <dd_3>
|
|
10004218: 0512 lsls r2, r2, #20
|
|
1000421a: 1889 adds r1, r1, r2
|
|
|
|
1000421c <dd_5>:
|
|
1000421c: 19c9 adds r1, r1, r7
|
|
1000421e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10004220 <dd_3>:
|
|
10004220: 2000 movs r0, #0
|
|
10004222: 2a00 cmp r2, #0
|
|
10004224: dc01 bgt.n 1000422a <dd_4>
|
|
10004226: 0039 movs r1, r7
|
|
10004228: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
1000422a <dd_4>:
|
|
1000422a: 3301 adds r3, #1
|
|
1000422c: 0519 lsls r1, r3, #20
|
|
1000422e: e7f5 b.n 1000421c <dd_5>
|
|
10004230: 000003fd .word 0x000003fd
|
|
10004234: 000007fe .word 0x000007fe
|
|
|
|
10004238 <double2uint_shim>:
|
|
10004238: 2200 movs r2, #0
|
|
|
|
1000423a <double2ufix_shim>:
|
|
1000423a: b500 push {lr}
|
|
1000423c: 3220 adds r2, #32
|
|
1000423e: f000 f804 bl 1000424a <double2ufix64_shim>
|
|
10004242: 0008 movs r0, r1
|
|
10004244: bd00 pop {pc}
|
|
...
|
|
|
|
10004248 <double2uint64_shim>:
|
|
10004248: 2200 movs r2, #0
|
|
|
|
1000424a <double2ufix64_shim>:
|
|
1000424a: 150b asrs r3, r1, #20
|
|
1000424c: d40a bmi.n 10004264 <ret_dzero>
|
|
|
|
1000424e <d2fix>:
|
|
1000424e: b510 push {r4, lr}
|
|
10004250: 4694 mov ip, r2
|
|
10004252: f000 f831 bl 100042b8 <dunpacks>
|
|
10004256: 1414 asrs r4, r2, #16
|
|
10004258: 3401 adds r4, #1
|
|
1000425a: da00 bge.n 1000425e <d2fix+0x10>
|
|
1000425c: 2100 movs r1, #0
|
|
1000425e: 17cb asrs r3, r1, #31
|
|
10004260: 4c14 ldr r4, [pc, #80] @ (100042b4 <d2fix_a+0x4a>)
|
|
10004262: 4720 bx r4
|
|
|
|
10004264 <ret_dzero>:
|
|
10004264: 2000 movs r0, #0
|
|
10004266: 2100 movs r1, #0
|
|
10004268: 4770 bx lr
|
|
|
|
1000426a <d2fix_a>:
|
|
1000426a: 4462 add r2, ip
|
|
1000426c: 3a34 subs r2, #52 @ 0x34
|
|
1000426e: d40c bmi.n 1000428a <d2fix_a+0x20>
|
|
10004270: 2a0c cmp r2, #12
|
|
10004272: da07 bge.n 10004284 <d2fix_a+0x1a>
|
|
10004274: 0004 movs r4, r0
|
|
10004276: 4091 lsls r1, r2
|
|
10004278: 4090 lsls r0, r2
|
|
1000427a: 4252 negs r2, r2
|
|
1000427c: 3220 adds r2, #32
|
|
1000427e: 40d4 lsrs r4, r2
|
|
10004280: 4321 orrs r1, r4
|
|
10004282: bd10 pop {r4, pc}
|
|
10004284: 43d8 mvns r0, r3
|
|
10004286: 43d9 mvns r1, r3
|
|
10004288: bd10 pop {r4, pc}
|
|
1000428a: 3220 adds r2, #32
|
|
1000428c: d407 bmi.n 1000429e <d2fix_a+0x34>
|
|
1000428e: 460c mov r4, r1
|
|
10004290: 4094 lsls r4, r2
|
|
10004292: 4252 negs r2, r2
|
|
10004294: 3220 adds r2, #32
|
|
10004296: 4111 asrs r1, r2
|
|
10004298: 40d0 lsrs r0, r2
|
|
1000429a: 4320 orrs r0, r4
|
|
1000429c: bd10 pop {r4, pc}
|
|
1000429e: 0008 movs r0, r1
|
|
100042a0: 17c9 asrs r1, r1, #31
|
|
100042a2: 3220 adds r2, #32
|
|
100042a4: d403 bmi.n 100042ae <d2fix_a+0x44>
|
|
100042a6: 4252 negs r2, r2
|
|
100042a8: 3220 adds r2, #32
|
|
100042aa: 4110 asrs r0, r2
|
|
100042ac: bd10 pop {r4, pc}
|
|
100042ae: 0018 movs r0, r3
|
|
100042b0: 0019 movs r1, r3
|
|
100042b2: bd10 pop {r4, pc}
|
|
100042b4: 1000426b .word 0x1000426b
|
|
|
|
100042b8 <dunpacks>:
|
|
100042b8: 0d0a lsrs r2, r1, #20
|
|
100042ba: 0fcc lsrs r4, r1, #31
|
|
100042bc: 1e53 subs r3, r2, #1
|
|
100042be: 051b lsls r3, r3, #20
|
|
100042c0: 1ac9 subs r1, r1, r3
|
|
100042c2: 0552 lsls r2, r2, #21
|
|
100042c4: d303 bcc.n 100042ce <l59_1>
|
|
100042c6: 43c9 mvns r1, r1
|
|
100042c8: 4240 negs r0, r0
|
|
100042ca: d300 bcc.n 100042ce <l59_1>
|
|
100042cc: 3101 adds r1, #1
|
|
|
|
100042ce <l59_1>:
|
|
100042ce: 0d52 lsrs r2, r2, #21
|
|
100042d0: d003 beq.n 100042da <l59_2>
|
|
100042d2: 1c53 adds r3, r2, #1
|
|
100042d4: 0adb lsrs r3, r3, #11
|
|
100042d6: d007 beq.n 100042e8 <l59_3>
|
|
100042d8: 1b12 subs r2, r2, r4
|
|
|
|
100042da <l59_2>:
|
|
100042da: 2000 movs r0, #0
|
|
100042dc: 0064 lsls r4, r4, #1
|
|
100042de: 1c61 adds r1, r4, #1
|
|
100042e0: 0789 lsls r1, r1, #30
|
|
100042e2: 1289 asrs r1, r1, #10
|
|
100042e4: 3a80 subs r2, #128 @ 0x80
|
|
100042e6: 0312 lsls r2, r2, #12
|
|
|
|
100042e8 <l59_3>:
|
|
100042e8: 4b01 ldr r3, [pc, #4] @ (100042f0 <l59_3+0x8>)
|
|
100042ea: 1ad2 subs r2, r2, r3
|
|
100042ec: 4770 bx lr
|
|
100042ee: 0000 .short 0x0000
|
|
100042f0: 000003ff .word 0x000003ff
|
|
|
|
100042f4 <__wrap___aeabi_lmul>:
|
|
100042f4: 4351 muls r1, r2
|
|
100042f6: 4343 muls r3, r0
|
|
100042f8: 18c9 adds r1, r1, r3
|
|
100042fa: 468c mov ip, r1
|
|
100042fc: 0c11 lsrs r1, r2, #16
|
|
100042fe: b283 uxth r3, r0
|
|
10004300: 434b muls r3, r1
|
|
10004302: b410 push {r4}
|
|
10004304: 0c04 lsrs r4, r0, #16
|
|
10004306: 4361 muls r1, r4
|
|
10004308: b292 uxth r2, r2
|
|
1000430a: b280 uxth r0, r0
|
|
1000430c: 4350 muls r0, r2
|
|
1000430e: 4362 muls r2, r4
|
|
10004310: 041c lsls r4, r3, #16
|
|
10004312: 0c1b lsrs r3, r3, #16
|
|
10004314: 1900 adds r0, r0, r4
|
|
10004316: bc10 pop {r4}
|
|
10004318: 4159 adcs r1, r3
|
|
1000431a: 0413 lsls r3, r2, #16
|
|
1000431c: 0c12 lsrs r2, r2, #16
|
|
1000431e: 18c0 adds r0, r0, r3
|
|
10004320: 4151 adcs r1, r2
|
|
10004322: 4461 add r1, ip
|
|
10004324: 4770 bx lr
|
|
...
|
|
|
|
10004328 <__wrap___aeabi_frsub>:
|
|
10004328: 4048 eors r0, r1
|
|
1000432a: 4041 eors r1, r0
|
|
1000432c: 4048 eors r0, r1
|
|
|
|
1000432e <__wrap___aeabi_fsub>:
|
|
1000432e: 2300 movs r3, #0
|
|
10004330: 469c mov ip, r3
|
|
10004332: 4b11 ldr r3, [pc, #68] @ (10004378 <__wrap___aeabi_fmul+0xa>)
|
|
10004334: 685b ldr r3, [r3, #4]
|
|
10004336: 4718 bx r3
|
|
|
|
10004338 <__wrap___aeabi_fadd>:
|
|
10004338: 2300 movs r3, #0
|
|
1000433a: 469c mov ip, r3
|
|
1000433c: 4b0e ldr r3, [pc, #56] @ (10004378 <__wrap___aeabi_fmul+0xa>)
|
|
1000433e: 681b ldr r3, [r3, #0]
|
|
10004340: 4718 bx r3
|
|
|
|
10004342 <__wrap___aeabi_fdiv>:
|
|
10004342: 4a0e ldr r2, [pc, #56] @ (1000437c <__wrap___aeabi_fmul+0xe>)
|
|
10004344: 6f93 ldr r3, [r2, #120] @ 0x78
|
|
10004346: 089b lsrs r3, r3, #2
|
|
10004348: d204 bcs.n 10004354 <fdiv_save_state>
|
|
|
|
1000434a <fdiv_shim_call>:
|
|
1000434a: 2300 movs r3, #0
|
|
1000434c: 469c mov ip, r3
|
|
1000434e: 4b0a ldr r3, [pc, #40] @ (10004378 <__wrap___aeabi_fmul+0xa>)
|
|
10004350: 68db ldr r3, [r3, #12]
|
|
10004352: 4718 bx r3
|
|
|
|
10004354 <fdiv_save_state>:
|
|
10004354: b5f0 push {r4, r5, r6, r7, lr}
|
|
10004356: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
10004358: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
1000435a: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
1000435c: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
1000435e: f7ff fff4 bl 1000434a <fdiv_shim_call>
|
|
10004362: 4a06 ldr r2, [pc, #24] @ (1000437c <__wrap___aeabi_fmul+0xe>)
|
|
10004364: 6614 str r4, [r2, #96] @ 0x60
|
|
10004366: 6655 str r5, [r2, #100] @ 0x64
|
|
10004368: 6757 str r7, [r2, #116] @ 0x74
|
|
1000436a: 6716 str r6, [r2, #112] @ 0x70
|
|
1000436c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
1000436e <__wrap___aeabi_fmul>:
|
|
1000436e: 2300 movs r3, #0
|
|
10004370: 469c mov ip, r3
|
|
10004372: 4b01 ldr r3, [pc, #4] @ (10004378 <__wrap___aeabi_fmul+0xa>)
|
|
10004374: 689b ldr r3, [r3, #8]
|
|
10004376: 4718 bx r3
|
|
10004378: 20000c4c .word 0x20000c4c
|
|
1000437c: d0000000 .word 0xd0000000
|
|
|
|
10004380 <__wrap___aeabi_ui2f>:
|
|
10004380: 1a49 subs r1, r1, r1
|
|
10004382: 2800 cmp r0, #0
|
|
10004384: d108 bne.n 10004398 <__aeabi_i2f_main>
|
|
10004386: 4608 mov r0, r1
|
|
10004388: 4770 bx lr
|
|
...
|
|
|
|
1000438c <__wrap___aeabi_i2f>:
|
|
1000438c: 0fc1 lsrs r1, r0, #31
|
|
1000438e: 07c9 lsls r1, r1, #31
|
|
10004390: d500 bpl.n 10004394 <__wrap___aeabi_i2f+0x8>
|
|
10004392: 4240 negs r0, r0
|
|
10004394: 2800 cmp r0, #0
|
|
10004396: d017 beq.n 100043c8 <__aeabi_i2f_main+0x30>
|
|
|
|
10004398 <__aeabi_i2f_main>:
|
|
10004398: 46f4 mov ip, lr
|
|
1000439a: b403 push {r0, r1}
|
|
1000439c: 4b0b ldr r3, [pc, #44] @ (100043cc <__aeabi_i2f_main+0x34>)
|
|
1000439e: 681b ldr r3, [r3, #0]
|
|
100043a0: 4798 blx r3
|
|
100043a2: bc06 pop {r1, r2}
|
|
100043a4: 4081 lsls r1, r0
|
|
100043a6: 389e subs r0, #158 @ 0x9e
|
|
100043a8: 4240 negs r0, r0
|
|
100043aa: 3180 adds r1, #128 @ 0x80
|
|
100043ac: d207 bcs.n 100043be <__aeabi_i2f_main+0x26>
|
|
100043ae: 060b lsls r3, r1, #24
|
|
100043b0: d007 beq.n 100043c2 <__aeabi_i2f_main+0x2a>
|
|
100043b2: 0049 lsls r1, r1, #1
|
|
100043b4: 0a49 lsrs r1, r1, #9
|
|
100043b6: 05c0 lsls r0, r0, #23
|
|
100043b8: 4310 orrs r0, r2
|
|
100043ba: 4308 orrs r0, r1
|
|
100043bc: 4760 bx ip
|
|
100043be: 3001 adds r0, #1
|
|
100043c0: e7f8 b.n 100043b4 <__aeabi_i2f_main+0x1c>
|
|
100043c2: 0a49 lsrs r1, r1, #9
|
|
100043c4: 0289 lsls r1, r1, #10
|
|
100043c6: e7f5 b.n 100043b4 <__aeabi_i2f_main+0x1c>
|
|
100043c8: 4770 bx lr
|
|
100043ca: 0000 .short 0x0000
|
|
100043cc: 20000c48 .word 0x20000c48
|
|
|
|
100043d0 <__wrap___aeabi_f2uiz>:
|
|
100043d0: 2300 movs r3, #0
|
|
100043d2: 469c mov ip, r3
|
|
100043d4: 4b01 ldr r3, [pc, #4] @ (100043dc <__wrap___aeabi_f2uiz+0xc>)
|
|
100043d6: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
100043d8: 4718 bx r3
|
|
100043da: 0000 .short 0x0000
|
|
100043dc: 20000c4c .word 0x20000c4c
|
|
|
|
100043e0 <__aeabi_float_init>:
|
|
100043e0: b570 push {r4, r5, r6, lr}
|
|
100043e2: 2313 movs r3, #19
|
|
100043e4: 781e ldrb r6, [r3, #0]
|
|
100043e6: 482a ldr r0, [pc, #168] @ (10004490 <__aeabi_float_init+0xb0>)
|
|
100043e8: f7ff f8fa bl 100035e0 <rom_data_lookup>
|
|
100043ec: 0005 movs r5, r0
|
|
100043ee: 2e01 cmp r6, #1
|
|
100043f0: d011 beq.n 10004416 <__aeabi_float_init+0x36>
|
|
100043f2: 2e01 cmp r6, #1
|
|
100043f4: dd09 ble.n 1000440a <__aeabi_float_init+0x2a>
|
|
100043f6: 1eab subs r3, r5, #2
|
|
100043f8: 781b ldrb r3, [r3, #0]
|
|
100043fa: 009b lsls r3, r3, #2
|
|
100043fc: 2b7f cmp r3, #127 @ 0x7f
|
|
100043fe: dd40 ble.n 10004482 <__aeabi_float_init+0xa2>
|
|
10004400: 4824 ldr r0, [pc, #144] @ (10004494 <__aeabi_float_init+0xb4>)
|
|
10004402: 2280 movs r2, #128 @ 0x80
|
|
10004404: 0029 movs r1, r5
|
|
10004406: f000 f8af bl 10004568 <__wrap___aeabi_memcpy>
|
|
1000440a: 4823 ldr r0, [pc, #140] @ (10004498 <__aeabi_float_init+0xb8>)
|
|
1000440c: f7ff f8e0 bl 100035d0 <rom_func_lookup>
|
|
10004410: 4b22 ldr r3, [pc, #136] @ (1000449c <__aeabi_float_init+0xbc>)
|
|
10004412: 6018 str r0, [r3, #0]
|
|
10004414: bd70 pop {r4, r5, r6, pc}
|
|
10004416: 481f ldr r0, [pc, #124] @ (10004494 <__aeabi_float_init+0xb4>)
|
|
10004418: 2254 movs r2, #84 @ 0x54
|
|
1000441a: 0029 movs r1, r5
|
|
1000441c: f000 f8a4 bl 10004568 <__wrap___aeabi_memcpy>
|
|
10004420: 4b1f ldr r3, [pc, #124] @ (100044a0 <__aeabi_float_init+0xc0>)
|
|
10004422: 881a ldrh r2, [r3, #0]
|
|
10004424: 4b1f ldr r3, [pc, #124] @ (100044a4 <__aeabi_float_init+0xc4>)
|
|
10004426: 429a cmp r2, r3
|
|
10004428: d11c bne.n 10004464 <__aeabi_float_init+0x84>
|
|
1000442a: 23a7 movs r3, #167 @ 0xa7
|
|
1000442c: 019b lsls r3, r3, #6
|
|
1000442e: 881a ldrh r2, [r3, #0]
|
|
10004430: 4b1d ldr r3, [pc, #116] @ (100044a8 <__aeabi_float_init+0xc8>)
|
|
10004432: 429a cmp r2, r3
|
|
10004434: d116 bne.n 10004464 <__aeabi_float_init+0x84>
|
|
10004436: 4b1d ldr r3, [pc, #116] @ (100044ac <__aeabi_float_init+0xcc>)
|
|
10004438: 881a ldrh r2, [r3, #0]
|
|
1000443a: 4b1d ldr r3, [pc, #116] @ (100044b0 <__aeabi_float_init+0xd0>)
|
|
1000443c: 429a cmp r2, r3
|
|
1000443e: d111 bne.n 10004464 <__aeabi_float_init+0x84>
|
|
10004440: 4b1c ldr r3, [pc, #112] @ (100044b4 <__aeabi_float_init+0xd4>)
|
|
10004442: 881a ldrh r2, [r3, #0]
|
|
10004444: 2394 movs r3, #148 @ 0x94
|
|
10004446: 019b lsls r3, r3, #6
|
|
10004448: 429a cmp r2, r3
|
|
1000444a: d10b bne.n 10004464 <__aeabi_float_init+0x84>
|
|
1000444c: 4b1a ldr r3, [pc, #104] @ (100044b8 <__aeabi_float_init+0xd8>)
|
|
1000444e: 881a ldrh r2, [r3, #0]
|
|
10004450: 4b1a ldr r3, [pc, #104] @ (100044bc <__aeabi_float_init+0xdc>)
|
|
10004452: 429a cmp r2, r3
|
|
10004454: d106 bne.n 10004464 <__aeabi_float_init+0x84>
|
|
10004456: 4b1a ldr r3, [pc, #104] @ (100044c0 <__aeabi_float_init+0xe0>)
|
|
10004458: 681a ldr r2, [r3, #0]
|
|
1000445a: 4b1a ldr r3, [pc, #104] @ (100044c4 <__aeabi_float_init+0xe4>)
|
|
1000445c: 429a cmp r2, r3
|
|
1000445e: d101 bne.n 10004464 <__aeabi_float_init+0x84>
|
|
10004460: 2315 movs r3, #21
|
|
10004462: e007 b.n 10004474 <__aeabi_float_init+0x94>
|
|
10004464: 4818 ldr r0, [pc, #96] @ (100044c8 <__aeabi_float_init+0xe8>)
|
|
10004466: f7fd ffb7 bl 100023d8 <panic>
|
|
1000446a: 4c18 ldr r4, [pc, #96] @ (100044cc <__aeabi_float_init+0xec>)
|
|
1000446c: 4a09 ldr r2, [pc, #36] @ (10004494 <__aeabi_float_init+0xb4>)
|
|
1000446e: 0099 lsls r1, r3, #2
|
|
10004470: 508c str r4, [r1, r2]
|
|
10004472: 3301 adds r3, #1
|
|
10004474: 2b1f cmp r3, #31
|
|
10004476: d9f8 bls.n 1000446a <__aeabi_float_init+0x8a>
|
|
10004478: 4b14 ldr r3, [pc, #80] @ (100044cc <__aeabi_float_init+0xec>)
|
|
1000447a: 4a06 ldr r2, [pc, #24] @ (10004494 <__aeabi_float_init+0xb4>)
|
|
1000447c: 6213 str r3, [r2, #32]
|
|
1000447e: 61d3 str r3, [r2, #28]
|
|
10004480: e7b7 b.n 100043f2 <__aeabi_float_init+0x12>
|
|
10004482: 4b13 ldr r3, [pc, #76] @ (100044d0 <__aeabi_float_init+0xf0>)
|
|
10004484: 4a13 ldr r2, [pc, #76] @ (100044d4 <__aeabi_float_init+0xf4>)
|
|
10004486: 4814 ldr r0, [pc, #80] @ (100044d8 <__aeabi_float_init+0xf8>)
|
|
10004488: 2142 movs r1, #66 @ 0x42
|
|
1000448a: f7fd ff0d bl 100022a8 <__assert_func>
|
|
1000448e: 46c0 nop @ (mov r8, r8)
|
|
10004490: 00004653 .word 0x00004653
|
|
10004494: 20000c4c .word 0x20000c4c
|
|
10004498: 0000334c .word 0x0000334c
|
|
1000449c: 20000c48 .word 0x20000c48
|
|
100044a0: 000029ee .word 0x000029ee
|
|
100044a4: 00000fc4 .word 0x00000fc4
|
|
100044a8: 00000dc2 .word 0x00000dc2
|
|
100044ac: 00002b96 .word 0x00002b96
|
|
100044b0: 0000b5c0 .word 0x0000b5c0
|
|
100044b4: 00002b18 .word 0x00002b18
|
|
100044b8: 00002acc .word 0x00002acc
|
|
100044bc: 0000b510 .word 0x0000b510
|
|
100044c0: 00002cfc .word 0x00002cfc
|
|
100044c4: 6487ed51 .word 0x6487ed51
|
|
100044c8: 10005fc4 .word 0x10005fc4
|
|
100044cc: 100044dd .word 0x100044dd
|
|
100044d0: 10006358 .word 0x10006358
|
|
100044d4: 100063dc .word 0x100063dc
|
|
100044d8: 1000638c .word 0x1000638c
|
|
|
|
100044dc <float_table_shim_on_use_helper>:
|
|
100044dc: b507 push {r0, r1, r2, lr}
|
|
100044de: 4660 mov r0, ip
|
|
100044e0: 2800 cmp r0, #0
|
|
100044e2: d100 bne.n 100044e6 <float_table_shim_on_use_helper+0xa>
|
|
100044e4: be00 bkpt 0x0000
|
|
100044e6: 8801 ldrh r1, [r0, #0]
|
|
100044e8: 0a0a lsrs r2, r1, #8
|
|
100044ea: 3002 adds r0, #2
|
|
100044ec: 2adf cmp r2, #223 @ 0xdf
|
|
100044ee: d1fa bne.n 100044e6 <float_table_shim_on_use_helper+0xa>
|
|
100044f0: b2c9 uxtb r1, r1
|
|
100044f2: 0882 lsrs r2, r0, #2
|
|
100044f4: d304 bcc.n 10004500 <float_table_shim_on_use_helper+0x24>
|
|
100044f6: 8802 ldrh r2, [r0, #0]
|
|
100044f8: 8840 ldrh r0, [r0, #2]
|
|
100044fa: 0400 lsls r0, r0, #16
|
|
100044fc: 4310 orrs r0, r2
|
|
100044fe: e000 b.n 10004502 <float_table_shim_on_use_helper+0x26>
|
|
10004500: 6800 ldr r0, [r0, #0]
|
|
10004502: 4a02 ldr r2, [pc, #8] @ (1000450c <float_table_shim_on_use_helper+0x30>)
|
|
10004504: 5050 str r0, [r2, r1]
|
|
10004506: 9003 str r0, [sp, #12]
|
|
10004508: bd07 pop {r0, r1, r2, pc}
|
|
1000450a: 0000 .short 0x0000
|
|
1000450c: 20000c4c .word 0x20000c4c
|
|
|
|
10004510 <check_alloc>:
|
|
10004510: b510 push {r4, lr}
|
|
10004512: 2800 cmp r0, #0
|
|
10004514: d004 beq.n 10004520 <check_alloc+0x10>
|
|
10004516: 1840 adds r0, r0, r1
|
|
10004518: 4b03 ldr r3, [pc, #12] @ (10004528 <check_alloc+0x18>)
|
|
1000451a: 4298 cmp r0, r3
|
|
1000451c: d800 bhi.n 10004520 <check_alloc+0x10>
|
|
1000451e: bd10 pop {r4, pc}
|
|
10004520: 4802 ldr r0, [pc, #8] @ (1000452c <check_alloc+0x1c>)
|
|
10004522: f7fd ff59 bl 100023d8 <panic>
|
|
10004526: 46c0 nop @ (mov r8, r8)
|
|
10004528: 20040000 .word 0x20040000
|
|
1000452c: 100063f0 .word 0x100063f0
|
|
|
|
10004530 <__wrap_malloc>:
|
|
10004530: b570 push {r4, r5, r6, lr}
|
|
10004532: 0005 movs r5, r0
|
|
10004534: f000 fb24 bl 10004b80 <malloc>
|
|
10004538: 0004 movs r4, r0
|
|
1000453a: 0029 movs r1, r5
|
|
1000453c: f7ff ffe8 bl 10004510 <check_alloc>
|
|
10004540: 0020 movs r0, r4
|
|
10004542: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10004544 <__wrap_free>:
|
|
10004544: b510 push {r4, lr}
|
|
10004546: f000 fb25 bl 10004b94 <free>
|
|
1000454a: bd10 pop {r4, pc}
|
|
|
|
1000454c <__aeabi_mem_init>:
|
|
1000454c: 4801 ldr r0, [pc, #4] @ (10004554 <__aeabi_mem_init+0x8>)
|
|
1000454e: 2104 movs r1, #4
|
|
10004550: 4b01 ldr r3, [pc, #4] @ (10004558 <__aeabi_mem_init+0xc>)
|
|
10004552: 4718 bx r3
|
|
10004554: 200002c0 .word 0x200002c0
|
|
10004558: 100035f1 .word 0x100035f1
|
|
|
|
1000455c <__wrap_memset>:
|
|
1000455c: 4b01 ldr r3, [pc, #4] @ (10004564 <__wrap_memset+0x8>)
|
|
1000455e: 681b ldr r3, [r3, #0]
|
|
10004560: 4718 bx r3
|
|
10004562: 0000 .short 0x0000
|
|
10004564: 200002c0 .word 0x200002c0
|
|
|
|
10004568 <__wrap___aeabi_memcpy>:
|
|
10004568: 4b01 ldr r3, [pc, #4] @ (10004570 <__wrap___aeabi_memcpy+0x8>)
|
|
1000456a: 685b ldr r3, [r3, #4]
|
|
1000456c: 4718 bx r3
|
|
1000456e: 0000 .short 0x0000
|
|
10004570: 200002c0 .word 0x200002c0
|
|
|
|
10004574 <stdio_out_chars_no_crlf>:
|
|
10004574: b510 push {r4, lr}
|
|
10004576: 0003 movs r3, r0
|
|
10004578: 0008 movs r0, r1
|
|
1000457a: 0011 movs r1, r2
|
|
1000457c: 681b ldr r3, [r3, #0]
|
|
1000457e: 4798 blx r3
|
|
10004580: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10004584 <stdio_out_chars_crlf>:
|
|
10004584: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10004586: 0007 movs r7, r0
|
|
10004588: 000d movs r5, r1
|
|
1000458a: 0016 movs r6, r2
|
|
1000458c: 7d43 ldrb r3, [r0, #21]
|
|
1000458e: 2b00 cmp r3, #0
|
|
10004590: d002 beq.n 10004598 <stdio_out_chars_crlf+0x14>
|
|
10004592: 2400 movs r4, #0
|
|
10004594: 2000 movs r0, #0
|
|
10004596: e00c b.n 100045b2 <stdio_out_chars_crlf+0x2e>
|
|
10004598: 6803 ldr r3, [r0, #0]
|
|
1000459a: 0011 movs r1, r2
|
|
1000459c: 0028 movs r0, r5
|
|
1000459e: 4798 blx r3
|
|
100045a0: e02d b.n 100045fe <stdio_out_chars_crlf+0x7a>
|
|
100045a2: 7d3b ldrb r3, [r7, #20]
|
|
100045a4: e010 b.n 100045c8 <stdio_out_chars_crlf+0x44>
|
|
100045a6: 683b ldr r3, [r7, #0]
|
|
100045a8: 4815 ldr r0, [pc, #84] @ (10004600 <stdio_out_chars_crlf+0x7c>)
|
|
100045aa: 2102 movs r1, #2
|
|
100045ac: 4798 blx r3
|
|
100045ae: 1c60 adds r0, r4, #1
|
|
100045b0: 3401 adds r4, #1
|
|
100045b2: 42b4 cmp r4, r6
|
|
100045b4: da14 bge.n 100045e0 <stdio_out_chars_crlf+0x5c>
|
|
100045b6: 2c00 cmp r4, #0
|
|
100045b8: ddf3 ble.n 100045a2 <stdio_out_chars_crlf+0x1e>
|
|
100045ba: 192b adds r3, r5, r4
|
|
100045bc: 3b01 subs r3, #1
|
|
100045be: 781b ldrb r3, [r3, #0]
|
|
100045c0: 3b0d subs r3, #13
|
|
100045c2: 425a negs r2, r3
|
|
100045c4: 4153 adcs r3, r2
|
|
100045c6: b2db uxtb r3, r3
|
|
100045c8: 5d2a ldrb r2, [r5, r4]
|
|
100045ca: 2a0a cmp r2, #10
|
|
100045cc: d1f0 bne.n 100045b0 <stdio_out_chars_crlf+0x2c>
|
|
100045ce: 2b00 cmp r3, #0
|
|
100045d0: d1ee bne.n 100045b0 <stdio_out_chars_crlf+0x2c>
|
|
100045d2: 42a0 cmp r0, r4
|
|
100045d4: dae7 bge.n 100045a6 <stdio_out_chars_crlf+0x22>
|
|
100045d6: 683b ldr r3, [r7, #0]
|
|
100045d8: 1a21 subs r1, r4, r0
|
|
100045da: 1828 adds r0, r5, r0
|
|
100045dc: 4798 blx r3
|
|
100045de: e7e2 b.n 100045a6 <stdio_out_chars_crlf+0x22>
|
|
100045e0: 42b0 cmp r0, r6
|
|
100045e2: da03 bge.n 100045ec <stdio_out_chars_crlf+0x68>
|
|
100045e4: 683b ldr r3, [r7, #0]
|
|
100045e6: 1a31 subs r1, r6, r0
|
|
100045e8: 1828 adds r0, r5, r0
|
|
100045ea: 4798 blx r3
|
|
100045ec: 2e00 cmp r6, #0
|
|
100045ee: dd06 ble.n 100045fe <stdio_out_chars_crlf+0x7a>
|
|
100045f0: 19ad adds r5, r5, r6
|
|
100045f2: 3d01 subs r5, #1
|
|
100045f4: 782b ldrb r3, [r5, #0]
|
|
100045f6: 3b0d subs r3, #13
|
|
100045f8: 425a negs r2, r3
|
|
100045fa: 4153 adcs r3, r2
|
|
100045fc: 753b strb r3, [r7, #20]
|
|
100045fe: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10004600: 10006460 .word 0x10006460
|
|
|
|
10004604 <stdio_stack_buffer_flush>:
|
|
10004604: b570 push {r4, r5, r6, lr}
|
|
10004606: 0005 movs r5, r0
|
|
10004608: 6803 ldr r3, [r0, #0]
|
|
1000460a: 2b00 cmp r3, #0
|
|
1000460c: d016 beq.n 1000463c <stdio_stack_buffer_flush+0x38>
|
|
1000460e: 4b0c ldr r3, [pc, #48] @ (10004640 <stdio_stack_buffer_flush+0x3c>)
|
|
10004610: 681c ldr r4, [r3, #0]
|
|
10004612: e005 b.n 10004620 <stdio_stack_buffer_flush+0x1c>
|
|
10004614: 0029 movs r1, r5
|
|
10004616: c904 ldmia r1!, {r2}
|
|
10004618: 0020 movs r0, r4
|
|
1000461a: f7ff ffb3 bl 10004584 <stdio_out_chars_crlf>
|
|
1000461e: 6924 ldr r4, [r4, #16]
|
|
10004620: 2c00 cmp r4, #0
|
|
10004622: d009 beq.n 10004638 <stdio_stack_buffer_flush+0x34>
|
|
10004624: 6823 ldr r3, [r4, #0]
|
|
10004626: 2b00 cmp r3, #0
|
|
10004628: d0f9 beq.n 1000461e <stdio_stack_buffer_flush+0x1a>
|
|
1000462a: 4b06 ldr r3, [pc, #24] @ (10004644 <stdio_stack_buffer_flush+0x40>)
|
|
1000462c: 681b ldr r3, [r3, #0]
|
|
1000462e: 2b00 cmp r3, #0
|
|
10004630: d0f0 beq.n 10004614 <stdio_stack_buffer_flush+0x10>
|
|
10004632: 42a3 cmp r3, r4
|
|
10004634: d1f3 bne.n 1000461e <stdio_stack_buffer_flush+0x1a>
|
|
10004636: e7ed b.n 10004614 <stdio_stack_buffer_flush+0x10>
|
|
10004638: 2300 movs r3, #0
|
|
1000463a: 602b str r3, [r5, #0]
|
|
1000463c: bd70 pop {r4, r5, r6, pc}
|
|
1000463e: 46c0 nop @ (mov r8, r8)
|
|
10004640: 20000b28 .word 0x20000b28
|
|
10004644: 20000b30 .word 0x20000b30
|
|
|
|
10004648 <stdio_buffered_printer>:
|
|
10004648: b570 push {r4, r5, r6, lr}
|
|
1000464a: 0005 movs r5, r0
|
|
1000464c: 000c movs r4, r1
|
|
1000464e: 680b ldr r3, [r1, #0]
|
|
10004650: 2b80 cmp r3, #128 @ 0x80
|
|
10004652: d005 beq.n 10004660 <stdio_buffered_printer+0x18>
|
|
10004654: 6823 ldr r3, [r4, #0]
|
|
10004656: 1c5a adds r2, r3, #1
|
|
10004658: 6022 str r2, [r4, #0]
|
|
1000465a: 18e4 adds r4, r4, r3
|
|
1000465c: 7125 strb r5, [r4, #4]
|
|
1000465e: bd70 pop {r4, r5, r6, pc}
|
|
10004660: 0008 movs r0, r1
|
|
10004662: f7ff ffcf bl 10004604 <stdio_stack_buffer_flush>
|
|
10004666: e7f5 b.n 10004654 <stdio_buffered_printer+0xc>
|
|
|
|
10004668 <update_us_since_boot>:
|
|
10004668: b510 push {r4, lr}
|
|
1000466a: 2b00 cmp r3, #0
|
|
1000466c: db02 blt.n 10004674 <update_us_since_boot+0xc>
|
|
1000466e: 6002 str r2, [r0, #0]
|
|
10004670: 6043 str r3, [r0, #4]
|
|
10004672: bd10 pop {r4, pc}
|
|
10004674: 4b02 ldr r3, [pc, #8] @ (10004680 <update_us_since_boot+0x18>)
|
|
10004676: 4a03 ldr r2, [pc, #12] @ (10004684 <update_us_since_boot+0x1c>)
|
|
10004678: 4803 ldr r0, [pc, #12] @ (10004688 <update_us_since_boot+0x20>)
|
|
1000467a: 213f movs r1, #63 @ 0x3f
|
|
1000467c: f7fd fe14 bl 100022a8 <__assert_func>
|
|
10004680: 10005594 .word 0x10005594
|
|
10004684: 10006464 .word 0x10006464
|
|
10004688: 100055b0 .word 0x100055b0
|
|
|
|
1000468c <get_absolute_time>:
|
|
1000468c: b510 push {r4, lr}
|
|
1000468e: b082 sub sp, #8
|
|
10004690: 0004 movs r4, r0
|
|
10004692: f7fd f9bb bl 10001a0c <time_us_64>
|
|
10004696: 0002 movs r2, r0
|
|
10004698: 000b movs r3, r1
|
|
1000469a: 4668 mov r0, sp
|
|
1000469c: f7ff ffe4 bl 10004668 <update_us_since_boot>
|
|
100046a0: 9a00 ldr r2, [sp, #0]
|
|
100046a2: 9b01 ldr r3, [sp, #4]
|
|
100046a4: 6022 str r2, [r4, #0]
|
|
100046a6: 6063 str r3, [r4, #4]
|
|
100046a8: 0020 movs r0, r4
|
|
100046aa: b002 add sp, #8
|
|
100046ac: bd10 pop {r4, pc}
|
|
...
|
|
|
|
100046b0 <delayed_by_ms>:
|
|
100046b0: b570 push {r4, r5, r6, lr}
|
|
100046b2: b082 sub sp, #8
|
|
100046b4: 0006 movs r6, r0
|
|
100046b6: 0014 movs r4, r2
|
|
100046b8: 001d movs r5, r3
|
|
100046ba: 22fa movs r2, #250 @ 0xfa
|
|
100046bc: 0092 lsls r2, r2, #2
|
|
100046be: 2300 movs r3, #0
|
|
100046c0: 9806 ldr r0, [sp, #24]
|
|
100046c2: 2100 movs r1, #0
|
|
100046c4: f7ff fe16 bl 100042f4 <__wrap___aeabi_lmul>
|
|
100046c8: 0002 movs r2, r0
|
|
100046ca: 000b movs r3, r1
|
|
100046cc: 1912 adds r2, r2, r4
|
|
100046ce: 416b adcs r3, r5
|
|
100046d0: 2b00 cmp r3, #0
|
|
100046d2: db09 blt.n 100046e8 <delayed_by_ms+0x38>
|
|
100046d4: 4668 mov r0, sp
|
|
100046d6: f7ff ffc7 bl 10004668 <update_us_since_boot>
|
|
100046da: 9a00 ldr r2, [sp, #0]
|
|
100046dc: 9b01 ldr r3, [sp, #4]
|
|
100046de: 6032 str r2, [r6, #0]
|
|
100046e0: 6073 str r3, [r6, #4]
|
|
100046e2: 0030 movs r0, r6
|
|
100046e4: b002 add sp, #8
|
|
100046e6: bd70 pop {r4, r5, r6, pc}
|
|
100046e8: 2201 movs r2, #1
|
|
100046ea: 4252 negs r2, r2
|
|
100046ec: 4b00 ldr r3, [pc, #0] @ (100046f0 <delayed_by_ms+0x40>)
|
|
100046ee: e7f1 b.n 100046d4 <delayed_by_ms+0x24>
|
|
100046f0: 7fffffff .word 0x7fffffff
|
|
|
|
100046f4 <make_timeout_time_ms>:
|
|
100046f4: b530 push {r4, r5, lr}
|
|
100046f6: b085 sub sp, #20
|
|
100046f8: 0004 movs r4, r0
|
|
100046fa: 000d movs r5, r1
|
|
100046fc: a802 add r0, sp, #8
|
|
100046fe: f7ff ffc5 bl 1000468c <get_absolute_time>
|
|
10004702: 9a02 ldr r2, [sp, #8]
|
|
10004704: 9b03 ldr r3, [sp, #12]
|
|
10004706: 9500 str r5, [sp, #0]
|
|
10004708: 0020 movs r0, r4
|
|
1000470a: f7ff ffd1 bl 100046b0 <delayed_by_ms>
|
|
1000470e: 0020 movs r0, r4
|
|
10004710: b005 add sp, #20
|
|
10004712: bd30 pop {r4, r5, pc}
|
|
|
|
10004714 <stdout_serialize_begin>:
|
|
10004714: b500 push {lr}
|
|
10004716: b083 sub sp, #12
|
|
10004718: 21fa movs r1, #250 @ 0xfa
|
|
1000471a: 0089 lsls r1, r1, #2
|
|
1000471c: 4668 mov r0, sp
|
|
1000471e: f7ff ffe9 bl 100046f4 <make_timeout_time_ms>
|
|
10004722: 9a00 ldr r2, [sp, #0]
|
|
10004724: 9b01 ldr r3, [sp, #4]
|
|
10004726: 4802 ldr r0, [pc, #8] @ (10004730 <stdout_serialize_begin+0x1c>)
|
|
10004728: f000 fed6 bl 100054d8 <__mutex_try_enter_block_until_veneer>
|
|
1000472c: b003 add sp, #12
|
|
1000472e: bd00 pop {pc}
|
|
10004730: 20000808 .word 0x20000808
|
|
|
|
10004734 <stdout_serialize_end>:
|
|
10004734: b510 push {r4, lr}
|
|
10004736: 4802 ldr r0, [pc, #8] @ (10004740 <stdout_serialize_end+0xc>)
|
|
10004738: f000 feb6 bl 100054a8 <__mutex_exit_veneer>
|
|
1000473c: bd10 pop {r4, pc}
|
|
1000473e: 46c0 nop @ (mov r8, r8)
|
|
10004740: 20000808 .word 0x20000808
|
|
|
|
10004744 <stdio_put_string>:
|
|
10004744: b5f0 push {r4, r5, r6, r7, lr}
|
|
10004746: 46ce mov lr, r9
|
|
10004748: 4647 mov r7, r8
|
|
1000474a: b580 push {r7, lr}
|
|
1000474c: b083 sub sp, #12
|
|
1000474e: 0006 movs r6, r0
|
|
10004750: 000d movs r5, r1
|
|
10004752: 4690 mov r8, r2
|
|
10004754: 001c movs r4, r3
|
|
10004756: f7ff ffdd bl 10004714 <stdout_serialize_begin>
|
|
1000475a: 4681 mov r9, r0
|
|
1000475c: 1c6b adds r3, r5, #1
|
|
1000475e: d005 beq.n 1000476c <stdio_put_string+0x28>
|
|
10004760: 2c00 cmp r4, #0
|
|
10004762: d008 beq.n 10004776 <stdio_put_string+0x32>
|
|
10004764: 4f19 ldr r7, [pc, #100] @ (100047cc <stdio_put_string+0x88>)
|
|
10004766: 4b1a ldr r3, [pc, #104] @ (100047d0 <stdio_put_string+0x8c>)
|
|
10004768: 681c ldr r4, [r3, #0]
|
|
1000476a: e007 b.n 1000477c <stdio_put_string+0x38>
|
|
1000476c: 0030 movs r0, r6
|
|
1000476e: f000 fd27 bl 100051c0 <strlen>
|
|
10004772: 0005 movs r5, r0
|
|
10004774: e7f4 b.n 10004760 <stdio_put_string+0x1c>
|
|
10004776: 4f17 ldr r7, [pc, #92] @ (100047d4 <stdio_put_string+0x90>)
|
|
10004778: e7f5 b.n 10004766 <stdio_put_string+0x22>
|
|
1000477a: 6924 ldr r4, [r4, #16]
|
|
1000477c: 2c00 cmp r4, #0
|
|
1000477e: d017 beq.n 100047b0 <stdio_put_string+0x6c>
|
|
10004780: 6823 ldr r3, [r4, #0]
|
|
10004782: 2b00 cmp r3, #0
|
|
10004784: d0f9 beq.n 1000477a <stdio_put_string+0x36>
|
|
10004786: 4b14 ldr r3, [pc, #80] @ (100047d8 <stdio_put_string+0x94>)
|
|
10004788: 681b ldr r3, [r3, #0]
|
|
1000478a: 2b00 cmp r3, #0
|
|
1000478c: d001 beq.n 10004792 <stdio_put_string+0x4e>
|
|
1000478e: 42a3 cmp r3, r4
|
|
10004790: d1f3 bne.n 1000477a <stdio_put_string+0x36>
|
|
10004792: 002a movs r2, r5
|
|
10004794: 0031 movs r1, r6
|
|
10004796: 0020 movs r0, r4
|
|
10004798: 47b8 blx r7
|
|
1000479a: 4643 mov r3, r8
|
|
1000479c: 2b00 cmp r3, #0
|
|
1000479e: d0ec beq.n 1000477a <stdio_put_string+0x36>
|
|
100047a0: 466b mov r3, sp
|
|
100047a2: 1dd9 adds r1, r3, #7
|
|
100047a4: 230a movs r3, #10
|
|
100047a6: 700b strb r3, [r1, #0]
|
|
100047a8: 2201 movs r2, #1
|
|
100047aa: 0020 movs r0, r4
|
|
100047ac: 47b8 blx r7
|
|
100047ae: e7e4 b.n 1000477a <stdio_put_string+0x36>
|
|
100047b0: 464b mov r3, r9
|
|
100047b2: 2b00 cmp r3, #0
|
|
100047b4: d107 bne.n 100047c6 <stdio_put_string+0x82>
|
|
100047b6: 1e6b subs r3, r5, #1
|
|
100047b8: 419d sbcs r5, r3
|
|
100047ba: b2e8 uxtb r0, r5
|
|
100047bc: b003 add sp, #12
|
|
100047be: bcc0 pop {r6, r7}
|
|
100047c0: 46b9 mov r9, r7
|
|
100047c2: 46b0 mov r8, r6
|
|
100047c4: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100047c6: f7ff ffb5 bl 10004734 <stdout_serialize_end>
|
|
100047ca: e7f4 b.n 100047b6 <stdio_put_string+0x72>
|
|
100047cc: 10004575 .word 0x10004575
|
|
100047d0: 20000b28 .word 0x20000b28
|
|
100047d4: 10004585 .word 0x10004585
|
|
100047d8: 20000b30 .word 0x20000b30
|
|
|
|
100047dc <stdio_flush>:
|
|
100047dc: b510 push {r4, lr}
|
|
100047de: 4b06 ldr r3, [pc, #24] @ (100047f8 <stdio_flush+0x1c>)
|
|
100047e0: 681c ldr r4, [r3, #0]
|
|
100047e2: e001 b.n 100047e8 <stdio_flush+0xc>
|
|
100047e4: 4798 blx r3
|
|
100047e6: 6924 ldr r4, [r4, #16]
|
|
100047e8: 2c00 cmp r4, #0
|
|
100047ea: d003 beq.n 100047f4 <stdio_flush+0x18>
|
|
100047ec: 6863 ldr r3, [r4, #4]
|
|
100047ee: 2b00 cmp r3, #0
|
|
100047f0: d1f8 bne.n 100047e4 <stdio_flush+0x8>
|
|
100047f2: e7f8 b.n 100047e6 <stdio_flush+0xa>
|
|
100047f4: bd10 pop {r4, pc}
|
|
100047f6: 46c0 nop @ (mov r8, r8)
|
|
100047f8: 20000b28 .word 0x20000b28
|
|
|
|
100047fc <__wrap_puts>:
|
|
100047fc: b570 push {r4, r5, r6, lr}
|
|
100047fe: 0005 movs r5, r0
|
|
10004800: f000 fcde bl 100051c0 <strlen>
|
|
10004804: 0004 movs r4, r0
|
|
10004806: 2300 movs r3, #0
|
|
10004808: 2201 movs r2, #1
|
|
1000480a: 0001 movs r1, r0
|
|
1000480c: 0028 movs r0, r5
|
|
1000480e: f7ff ff99 bl 10004744 <stdio_put_string>
|
|
10004812: f7ff ffe3 bl 100047dc <stdio_flush>
|
|
10004816: 0020 movs r0, r4
|
|
10004818: bd70 pop {r4, r5, r6, pc}
|
|
...
|
|
|
|
1000481c <__wrap_vprintf>:
|
|
1000481c: b570 push {r4, r5, r6, lr}
|
|
1000481e: b0a2 sub sp, #136 @ 0x88
|
|
10004820: 0004 movs r4, r0
|
|
10004822: 000e movs r6, r1
|
|
10004824: f7ff ff76 bl 10004714 <stdout_serialize_begin>
|
|
10004828: 0005 movs r5, r0
|
|
1000482a: 2300 movs r3, #0
|
|
1000482c: 9301 str r3, [sp, #4]
|
|
1000482e: 480a ldr r0, [pc, #40] @ (10004858 <__wrap_vprintf+0x3c>)
|
|
10004830: 0033 movs r3, r6
|
|
10004832: 0022 movs r2, r4
|
|
10004834: a901 add r1, sp, #4
|
|
10004836: f7fe feb3 bl 100035a0 <vfctprintf>
|
|
1000483a: 0004 movs r4, r0
|
|
1000483c: a801 add r0, sp, #4
|
|
1000483e: f7ff fee1 bl 10004604 <stdio_stack_buffer_flush>
|
|
10004842: f7ff ffcb bl 100047dc <stdio_flush>
|
|
10004846: 2d00 cmp r5, #0
|
|
10004848: d102 bne.n 10004850 <__wrap_vprintf+0x34>
|
|
1000484a: 0020 movs r0, r4
|
|
1000484c: b022 add sp, #136 @ 0x88
|
|
1000484e: bd70 pop {r4, r5, r6, pc}
|
|
10004850: f7ff ff70 bl 10004734 <stdout_serialize_end>
|
|
10004854: e7f9 b.n 1000484a <__wrap_vprintf+0x2e>
|
|
10004856: 46c0 nop @ (mov r8, r8)
|
|
10004858: 10004649 .word 0x10004649
|
|
|
|
1000485c <__wrap_printf>:
|
|
1000485c: b40f push {r0, r1, r2, r3}
|
|
1000485e: b500 push {lr}
|
|
10004860: b083 sub sp, #12
|
|
10004862: a904 add r1, sp, #16
|
|
10004864: c901 ldmia r1!, {r0}
|
|
10004866: 9101 str r1, [sp, #4]
|
|
10004868: f7ff ffd8 bl 1000481c <__wrap_vprintf>
|
|
1000486c: b003 add sp, #12
|
|
1000486e: bc08 pop {r3}
|
|
10004870: b004 add sp, #16
|
|
10004872: 4718 bx r3
|
|
|
|
10004874 <pio_get_default_sm_config>:
|
|
10004874: b510 push {r4, lr}
|
|
10004876: 0004 movs r4, r0
|
|
10004878: 2210 movs r2, #16
|
|
1000487a: 2100 movs r1, #0
|
|
1000487c: f7ff fe6e bl 1000455c <__wrap_memset>
|
|
10004880: 2380 movs r3, #128 @ 0x80
|
|
10004882: 025b lsls r3, r3, #9
|
|
10004884: 6023 str r3, [r4, #0]
|
|
10004886: 23f8 movs r3, #248 @ 0xf8
|
|
10004888: 025b lsls r3, r3, #9
|
|
1000488a: 6063 str r3, [r4, #4]
|
|
1000488c: 2380 movs r3, #128 @ 0x80
|
|
1000488e: 02db lsls r3, r3, #11
|
|
10004890: 60a3 str r3, [r4, #8]
|
|
10004892: 23c0 movs r3, #192 @ 0xc0
|
|
10004894: 031b lsls r3, r3, #12
|
|
10004896: 60a3 str r3, [r4, #8]
|
|
10004898: 0020 movs r0, r4
|
|
1000489a: bd10 pop {r4, pc}
|
|
|
|
1000489c <_pio_can_add_program_at_offset>:
|
|
1000489c: 2305 movs r3, #5
|
|
1000489e: 56cb ldrsb r3, [r1, r3]
|
|
100048a0: 2b00 cmp r3, #0
|
|
100048a2: db01 blt.n 100048a8 <_pio_can_add_program_at_offset+0xc>
|
|
100048a4: 4293 cmp r3, r2
|
|
100048a6: d111 bne.n 100048cc <_pio_can_add_program_at_offset+0x30>
|
|
100048a8: 4b09 ldr r3, [pc, #36] @ (100048d0 <_pio_can_add_program_at_offset+0x34>)
|
|
100048aa: 469c mov ip, r3
|
|
100048ac: 4460 add r0, ip
|
|
100048ae: 4243 negs r3, r0
|
|
100048b0: 4158 adcs r0, r3
|
|
100048b2: 4b08 ldr r3, [pc, #32] @ (100048d4 <_pio_can_add_program_at_offset+0x38>)
|
|
100048b4: 0080 lsls r0, r0, #2
|
|
100048b6: 58c0 ldr r0, [r0, r3]
|
|
100048b8: 7909 ldrb r1, [r1, #4]
|
|
100048ba: 2301 movs r3, #1
|
|
100048bc: 408b lsls r3, r1
|
|
100048be: 3b01 subs r3, #1
|
|
100048c0: 4093 lsls r3, r2
|
|
100048c2: 4018 ands r0, r3
|
|
100048c4: 4243 negs r3, r0
|
|
100048c6: 4158 adcs r0, r3
|
|
100048c8: b2c0 uxtb r0, r0
|
|
100048ca: 4770 bx lr
|
|
100048cc: 2000 movs r0, #0
|
|
100048ce: e7fc b.n 100048ca <_pio_can_add_program_at_offset+0x2e>
|
|
100048d0: afd00000 .word 0xafd00000
|
|
100048d4: 20000aa4 .word 0x20000aa4
|
|
|
|
100048d8 <_pio_find_offset_for_program>:
|
|
100048d8: b570 push {r4, r5, r6, lr}
|
|
100048da: 790a ldrb r2, [r1, #4]
|
|
100048dc: 2a20 cmp r2, #32
|
|
100048de: d819 bhi.n 10004914 <_pio_find_offset_for_program+0x3c>
|
|
100048e0: 4b17 ldr r3, [pc, #92] @ (10004940 <_pio_find_offset_for_program+0x68>)
|
|
100048e2: 469c mov ip, r3
|
|
100048e4: 4460 add r0, ip
|
|
100048e6: 4243 negs r3, r0
|
|
100048e8: 4158 adcs r0, r3
|
|
100048ea: 4b16 ldr r3, [pc, #88] @ (10004944 <_pio_find_offset_for_program+0x6c>)
|
|
100048ec: 0080 lsls r0, r0, #2
|
|
100048ee: 58c4 ldr r4, [r0, r3]
|
|
100048f0: 2301 movs r3, #1
|
|
100048f2: 4093 lsls r3, r2
|
|
100048f4: 3b01 subs r3, #1
|
|
100048f6: 7949 ldrb r1, [r1, #5]
|
|
100048f8: b249 sxtb r1, r1
|
|
100048fa: 2900 cmp r1, #0
|
|
100048fc: db10 blt.n 10004920 <_pio_find_offset_for_program+0x48>
|
|
100048fe: 0008 movs r0, r1
|
|
10004900: 2520 movs r5, #32
|
|
10004902: 1aaa subs r2, r5, r2
|
|
10004904: 4291 cmp r1, r2
|
|
10004906: dc18 bgt.n 1000493a <_pio_find_offset_for_program+0x62>
|
|
10004908: 408b lsls r3, r1
|
|
1000490a: 421c tst r4, r3
|
|
1000490c: d001 beq.n 10004912 <_pio_find_offset_for_program+0x3a>
|
|
1000490e: 2001 movs r0, #1
|
|
10004910: 4240 negs r0, r0
|
|
10004912: bd70 pop {r4, r5, r6, pc}
|
|
10004914: 4b0c ldr r3, [pc, #48] @ (10004948 <_pio_find_offset_for_program+0x70>)
|
|
10004916: 4a0d ldr r2, [pc, #52] @ (1000494c <_pio_find_offset_for_program+0x74>)
|
|
10004918: 480d ldr r0, [pc, #52] @ (10004950 <_pio_find_offset_for_program+0x78>)
|
|
1000491a: 2140 movs r1, #64 @ 0x40
|
|
1000491c: f7fd fcc4 bl 100022a8 <__assert_func>
|
|
10004920: 2020 movs r0, #32
|
|
10004922: 1a80 subs r0, r0, r2
|
|
10004924: 2800 cmp r0, #0
|
|
10004926: db05 blt.n 10004934 <_pio_find_offset_for_program+0x5c>
|
|
10004928: 001a movs r2, r3
|
|
1000492a: 4082 lsls r2, r0
|
|
1000492c: 4214 tst r4, r2
|
|
1000492e: d0f0 beq.n 10004912 <_pio_find_offset_for_program+0x3a>
|
|
10004930: 3801 subs r0, #1
|
|
10004932: e7f7 b.n 10004924 <_pio_find_offset_for_program+0x4c>
|
|
10004934: 2001 movs r0, #1
|
|
10004936: 4240 negs r0, r0
|
|
10004938: e7eb b.n 10004912 <_pio_find_offset_for_program+0x3a>
|
|
1000493a: 2001 movs r0, #1
|
|
1000493c: 4240 negs r0, r0
|
|
1000493e: e7e8 b.n 10004912 <_pio_find_offset_for_program+0x3a>
|
|
10004940: afd00000 .word 0xafd00000
|
|
10004944: 20000aa4 .word 0x20000aa4
|
|
10004948: 1000647c .word 0x1000647c
|
|
1000494c: 10006504 .word 0x10006504
|
|
10004950: 100064a8 .word 0x100064a8
|
|
|
|
10004954 <_pio_add_program_at_offset>:
|
|
10004954: b570 push {r4, r5, r6, lr}
|
|
10004956: 0005 movs r5, r0
|
|
10004958: 000c movs r4, r1
|
|
1000495a: 0016 movs r6, r2
|
|
1000495c: f7ff ff9e bl 1000489c <_pio_can_add_program_at_offset>
|
|
10004960: 2800 cmp r0, #0
|
|
10004962: d001 beq.n 10004968 <_pio_add_program_at_offset+0x14>
|
|
10004964: 2100 movs r1, #0
|
|
10004966: e008 b.n 1000497a <_pio_add_program_at_offset+0x26>
|
|
10004968: 4816 ldr r0, [pc, #88] @ (100049c4 <_pio_add_program_at_offset+0x70>)
|
|
1000496a: f7fd fd35 bl 100023d8 <panic>
|
|
1000496e: 199a adds r2, r3, r6
|
|
10004970: 198b adds r3, r1, r6
|
|
10004972: 3312 adds r3, #18
|
|
10004974: 009b lsls r3, r3, #2
|
|
10004976: 515a str r2, [r3, r5]
|
|
10004978: 3101 adds r1, #1
|
|
1000497a: 7923 ldrb r3, [r4, #4]
|
|
1000497c: 428b cmp r3, r1
|
|
1000497e: d911 bls.n 100049a4 <_pio_add_program_at_offset+0x50>
|
|
10004980: 7822 ldrb r2, [r4, #0]
|
|
10004982: 7863 ldrb r3, [r4, #1]
|
|
10004984: 021b lsls r3, r3, #8
|
|
10004986: 4313 orrs r3, r2
|
|
10004988: 78a2 ldrb r2, [r4, #2]
|
|
1000498a: 0412 lsls r2, r2, #16
|
|
1000498c: 431a orrs r2, r3
|
|
1000498e: 78e3 ldrb r3, [r4, #3]
|
|
10004990: 061b lsls r3, r3, #24
|
|
10004992: 4313 orrs r3, r2
|
|
10004994: 004a lsls r2, r1, #1
|
|
10004996: 5a9b ldrh r3, [r3, r2]
|
|
10004998: 2280 movs r2, #128 @ 0x80
|
|
1000499a: 0192 lsls r2, r2, #6
|
|
1000499c: 4293 cmp r3, r2
|
|
1000499e: d3e6 bcc.n 1000496e <_pio_add_program_at_offset+0x1a>
|
|
100049a0: 001a movs r2, r3
|
|
100049a2: e7e5 b.n 10004970 <_pio_add_program_at_offset+0x1c>
|
|
100049a4: 2201 movs r2, #1
|
|
100049a6: 409a lsls r2, r3
|
|
100049a8: 0013 movs r3, r2
|
|
100049aa: 3b01 subs r3, #1
|
|
100049ac: 4a06 ldr r2, [pc, #24] @ (100049c8 <_pio_add_program_at_offset+0x74>)
|
|
100049ae: 4694 mov ip, r2
|
|
100049b0: 4465 add r5, ip
|
|
100049b2: 426a negs r2, r5
|
|
100049b4: 4155 adcs r5, r2
|
|
100049b6: 4905 ldr r1, [pc, #20] @ (100049cc <_pio_add_program_at_offset+0x78>)
|
|
100049b8: 00ad lsls r5, r5, #2
|
|
100049ba: 586a ldr r2, [r5, r1]
|
|
100049bc: 40b3 lsls r3, r6
|
|
100049be: 4313 orrs r3, r2
|
|
100049c0: 506b str r3, [r5, r1]
|
|
100049c2: bd70 pop {r4, r5, r6, pc}
|
|
100049c4: 100064f0 .word 0x100064f0
|
|
100049c8: afd00000 .word 0xafd00000
|
|
100049cc: 20000aa4 .word 0x20000aa4
|
|
|
|
100049d0 <pio_add_program>:
|
|
100049d0: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
100049d2: 0005 movs r5, r0
|
|
100049d4: 000e movs r6, r1
|
|
100049d6: f7fc f849 bl 10000a6c <hw_claim_lock>
|
|
100049da: 0007 movs r7, r0
|
|
100049dc: 0031 movs r1, r6
|
|
100049de: 0028 movs r0, r5
|
|
100049e0: f7ff ff7a bl 100048d8 <_pio_find_offset_for_program>
|
|
100049e4: 1e04 subs r4, r0, #0
|
|
100049e6: db09 blt.n 100049fc <pio_add_program+0x2c>
|
|
100049e8: 0002 movs r2, r0
|
|
100049ea: 0031 movs r1, r6
|
|
100049ec: 0028 movs r0, r5
|
|
100049ee: f7ff ffb1 bl 10004954 <_pio_add_program_at_offset>
|
|
100049f2: 0038 movs r0, r7
|
|
100049f4: f7fc f846 bl 10000a84 <hw_claim_unlock>
|
|
100049f8: 0020 movs r0, r4
|
|
100049fa: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
100049fc: 4801 ldr r0, [pc, #4] @ (10004a04 <pio_add_program+0x34>)
|
|
100049fe: f7fd fceb bl 100023d8 <panic>
|
|
10004a02: 46c0 nop @ (mov r8, r8)
|
|
10004a04: 100064f0 .word 0x100064f0
|
|
|
|
10004a08 <pio_sm_set_consecutive_pindirs>:
|
|
10004a08: b5f0 push {r4, r5, r6, r7, lr}
|
|
10004a0a: 46c6 mov lr, r8
|
|
10004a0c: b500 push {lr}
|
|
10004a0e: ac06 add r4, sp, #24
|
|
10004a10: 7825 ldrb r5, [r4, #0]
|
|
10004a12: 004c lsls r4, r1, #1
|
|
10004a14: 1866 adds r6, r4, r1
|
|
10004a16: 00f6 lsls r6, r6, #3
|
|
10004a18: 1986 adds r6, r0, r6
|
|
10004a1a: 0037 movs r7, r6
|
|
10004a1c: 37dc adds r7, #220 @ 0xdc
|
|
10004a1e: 683f ldr r7, [r7, #0]
|
|
10004a20: 46bc mov ip, r7
|
|
10004a22: 36cc adds r6, #204 @ 0xcc
|
|
10004a24: 6836 ldr r6, [r6, #0]
|
|
10004a26: 46b0 mov r8, r6
|
|
10004a28: 1864 adds r4, r4, r1
|
|
10004a2a: 00e4 lsls r4, r4, #3
|
|
10004a2c: 34c8 adds r4, #200 @ 0xc8
|
|
10004a2e: 1904 adds r4, r0, r4
|
|
10004a30: 3404 adds r4, #4
|
|
10004a32: 26c0 movs r6, #192 @ 0xc0
|
|
10004a34: 01b6 lsls r6, r6, #6
|
|
10004a36: 4334 orrs r4, r6
|
|
10004a38: 2680 movs r6, #128 @ 0x80
|
|
10004a3a: 02b6 lsls r6, r6, #10
|
|
10004a3c: 6026 str r6, [r4, #0]
|
|
10004a3e: 2d00 cmp r5, #0
|
|
10004a40: d001 beq.n 10004a46 <pio_sm_set_consecutive_pindirs+0x3e>
|
|
10004a42: 261f movs r6, #31
|
|
10004a44: e014 b.n 10004a70 <pio_sm_set_consecutive_pindirs+0x68>
|
|
10004a46: 2600 movs r6, #0
|
|
10004a48: e012 b.n 10004a70 <pio_sm_set_consecutive_pindirs+0x68>
|
|
10004a4a: 0154 lsls r4, r2, #5
|
|
10004a4c: 25a0 movs r5, #160 @ 0xa0
|
|
10004a4e: 056d lsls r5, r5, #21
|
|
10004a50: 4325 orrs r5, r4
|
|
10004a52: 004c lsls r4, r1, #1
|
|
10004a54: 1864 adds r4, r4, r1
|
|
10004a56: 00e4 lsls r4, r4, #3
|
|
10004a58: 1904 adds r4, r0, r4
|
|
10004a5a: 0027 movs r7, r4
|
|
10004a5c: 37dc adds r7, #220 @ 0xdc
|
|
10004a5e: 603d str r5, [r7, #0]
|
|
10004a60: 4d11 ldr r5, [pc, #68] @ (10004aa8 <pio_sm_set_consecutive_pindirs+0xa0>)
|
|
10004a62: 4335 orrs r5, r6
|
|
10004a64: 34d8 adds r4, #216 @ 0xd8
|
|
10004a66: 6025 str r5, [r4, #0]
|
|
10004a68: 3b05 subs r3, #5
|
|
10004a6a: 3205 adds r2, #5
|
|
10004a6c: 241f movs r4, #31
|
|
10004a6e: 4022 ands r2, r4
|
|
10004a70: 2b05 cmp r3, #5
|
|
10004a72: d8ea bhi.n 10004a4a <pio_sm_set_consecutive_pindirs+0x42>
|
|
10004a74: 069b lsls r3, r3, #26
|
|
10004a76: 0152 lsls r2, r2, #5
|
|
10004a78: 4313 orrs r3, r2
|
|
10004a7a: 004c lsls r4, r1, #1
|
|
10004a7c: 1862 adds r2, r4, r1
|
|
10004a7e: 00d2 lsls r2, r2, #3
|
|
10004a80: 1882 adds r2, r0, r2
|
|
10004a82: 0015 movs r5, r2
|
|
10004a84: 35dc adds r5, #220 @ 0xdc
|
|
10004a86: 602b str r3, [r5, #0]
|
|
10004a88: 4b07 ldr r3, [pc, #28] @ (10004aa8 <pio_sm_set_consecutive_pindirs+0xa0>)
|
|
10004a8a: 4333 orrs r3, r6
|
|
10004a8c: 32d8 adds r2, #216 @ 0xd8
|
|
10004a8e: 6013 str r3, [r2, #0]
|
|
10004a90: 4663 mov r3, ip
|
|
10004a92: 602b str r3, [r5, #0]
|
|
10004a94: 1864 adds r4, r4, r1
|
|
10004a96: 00e4 lsls r4, r4, #3
|
|
10004a98: 1900 adds r0, r0, r4
|
|
10004a9a: 30cc adds r0, #204 @ 0xcc
|
|
10004a9c: 4643 mov r3, r8
|
|
10004a9e: 6003 str r3, [r0, #0]
|
|
10004aa0: bc80 pop {r7}
|
|
10004aa2: 46b8 mov r8, r7
|
|
10004aa4: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10004aa6: 46c0 nop @ (mov r8, r8)
|
|
10004aa8: 0000e080 .word 0x0000e080
|
|
|
|
10004aac <pio_sm_init>:
|
|
10004aac: b570 push {r4, r5, r6, lr}
|
|
10004aae: b084 sub sp, #16
|
|
10004ab0: 0004 movs r4, r0
|
|
10004ab2: 000d movs r5, r1
|
|
10004ab4: 0016 movs r6, r2
|
|
10004ab6: 6802 ldr r2, [r0, #0]
|
|
10004ab8: 2101 movs r1, #1
|
|
10004aba: 40a9 lsls r1, r5
|
|
10004abc: 438a bics r2, r1
|
|
10004abe: 6002 str r2, [r0, #0]
|
|
10004ac0: 2b00 cmp r3, #0
|
|
10004ac2: d034 beq.n 10004b2e <pio_sm_init+0x82>
|
|
10004ac4: 6818 ldr r0, [r3, #0]
|
|
10004ac6: 0069 lsls r1, r5, #1
|
|
10004ac8: 1949 adds r1, r1, r5
|
|
10004aca: 00c9 lsls r1, r1, #3
|
|
10004acc: 1861 adds r1, r4, r1
|
|
10004ace: 000a movs r2, r1
|
|
10004ad0: 32c8 adds r2, #200 @ 0xc8
|
|
10004ad2: 6010 str r0, [r2, #0]
|
|
10004ad4: 6858 ldr r0, [r3, #4]
|
|
10004ad6: 3204 adds r2, #4
|
|
10004ad8: 6010 str r0, [r2, #0]
|
|
10004ada: 6898 ldr r0, [r3, #8]
|
|
10004adc: 3204 adds r2, #4
|
|
10004ade: 6010 str r0, [r2, #0]
|
|
10004ae0: 68db ldr r3, [r3, #12]
|
|
10004ae2: 31dc adds r1, #220 @ 0xdc
|
|
10004ae4: 600b str r3, [r1, #0]
|
|
10004ae6: 006a lsls r2, r5, #1
|
|
10004ae8: 1953 adds r3, r2, r5
|
|
10004aea: 00db lsls r3, r3, #3
|
|
10004aec: 33d0 adds r3, #208 @ 0xd0
|
|
10004aee: 18e3 adds r3, r4, r3
|
|
10004af0: 2180 movs r1, #128 @ 0x80
|
|
10004af2: 0149 lsls r1, r1, #5
|
|
10004af4: 430b orrs r3, r1
|
|
10004af6: 2180 movs r1, #128 @ 0x80
|
|
10004af8: 0609 lsls r1, r1, #24
|
|
10004afa: 6019 str r1, [r3, #0]
|
|
10004afc: 6019 str r1, [r3, #0]
|
|
10004afe: 4b16 ldr r3, [pc, #88] @ (10004b58 <pio_sm_init+0xac>)
|
|
10004b00: 40ab lsls r3, r5
|
|
10004b02: 60a3 str r3, [r4, #8]
|
|
10004b04: 1d2b adds r3, r5, #4
|
|
10004b06: 2101 movs r1, #1
|
|
10004b08: 0008 movs r0, r1
|
|
10004b0a: 4098 lsls r0, r3
|
|
10004b0c: 2380 movs r3, #128 @ 0x80
|
|
10004b0e: 019b lsls r3, r3, #6
|
|
10004b10: 4323 orrs r3, r4
|
|
10004b12: 6018 str r0, [r3, #0]
|
|
10004b14: 0028 movs r0, r5
|
|
10004b16: 3008 adds r0, #8
|
|
10004b18: 4081 lsls r1, r0
|
|
10004b1a: 6019 str r1, [r3, #0]
|
|
10004b1c: 231f movs r3, #31
|
|
10004b1e: 4033 ands r3, r6
|
|
10004b20: 1952 adds r2, r2, r5
|
|
10004b22: 00d2 lsls r2, r2, #3
|
|
10004b24: 18a4 adds r4, r4, r2
|
|
10004b26: 34d8 adds r4, #216 @ 0xd8
|
|
10004b28: 6023 str r3, [r4, #0]
|
|
10004b2a: b004 add sp, #16
|
|
10004b2c: bd70 pop {r4, r5, r6, pc}
|
|
10004b2e: 4668 mov r0, sp
|
|
10004b30: f7ff fea0 bl 10004874 <pio_get_default_sm_config>
|
|
10004b34: 9900 ldr r1, [sp, #0]
|
|
10004b36: 006b lsls r3, r5, #1
|
|
10004b38: 195b adds r3, r3, r5
|
|
10004b3a: 00db lsls r3, r3, #3
|
|
10004b3c: 18e3 adds r3, r4, r3
|
|
10004b3e: 001a movs r2, r3
|
|
10004b40: 32c8 adds r2, #200 @ 0xc8
|
|
10004b42: 6011 str r1, [r2, #0]
|
|
10004b44: 9901 ldr r1, [sp, #4]
|
|
10004b46: 3204 adds r2, #4
|
|
10004b48: 6011 str r1, [r2, #0]
|
|
10004b4a: 9902 ldr r1, [sp, #8]
|
|
10004b4c: 3204 adds r2, #4
|
|
10004b4e: 6011 str r1, [r2, #0]
|
|
10004b50: 9a03 ldr r2, [sp, #12]
|
|
10004b52: 33dc adds r3, #220 @ 0xdc
|
|
10004b54: 601a str r2, [r3, #0]
|
|
10004b56: e7c6 b.n 10004ae6 <pio_sm_init+0x3a>
|
|
10004b58: 01010101 .word 0x01010101
|
|
|
|
10004b5c <dma_claim_unused_channel>:
|
|
10004b5c: b510 push {r4, lr}
|
|
10004b5e: b082 sub sp, #8
|
|
10004b60: 0001 movs r1, r0
|
|
10004b62: 4c05 ldr r4, [pc, #20] @ (10004b78 <dma_claim_unused_channel+0x1c>)
|
|
10004b64: 4b05 ldr r3, [pc, #20] @ (10004b7c <dma_claim_unused_channel+0x20>)
|
|
10004b66: 9300 str r3, [sp, #0]
|
|
10004b68: 230b movs r3, #11
|
|
10004b6a: 2200 movs r2, #0
|
|
10004b6c: 0020 movs r0, r4
|
|
10004b6e: f7fb ffac bl 10000aca <hw_claim_unused_from_range>
|
|
10004b72: b002 add sp, #8
|
|
10004b74: bd10 pop {r4, pc}
|
|
10004b76: 46c0 nop @ (mov r8, r8)
|
|
10004b78: 20000d84 .word 0x20000d84
|
|
10004b7c: 10006524 .word 0x10006524
|
|
|
|
10004b80 <malloc>:
|
|
10004b80: b510 push {r4, lr}
|
|
10004b82: 4b03 ldr r3, [pc, #12] @ (10004b90 <malloc+0x10>)
|
|
10004b84: 0001 movs r1, r0
|
|
10004b86: 6818 ldr r0, [r3, #0]
|
|
10004b88: f000 f80e bl 10004ba8 <_malloc_r>
|
|
10004b8c: bd10 pop {r4, pc}
|
|
10004b8e: 46c0 nop @ (mov r8, r8)
|
|
10004b90: 200006e0 .word 0x200006e0
|
|
|
|
10004b94 <free>:
|
|
10004b94: b510 push {r4, lr}
|
|
10004b96: 4b03 ldr r3, [pc, #12] @ (10004ba4 <free+0x10>)
|
|
10004b98: 0001 movs r1, r0
|
|
10004b9a: 6818 ldr r0, [r3, #0]
|
|
10004b9c: f000 fb98 bl 100052d0 <_free_r>
|
|
10004ba0: bd10 pop {r4, pc}
|
|
10004ba2: 46c0 nop @ (mov r8, r8)
|
|
10004ba4: 200006e0 .word 0x200006e0
|
|
|
|
10004ba8 <_malloc_r>:
|
|
10004ba8: b5f0 push {r4, r5, r6, r7, lr}
|
|
10004baa: 464e mov r6, r9
|
|
10004bac: 4645 mov r5, r8
|
|
10004bae: 46de mov lr, fp
|
|
10004bb0: 4657 mov r7, sl
|
|
10004bb2: b5e0 push {r5, r6, r7, lr}
|
|
10004bb4: 000d movs r5, r1
|
|
10004bb6: 350b adds r5, #11
|
|
10004bb8: 0006 movs r6, r0
|
|
10004bba: b085 sub sp, #20
|
|
10004bbc: 2d16 cmp r5, #22
|
|
10004bbe: d827 bhi.n 10004c10 <_malloc_r+0x68>
|
|
10004bc0: 2910 cmp r1, #16
|
|
10004bc2: d900 bls.n 10004bc6 <_malloc_r+0x1e>
|
|
10004bc4: e0da b.n 10004d7c <_malloc_r+0x1d4>
|
|
10004bc6: f000 fad1 bl 1000516c <__malloc_lock>
|
|
10004bca: 2510 movs r5, #16
|
|
10004bcc: 2318 movs r3, #24
|
|
10004bce: 2102 movs r1, #2
|
|
10004bd0: 4fc7 ldr r7, [pc, #796] @ (10004ef0 <_malloc_r+0x348>)
|
|
10004bd2: 18fb adds r3, r7, r3
|
|
10004bd4: 001a movs r2, r3
|
|
10004bd6: 685c ldr r4, [r3, #4]
|
|
10004bd8: 3a08 subs r2, #8
|
|
10004bda: 4294 cmp r4, r2
|
|
10004bdc: d100 bne.n 10004be0 <_malloc_r+0x38>
|
|
10004bde: e146 b.n 10004e6e <_malloc_r+0x2c6>
|
|
10004be0: 2203 movs r2, #3
|
|
10004be2: 6863 ldr r3, [r4, #4]
|
|
10004be4: 68a1 ldr r1, [r4, #8]
|
|
10004be6: 4393 bics r3, r2
|
|
10004be8: 68e2 ldr r2, [r4, #12]
|
|
10004bea: 60ca str r2, [r1, #12]
|
|
10004bec: 6091 str r1, [r2, #8]
|
|
10004bee: 2101 movs r1, #1
|
|
10004bf0: 18e3 adds r3, r4, r3
|
|
10004bf2: 685a ldr r2, [r3, #4]
|
|
10004bf4: 0030 movs r0, r6
|
|
10004bf6: 430a orrs r2, r1
|
|
10004bf8: 605a str r2, [r3, #4]
|
|
10004bfa: f000 fab9 bl 10005170 <__malloc_unlock>
|
|
10004bfe: 0020 movs r0, r4
|
|
10004c00: 3008 adds r0, #8
|
|
10004c02: b005 add sp, #20
|
|
10004c04: bcf0 pop {r4, r5, r6, r7}
|
|
10004c06: 46bb mov fp, r7
|
|
10004c08: 46b2 mov sl, r6
|
|
10004c0a: 46a9 mov r9, r5
|
|
10004c0c: 46a0 mov r8, r4
|
|
10004c0e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10004c10: 2307 movs r3, #7
|
|
10004c12: 439d bics r5, r3
|
|
10004c14: d500 bpl.n 10004c18 <_malloc_r+0x70>
|
|
10004c16: e0b1 b.n 10004d7c <_malloc_r+0x1d4>
|
|
10004c18: 42a9 cmp r1, r5
|
|
10004c1a: d900 bls.n 10004c1e <_malloc_r+0x76>
|
|
10004c1c: e0ae b.n 10004d7c <_malloc_r+0x1d4>
|
|
10004c1e: f000 faa5 bl 1000516c <__malloc_lock>
|
|
10004c22: 23fc movs r3, #252 @ 0xfc
|
|
10004c24: 005b lsls r3, r3, #1
|
|
10004c26: 429d cmp r5, r3
|
|
10004c28: d200 bcs.n 10004c2c <_malloc_r+0x84>
|
|
10004c2a: e19a b.n 10004f62 <_malloc_r+0x3ba>
|
|
10004c2c: 0a69 lsrs r1, r5, #9
|
|
10004c2e: d100 bne.n 10004c32 <_malloc_r+0x8a>
|
|
10004c30: e0a8 b.n 10004d84 <_malloc_r+0x1dc>
|
|
10004c32: 2904 cmp r1, #4
|
|
10004c34: d900 bls.n 10004c38 <_malloc_r+0x90>
|
|
10004c36: e14f b.n 10004ed8 <_malloc_r+0x330>
|
|
10004c38: 2338 movs r3, #56 @ 0x38
|
|
10004c3a: 4698 mov r8, r3
|
|
10004c3c: 09a9 lsrs r1, r5, #6
|
|
10004c3e: 4488 add r8, r1
|
|
10004c40: 3139 adds r1, #57 @ 0x39
|
|
10004c42: 00cb lsls r3, r1, #3
|
|
10004c44: 2208 movs r2, #8
|
|
10004c46: 4252 negs r2, r2
|
|
10004c48: 4694 mov ip, r2
|
|
10004c4a: 4fa9 ldr r7, [pc, #676] @ (10004ef0 <_malloc_r+0x348>)
|
|
10004c4c: 18fb adds r3, r7, r3
|
|
10004c4e: 449c add ip, r3
|
|
10004c50: 4663 mov r3, ip
|
|
10004c52: 68dc ldr r4, [r3, #12]
|
|
10004c54: 45a4 cmp ip, r4
|
|
10004c56: d014 beq.n 10004c82 <_malloc_r+0xda>
|
|
10004c58: 2303 movs r3, #3
|
|
10004c5a: 4699 mov r9, r3
|
|
10004c5c: 000b movs r3, r1
|
|
10004c5e: 4661 mov r1, ip
|
|
10004c60: 469c mov ip, r3
|
|
10004c62: e007 b.n 10004c74 <_malloc_r+0xcc>
|
|
10004c64: 68e0 ldr r0, [r4, #12]
|
|
10004c66: 2a00 cmp r2, #0
|
|
10004c68: db00 blt.n 10004c6c <_malloc_r+0xc4>
|
|
10004c6a: e0fa b.n 10004e62 <_malloc_r+0x2ba>
|
|
10004c6c: 4281 cmp r1, r0
|
|
10004c6e: d100 bne.n 10004c72 <_malloc_r+0xca>
|
|
10004c70: e0fb b.n 10004e6a <_malloc_r+0x2c2>
|
|
10004c72: 0004 movs r4, r0
|
|
10004c74: 464a mov r2, r9
|
|
10004c76: 6863 ldr r3, [r4, #4]
|
|
10004c78: 4393 bics r3, r2
|
|
10004c7a: 1b5a subs r2, r3, r5
|
|
10004c7c: 2a0f cmp r2, #15
|
|
10004c7e: ddf1 ble.n 10004c64 <_malloc_r+0xbc>
|
|
10004c80: 4641 mov r1, r8
|
|
10004c82: 003a movs r2, r7
|
|
10004c84: 693c ldr r4, [r7, #16]
|
|
10004c86: 3208 adds r2, #8
|
|
10004c88: 4294 cmp r4, r2
|
|
10004c8a: d100 bne.n 10004c8e <_malloc_r+0xe6>
|
|
10004c8c: e0d8 b.n 10004e40 <_malloc_r+0x298>
|
|
10004c8e: 2003 movs r0, #3
|
|
10004c90: 6863 ldr r3, [r4, #4]
|
|
10004c92: 4383 bics r3, r0
|
|
10004c94: 1b58 subs r0, r3, r5
|
|
10004c96: 280f cmp r0, #15
|
|
10004c98: dd00 ble.n 10004c9c <_malloc_r+0xf4>
|
|
10004c9a: e166 b.n 10004f6a <_malloc_r+0x3c2>
|
|
10004c9c: 613a str r2, [r7, #16]
|
|
10004c9e: 617a str r2, [r7, #20]
|
|
10004ca0: 2800 cmp r0, #0
|
|
10004ca2: daa4 bge.n 10004bee <_malloc_r+0x46>
|
|
10004ca4: 687a ldr r2, [r7, #4]
|
|
10004ca6: 4690 mov r8, r2
|
|
10004ca8: 2280 movs r2, #128 @ 0x80
|
|
10004caa: 0092 lsls r2, r2, #2
|
|
10004cac: 4293 cmp r3, r2
|
|
10004cae: d300 bcc.n 10004cb2 <_malloc_r+0x10a>
|
|
10004cb0: e0e3 b.n 10004e7a <_malloc_r+0x2d2>
|
|
10004cb2: 08da lsrs r2, r3, #3
|
|
10004cb4: 0958 lsrs r0, r3, #5
|
|
10004cb6: 2301 movs r3, #1
|
|
10004cb8: 4083 lsls r3, r0
|
|
10004cba: 4640 mov r0, r8
|
|
10004cbc: 4318 orrs r0, r3
|
|
10004cbe: 4680 mov r8, r0
|
|
10004cc0: 00d3 lsls r3, r2, #3
|
|
10004cc2: 19db adds r3, r3, r7
|
|
10004cc4: 689a ldr r2, [r3, #8]
|
|
10004cc6: 6078 str r0, [r7, #4]
|
|
10004cc8: 60e3 str r3, [r4, #12]
|
|
10004cca: 60a2 str r2, [r4, #8]
|
|
10004ccc: 609c str r4, [r3, #8]
|
|
10004cce: 60d4 str r4, [r2, #12]
|
|
10004cd0: 2001 movs r0, #1
|
|
10004cd2: 108b asrs r3, r1, #2
|
|
10004cd4: 4098 lsls r0, r3
|
|
10004cd6: 4540 cmp r0, r8
|
|
10004cd8: d85c bhi.n 10004d94 <_malloc_r+0x1ec>
|
|
10004cda: 4643 mov r3, r8
|
|
10004cdc: 4203 tst r3, r0
|
|
10004cde: d10a bne.n 10004cf6 <_malloc_r+0x14e>
|
|
10004ce0: 2303 movs r3, #3
|
|
10004ce2: 4399 bics r1, r3
|
|
10004ce4: 4643 mov r3, r8
|
|
10004ce6: 0040 lsls r0, r0, #1
|
|
10004ce8: 3104 adds r1, #4
|
|
10004cea: 4203 tst r3, r0
|
|
10004cec: d103 bne.n 10004cf6 <_malloc_r+0x14e>
|
|
10004cee: 0040 lsls r0, r0, #1
|
|
10004cf0: 3104 adds r1, #4
|
|
10004cf2: 4203 tst r3, r0
|
|
10004cf4: d0fb beq.n 10004cee <_malloc_r+0x146>
|
|
10004cf6: 2303 movs r3, #3
|
|
10004cf8: 46b3 mov fp, r6
|
|
10004cfa: 469c mov ip, r3
|
|
10004cfc: 000e movs r6, r1
|
|
10004cfe: 46b8 mov r8, r7
|
|
10004d00: 9001 str r0, [sp, #4]
|
|
10004d02: 00f0 lsls r0, r6, #3
|
|
10004d04: 4440 add r0, r8
|
|
10004d06: 0001 movs r1, r0
|
|
10004d08: 46b2 mov sl, r6
|
|
10004d0a: 68cb ldr r3, [r1, #12]
|
|
10004d0c: e00b b.n 10004d26 <_malloc_r+0x17e>
|
|
10004d0e: 4664 mov r4, ip
|
|
10004d10: 685a ldr r2, [r3, #4]
|
|
10004d12: 001f movs r7, r3
|
|
10004d14: 43a2 bics r2, r4
|
|
10004d16: 68db ldr r3, [r3, #12]
|
|
10004d18: 1b54 subs r4, r2, r5
|
|
10004d1a: 2c0f cmp r4, #15
|
|
10004d1c: dd00 ble.n 10004d20 <_malloc_r+0x178>
|
|
10004d1e: e0f3 b.n 10004f08 <_malloc_r+0x360>
|
|
10004d20: 2c00 cmp r4, #0
|
|
10004d22: db00 blt.n 10004d26 <_malloc_r+0x17e>
|
|
10004d24: e10d b.n 10004f42 <_malloc_r+0x39a>
|
|
10004d26: 4299 cmp r1, r3
|
|
10004d28: d1f1 bne.n 10004d0e <_malloc_r+0x166>
|
|
10004d2a: 2301 movs r3, #1
|
|
10004d2c: 4699 mov r9, r3
|
|
10004d2e: 44ca add sl, r9
|
|
10004d30: 4653 mov r3, sl
|
|
10004d32: 3108 adds r1, #8
|
|
10004d34: 079b lsls r3, r3, #30
|
|
10004d36: d1e8 bne.n 10004d0a <_malloc_r+0x162>
|
|
10004d38: 2203 movs r2, #3
|
|
10004d3a: e005 b.n 10004d48 <_malloc_r+0x1a0>
|
|
10004d3c: 6803 ldr r3, [r0, #0]
|
|
10004d3e: 3808 subs r0, #8
|
|
10004d40: 3e01 subs r6, #1
|
|
10004d42: 4283 cmp r3, r0
|
|
10004d44: d000 beq.n 10004d48 <_malloc_r+0x1a0>
|
|
10004d46: e20a b.n 1000515e <_malloc_r+0x5b6>
|
|
10004d48: 4232 tst r2, r6
|
|
10004d4a: d1f7 bne.n 10004d3c <_malloc_r+0x194>
|
|
10004d4c: 4643 mov r3, r8
|
|
10004d4e: 9a01 ldr r2, [sp, #4]
|
|
10004d50: 685b ldr r3, [r3, #4]
|
|
10004d52: 4393 bics r3, r2
|
|
10004d54: 4642 mov r2, r8
|
|
10004d56: 6053 str r3, [r2, #4]
|
|
10004d58: 9a01 ldr r2, [sp, #4]
|
|
10004d5a: 0052 lsls r2, r2, #1
|
|
10004d5c: 9201 str r2, [sp, #4]
|
|
10004d5e: 429a cmp r2, r3
|
|
10004d60: d816 bhi.n 10004d90 <_malloc_r+0x1e8>
|
|
10004d62: 2a00 cmp r2, #0
|
|
10004d64: d106 bne.n 10004d74 <_malloc_r+0x1cc>
|
|
10004d66: e013 b.n 10004d90 <_malloc_r+0x1e8>
|
|
10004d68: 2204 movs r2, #4
|
|
10004d6a: 4691 mov r9, r2
|
|
10004d6c: 9a01 ldr r2, [sp, #4]
|
|
10004d6e: 44ca add sl, r9
|
|
10004d70: 0052 lsls r2, r2, #1
|
|
10004d72: 9201 str r2, [sp, #4]
|
|
10004d74: 4213 tst r3, r2
|
|
10004d76: d0f7 beq.n 10004d68 <_malloc_r+0x1c0>
|
|
10004d78: 4656 mov r6, sl
|
|
10004d7a: e7c2 b.n 10004d02 <_malloc_r+0x15a>
|
|
10004d7c: 230c movs r3, #12
|
|
10004d7e: 2000 movs r0, #0
|
|
10004d80: 6033 str r3, [r6, #0]
|
|
10004d82: e73e b.n 10004c02 <_malloc_r+0x5a>
|
|
10004d84: 2380 movs r3, #128 @ 0x80
|
|
10004d86: 223f movs r2, #63 @ 0x3f
|
|
10004d88: 2140 movs r1, #64 @ 0x40
|
|
10004d8a: 4690 mov r8, r2
|
|
10004d8c: 009b lsls r3, r3, #2
|
|
10004d8e: e759 b.n 10004c44 <_malloc_r+0x9c>
|
|
10004d90: 465e mov r6, fp
|
|
10004d92: 4647 mov r7, r8
|
|
10004d94: 2203 movs r2, #3
|
|
10004d96: 68bc ldr r4, [r7, #8]
|
|
10004d98: 6863 ldr r3, [r4, #4]
|
|
10004d9a: 4393 bics r3, r2
|
|
10004d9c: 4699 mov r9, r3
|
|
10004d9e: 42ab cmp r3, r5
|
|
10004da0: d302 bcc.n 10004da8 <_malloc_r+0x200>
|
|
10004da2: 1b5b subs r3, r3, r5
|
|
10004da4: 2b0f cmp r3, #15
|
|
10004da6: dc4e bgt.n 10004e46 <_malloc_r+0x29e>
|
|
10004da8: 0023 movs r3, r4
|
|
10004daa: 444b add r3, r9
|
|
10004dac: 9302 str r3, [sp, #8]
|
|
10004dae: 4b51 ldr r3, [pc, #324] @ (10004ef4 <_malloc_r+0x34c>)
|
|
10004db0: 2008 movs r0, #8
|
|
10004db2: 681b ldr r3, [r3, #0]
|
|
10004db4: 3310 adds r3, #16
|
|
10004db6: 195b adds r3, r3, r5
|
|
10004db8: 9301 str r3, [sp, #4]
|
|
10004dba: f000 f9f3 bl 100051a4 <sysconf>
|
|
10004dbe: 494e ldr r1, [pc, #312] @ (10004ef8 <_malloc_r+0x350>)
|
|
10004dc0: 9003 str r0, [sp, #12]
|
|
10004dc2: 680b ldr r3, [r1, #0]
|
|
10004dc4: 468b mov fp, r1
|
|
10004dc6: 3301 adds r3, #1
|
|
10004dc8: d006 beq.n 10004dd8 <_malloc_r+0x230>
|
|
10004dca: 4684 mov ip, r0
|
|
10004dcc: 9b01 ldr r3, [sp, #4]
|
|
10004dce: 4242 negs r2, r0
|
|
10004dd0: 3b01 subs r3, #1
|
|
10004dd2: 4463 add r3, ip
|
|
10004dd4: 4013 ands r3, r2
|
|
10004dd6: 9301 str r3, [sp, #4]
|
|
10004dd8: 0030 movs r0, r6
|
|
10004dda: 9901 ldr r1, [sp, #4]
|
|
10004ddc: f000 f9ca bl 10005174 <_sbrk_r>
|
|
10004de0: 0003 movs r3, r0
|
|
10004de2: 4680 mov r8, r0
|
|
10004de4: 3301 adds r3, #1
|
|
10004de6: d100 bne.n 10004dea <_malloc_r+0x242>
|
|
10004de8: e0dd b.n 10004fa6 <_malloc_r+0x3fe>
|
|
10004dea: 9b02 ldr r3, [sp, #8]
|
|
10004dec: 4283 cmp r3, r0
|
|
10004dee: d900 bls.n 10004df2 <_malloc_r+0x24a>
|
|
10004df0: e0d7 b.n 10004fa2 <_malloc_r+0x3fa>
|
|
10004df2: 9a01 ldr r2, [sp, #4]
|
|
10004df4: 4b41 ldr r3, [pc, #260] @ (10004efc <_malloc_r+0x354>)
|
|
10004df6: 4694 mov ip, r2
|
|
10004df8: 6819 ldr r1, [r3, #0]
|
|
10004dfa: 469a mov sl, r3
|
|
10004dfc: 4461 add r1, ip
|
|
10004dfe: 9a03 ldr r2, [sp, #12]
|
|
10004e00: 6019 str r1, [r3, #0]
|
|
10004e02: 9b02 ldr r3, [sp, #8]
|
|
10004e04: 0008 movs r0, r1
|
|
10004e06: 3a01 subs r2, #1
|
|
10004e08: 4543 cmp r3, r8
|
|
10004e0a: d000 beq.n 10004e0e <_malloc_r+0x266>
|
|
10004e0c: e0ea b.n 10004fe4 <_malloc_r+0x43c>
|
|
10004e0e: 4643 mov r3, r8
|
|
10004e10: 4213 tst r3, r2
|
|
10004e12: d000 beq.n 10004e16 <_malloc_r+0x26e>
|
|
10004e14: e0e6 b.n 10004fe4 <_malloc_r+0x43c>
|
|
10004e16: 68bb ldr r3, [r7, #8]
|
|
10004e18: 4698 mov r8, r3
|
|
10004e1a: 4663 mov r3, ip
|
|
10004e1c: 444b add r3, r9
|
|
10004e1e: 001a movs r2, r3
|
|
10004e20: 2301 movs r3, #1
|
|
10004e22: 431a orrs r2, r3
|
|
10004e24: 4643 mov r3, r8
|
|
10004e26: 605a str r2, [r3, #4]
|
|
10004e28: 4b35 ldr r3, [pc, #212] @ (10004f00 <_malloc_r+0x358>)
|
|
10004e2a: 6818 ldr r0, [r3, #0]
|
|
10004e2c: 4288 cmp r0, r1
|
|
10004e2e: d200 bcs.n 10004e32 <_malloc_r+0x28a>
|
|
10004e30: 6019 str r1, [r3, #0]
|
|
10004e32: 4b34 ldr r3, [pc, #208] @ (10004f04 <_malloc_r+0x35c>)
|
|
10004e34: 6818 ldr r0, [r3, #0]
|
|
10004e36: 4288 cmp r0, r1
|
|
10004e38: d200 bcs.n 10004e3c <_malloc_r+0x294>
|
|
10004e3a: 6019 str r1, [r3, #0]
|
|
10004e3c: 4644 mov r4, r8
|
|
10004e3e: e0b4 b.n 10004faa <_malloc_r+0x402>
|
|
10004e40: 687b ldr r3, [r7, #4]
|
|
10004e42: 4698 mov r8, r3
|
|
10004e44: e744 b.n 10004cd0 <_malloc_r+0x128>
|
|
10004e46: 2201 movs r2, #1
|
|
10004e48: 0029 movs r1, r5
|
|
10004e4a: 4313 orrs r3, r2
|
|
10004e4c: 4311 orrs r1, r2
|
|
10004e4e: 1965 adds r5, r4, r5
|
|
10004e50: 6061 str r1, [r4, #4]
|
|
10004e52: 0030 movs r0, r6
|
|
10004e54: 60bd str r5, [r7, #8]
|
|
10004e56: 606b str r3, [r5, #4]
|
|
10004e58: f000 f98a bl 10005170 <__malloc_unlock>
|
|
10004e5c: 0020 movs r0, r4
|
|
10004e5e: 3008 adds r0, #8
|
|
10004e60: e6cf b.n 10004c02 <_malloc_r+0x5a>
|
|
10004e62: 68a2 ldr r2, [r4, #8]
|
|
10004e64: 60d0 str r0, [r2, #12]
|
|
10004e66: 6082 str r2, [r0, #8]
|
|
10004e68: e6c1 b.n 10004bee <_malloc_r+0x46>
|
|
10004e6a: 4661 mov r1, ip
|
|
10004e6c: e709 b.n 10004c82 <_malloc_r+0xda>
|
|
10004e6e: 68dc ldr r4, [r3, #12]
|
|
10004e70: 3102 adds r1, #2
|
|
10004e72: 42a3 cmp r3, r4
|
|
10004e74: d100 bne.n 10004e78 <_malloc_r+0x2d0>
|
|
10004e76: e704 b.n 10004c82 <_malloc_r+0xda>
|
|
10004e78: e6b2 b.n 10004be0 <_malloc_r+0x38>
|
|
10004e7a: 0a5a lsrs r2, r3, #9
|
|
10004e7c: 2a04 cmp r2, #4
|
|
10004e7e: d800 bhi.n 10004e82 <_malloc_r+0x2da>
|
|
10004e80: e088 b.n 10004f94 <_malloc_r+0x3ec>
|
|
10004e82: 2a14 cmp r2, #20
|
|
10004e84: d900 bls.n 10004e88 <_malloc_r+0x2e0>
|
|
10004e86: e10f b.n 100050a8 <_malloc_r+0x500>
|
|
10004e88: 0010 movs r0, r2
|
|
10004e8a: 305b adds r0, #91 @ 0x5b
|
|
10004e8c: 4682 mov sl, r0
|
|
10004e8e: 325c adds r2, #92 @ 0x5c
|
|
10004e90: 00d2 lsls r2, r2, #3
|
|
10004e92: 2008 movs r0, #8
|
|
10004e94: 4240 negs r0, r0
|
|
10004e96: 4684 mov ip, r0
|
|
10004e98: 18ba adds r2, r7, r2
|
|
10004e9a: 4494 add ip, r2
|
|
10004e9c: 4662 mov r2, ip
|
|
10004e9e: 6892 ldr r2, [r2, #8]
|
|
10004ea0: 300b adds r0, #11
|
|
10004ea2: 4681 mov r9, r0
|
|
10004ea4: 4594 cmp ip, r2
|
|
10004ea6: d100 bne.n 10004eaa <_malloc_r+0x302>
|
|
10004ea8: e0e5 b.n 10005076 <_malloc_r+0x4ce>
|
|
10004eaa: 0008 movs r0, r1
|
|
10004eac: 46a2 mov sl, r4
|
|
10004eae: 4661 mov r1, ip
|
|
10004eb0: 4684 mov ip, r0
|
|
10004eb2: e002 b.n 10004eba <_malloc_r+0x312>
|
|
10004eb4: 6892 ldr r2, [r2, #8]
|
|
10004eb6: 4291 cmp r1, r2
|
|
10004eb8: d004 beq.n 10004ec4 <_malloc_r+0x31c>
|
|
10004eba: 464c mov r4, r9
|
|
10004ebc: 6850 ldr r0, [r2, #4]
|
|
10004ebe: 43a0 bics r0, r4
|
|
10004ec0: 4298 cmp r0, r3
|
|
10004ec2: d8f7 bhi.n 10004eb4 <_malloc_r+0x30c>
|
|
10004ec4: 68d3 ldr r3, [r2, #12]
|
|
10004ec6: 4661 mov r1, ip
|
|
10004ec8: 4654 mov r4, sl
|
|
10004eca: 469c mov ip, r3
|
|
10004ecc: 4663 mov r3, ip
|
|
10004ece: 60a2 str r2, [r4, #8]
|
|
10004ed0: 60e3 str r3, [r4, #12]
|
|
10004ed2: 609c str r4, [r3, #8]
|
|
10004ed4: 60d4 str r4, [r2, #12]
|
|
10004ed6: e6fb b.n 10004cd0 <_malloc_r+0x128>
|
|
10004ed8: 2914 cmp r1, #20
|
|
10004eda: d973 bls.n 10004fc4 <_malloc_r+0x41c>
|
|
10004edc: 2954 cmp r1, #84 @ 0x54
|
|
10004ede: d900 bls.n 10004ee2 <_malloc_r+0x33a>
|
|
10004ee0: e0eb b.n 100050ba <_malloc_r+0x512>
|
|
10004ee2: 236e movs r3, #110 @ 0x6e
|
|
10004ee4: 4698 mov r8, r3
|
|
10004ee6: 0b29 lsrs r1, r5, #12
|
|
10004ee8: 4488 add r8, r1
|
|
10004eea: 316f adds r1, #111 @ 0x6f
|
|
10004eec: 00cb lsls r3, r1, #3
|
|
10004eee: e6a9 b.n 10004c44 <_malloc_r+0x9c>
|
|
10004ef0: 200002d8 .word 0x200002d8
|
|
10004ef4: 20000974 .word 0x20000974
|
|
10004ef8: 200002d0 .word 0x200002d0
|
|
10004efc: 20000944 .word 0x20000944
|
|
10004f00: 2000096c .word 0x2000096c
|
|
10004f04: 20000970 .word 0x20000970
|
|
10004f08: 46ba mov sl, r7
|
|
10004f0a: 2001 movs r0, #1
|
|
10004f0c: 4651 mov r1, sl
|
|
10004f0e: 4684 mov ip, r0
|
|
10004f10: 1949 adds r1, r1, r5
|
|
10004f12: 4305 orrs r5, r0
|
|
10004f14: 4650 mov r0, sl
|
|
10004f16: 6045 str r5, [r0, #4]
|
|
10004f18: 6885 ldr r5, [r0, #8]
|
|
10004f1a: 4647 mov r7, r8
|
|
10004f1c: 4660 mov r0, ip
|
|
10004f1e: 60eb str r3, [r5, #12]
|
|
10004f20: 465e mov r6, fp
|
|
10004f22: 609d str r5, [r3, #8]
|
|
10004f24: 4653 mov r3, sl
|
|
10004f26: 6139 str r1, [r7, #16]
|
|
10004f28: 6179 str r1, [r7, #20]
|
|
10004f2a: 4320 orrs r0, r4
|
|
10004f2c: 3708 adds r7, #8
|
|
10004f2e: 6048 str r0, [r1, #4]
|
|
10004f30: 60cf str r7, [r1, #12]
|
|
10004f32: 0030 movs r0, r6
|
|
10004f34: 608f str r7, [r1, #8]
|
|
10004f36: 509c str r4, [r3, r2]
|
|
10004f38: f000 f91a bl 10005170 <__malloc_unlock>
|
|
10004f3c: 4650 mov r0, sl
|
|
10004f3e: 3008 adds r0, #8
|
|
10004f40: e65f b.n 10004c02 <_malloc_r+0x5a>
|
|
10004f42: 46ba mov sl, r7
|
|
10004f44: 2001 movs r0, #1
|
|
10004f46: 465e mov r6, fp
|
|
10004f48: 4452 add r2, sl
|
|
10004f4a: 6851 ldr r1, [r2, #4]
|
|
10004f4c: 4301 orrs r1, r0
|
|
10004f4e: 6051 str r1, [r2, #4]
|
|
10004f50: 68ba ldr r2, [r7, #8]
|
|
10004f52: 0030 movs r0, r6
|
|
10004f54: 60d3 str r3, [r2, #12]
|
|
10004f56: 609a str r2, [r3, #8]
|
|
10004f58: f000 f90a bl 10005170 <__malloc_unlock>
|
|
10004f5c: 0038 movs r0, r7
|
|
10004f5e: 3008 adds r0, #8
|
|
10004f60: e64f b.n 10004c02 <_malloc_r+0x5a>
|
|
10004f62: 002b movs r3, r5
|
|
10004f64: 08e9 lsrs r1, r5, #3
|
|
10004f66: 3308 adds r3, #8
|
|
10004f68: e632 b.n 10004bd0 <_malloc_r+0x28>
|
|
10004f6a: 1961 adds r1, r4, r5
|
|
10004f6c: 4688 mov r8, r1
|
|
10004f6e: 2101 movs r1, #1
|
|
10004f70: 468c mov ip, r1
|
|
10004f72: 430d orrs r5, r1
|
|
10004f74: 4641 mov r1, r8
|
|
10004f76: 6065 str r5, [r4, #4]
|
|
10004f78: 6139 str r1, [r7, #16]
|
|
10004f7a: 6179 str r1, [r7, #20]
|
|
10004f7c: 60ca str r2, [r1, #12]
|
|
10004f7e: 608a str r2, [r1, #8]
|
|
10004f80: 4662 mov r2, ip
|
|
10004f82: 4302 orrs r2, r0
|
|
10004f84: 604a str r2, [r1, #4]
|
|
10004f86: 50e0 str r0, [r4, r3]
|
|
10004f88: 0030 movs r0, r6
|
|
10004f8a: f000 f8f1 bl 10005170 <__malloc_unlock>
|
|
10004f8e: 0020 movs r0, r4
|
|
10004f90: 3008 adds r0, #8
|
|
10004f92: e636 b.n 10004c02 <_malloc_r+0x5a>
|
|
10004f94: 099a lsrs r2, r3, #6
|
|
10004f96: 0010 movs r0, r2
|
|
10004f98: 3239 adds r2, #57 @ 0x39
|
|
10004f9a: 3038 adds r0, #56 @ 0x38
|
|
10004f9c: 4682 mov sl, r0
|
|
10004f9e: 00d2 lsls r2, r2, #3
|
|
10004fa0: e777 b.n 10004e92 <_malloc_r+0x2ea>
|
|
10004fa2: 42bc cmp r4, r7
|
|
10004fa4: d014 beq.n 10004fd0 <_malloc_r+0x428>
|
|
10004fa6: 68bc ldr r4, [r7, #8]
|
|
10004fa8: 6862 ldr r2, [r4, #4]
|
|
10004faa: 2303 movs r3, #3
|
|
10004fac: 439a bics r2, r3
|
|
10004fae: 1b53 subs r3, r2, r5
|
|
10004fb0: 42aa cmp r2, r5
|
|
10004fb2: d302 bcc.n 10004fba <_malloc_r+0x412>
|
|
10004fb4: 2b0f cmp r3, #15
|
|
10004fb6: dd00 ble.n 10004fba <_malloc_r+0x412>
|
|
10004fb8: e745 b.n 10004e46 <_malloc_r+0x29e>
|
|
10004fba: 0030 movs r0, r6
|
|
10004fbc: f000 f8d8 bl 10005170 <__malloc_unlock>
|
|
10004fc0: 2000 movs r0, #0
|
|
10004fc2: e61e b.n 10004c02 <_malloc_r+0x5a>
|
|
10004fc4: 235b movs r3, #91 @ 0x5b
|
|
10004fc6: 4698 mov r8, r3
|
|
10004fc8: 4488 add r8, r1
|
|
10004fca: 315c adds r1, #92 @ 0x5c
|
|
10004fcc: 00cb lsls r3, r1, #3
|
|
10004fce: e639 b.n 10004c44 <_malloc_r+0x9c>
|
|
10004fd0: 4b64 ldr r3, [pc, #400] @ (10005164 <_malloc_r+0x5bc>)
|
|
10004fd2: 469a mov sl, r3
|
|
10004fd4: 6818 ldr r0, [r3, #0]
|
|
10004fd6: 9b01 ldr r3, [sp, #4]
|
|
10004fd8: 469c mov ip, r3
|
|
10004fda: 4653 mov r3, sl
|
|
10004fdc: 4460 add r0, ip
|
|
10004fde: 6018 str r0, [r3, #0]
|
|
10004fe0: 9b03 ldr r3, [sp, #12]
|
|
10004fe2: 1e5a subs r2, r3, #1
|
|
10004fe4: 465b mov r3, fp
|
|
10004fe6: 681b ldr r3, [r3, #0]
|
|
10004fe8: 3301 adds r3, #1
|
|
10004fea: d071 beq.n 100050d0 <_malloc_r+0x528>
|
|
10004fec: 4643 mov r3, r8
|
|
10004fee: 9902 ldr r1, [sp, #8]
|
|
10004ff0: 1a5b subs r3, r3, r1
|
|
10004ff2: 4651 mov r1, sl
|
|
10004ff4: 181b adds r3, r3, r0
|
|
10004ff6: 600b str r3, [r1, #0]
|
|
10004ff8: 2307 movs r3, #7
|
|
10004ffa: 4641 mov r1, r8
|
|
10004ffc: 4640 mov r0, r8
|
|
10004ffe: 4019 ands r1, r3
|
|
10005000: 9102 str r1, [sp, #8]
|
|
10005002: 4218 tst r0, r3
|
|
10005004: d040 beq.n 10005088 <_malloc_r+0x4e0>
|
|
10005006: 9803 ldr r0, [sp, #12]
|
|
10005008: 3301 adds r3, #1
|
|
1000500a: 4684 mov ip, r0
|
|
1000500c: 1a5b subs r3, r3, r1
|
|
1000500e: 9901 ldr r1, [sp, #4]
|
|
10005010: 4498 add r8, r3
|
|
10005012: 4441 add r1, r8
|
|
10005014: 9101 str r1, [sp, #4]
|
|
10005016: 4463 add r3, ip
|
|
10005018: 4011 ands r1, r2
|
|
1000501a: 1a5b subs r3, r3, r1
|
|
1000501c: 401a ands r2, r3
|
|
1000501e: 0011 movs r1, r2
|
|
10005020: 0030 movs r0, r6
|
|
10005022: 4693 mov fp, r2
|
|
10005024: f000 f8a6 bl 10005174 <_sbrk_r>
|
|
10005028: 1c43 adds r3, r0, #1
|
|
1000502a: d078 beq.n 1000511e <_malloc_r+0x576>
|
|
1000502c: 4643 mov r3, r8
|
|
1000502e: 1ac0 subs r0, r0, r3
|
|
10005030: 0003 movs r3, r0
|
|
10005032: 445b add r3, fp
|
|
10005034: 9301 str r3, [sp, #4]
|
|
10005036: 4653 mov r3, sl
|
|
10005038: 6819 ldr r1, [r3, #0]
|
|
1000503a: 2001 movs r0, #1
|
|
1000503c: 4459 add r1, fp
|
|
1000503e: 6019 str r1, [r3, #0]
|
|
10005040: 4643 mov r3, r8
|
|
10005042: 9a01 ldr r2, [sp, #4]
|
|
10005044: 60bb str r3, [r7, #8]
|
|
10005046: 4302 orrs r2, r0
|
|
10005048: 605a str r2, [r3, #4]
|
|
1000504a: 42bc cmp r4, r7
|
|
1000504c: d100 bne.n 10005050 <_malloc_r+0x4a8>
|
|
1000504e: e6eb b.n 10004e28 <_malloc_r+0x280>
|
|
10005050: 464b mov r3, r9
|
|
10005052: 2b0f cmp r3, #15
|
|
10005054: d940 bls.n 100050d8 <_malloc_r+0x530>
|
|
10005056: 2207 movs r2, #7
|
|
10005058: 3b0c subs r3, #12
|
|
1000505a: 4393 bics r3, r2
|
|
1000505c: 6862 ldr r2, [r4, #4]
|
|
1000505e: 4002 ands r2, r0
|
|
10005060: 2005 movs r0, #5
|
|
10005062: 431a orrs r2, r3
|
|
10005064: 6062 str r2, [r4, #4]
|
|
10005066: 18e2 adds r2, r4, r3
|
|
10005068: 6050 str r0, [r2, #4]
|
|
1000506a: 6090 str r0, [r2, #8]
|
|
1000506c: 2b0f cmp r3, #15
|
|
1000506e: d84b bhi.n 10005108 <_malloc_r+0x560>
|
|
10005070: 4643 mov r3, r8
|
|
10005072: 685a ldr r2, [r3, #4]
|
|
10005074: e6d8 b.n 10004e28 <_malloc_r+0x280>
|
|
10005076: 4653 mov r3, sl
|
|
10005078: 1098 asrs r0, r3, #2
|
|
1000507a: 2301 movs r3, #1
|
|
1000507c: 4083 lsls r3, r0
|
|
1000507e: 4640 mov r0, r8
|
|
10005080: 4318 orrs r0, r3
|
|
10005082: 4680 mov r8, r0
|
|
10005084: 6078 str r0, [r7, #4]
|
|
10005086: e721 b.n 10004ecc <_malloc_r+0x324>
|
|
10005088: 9b01 ldr r3, [sp, #4]
|
|
1000508a: 9903 ldr r1, [sp, #12]
|
|
1000508c: 4443 add r3, r8
|
|
1000508e: 4013 ands r3, r2
|
|
10005090: 1acb subs r3, r1, r3
|
|
10005092: 401a ands r2, r3
|
|
10005094: 0011 movs r1, r2
|
|
10005096: 0030 movs r0, r6
|
|
10005098: 4693 mov fp, r2
|
|
1000509a: f000 f86b bl 10005174 <_sbrk_r>
|
|
1000509e: 1c43 adds r3, r0, #1
|
|
100050a0: d1c4 bne.n 1000502c <_malloc_r+0x484>
|
|
100050a2: 2300 movs r3, #0
|
|
100050a4: 469b mov fp, r3
|
|
100050a6: e7c6 b.n 10005036 <_malloc_r+0x48e>
|
|
100050a8: 2a54 cmp r2, #84 @ 0x54
|
|
100050aa: d818 bhi.n 100050de <_malloc_r+0x536>
|
|
100050ac: 0b1a lsrs r2, r3, #12
|
|
100050ae: 0010 movs r0, r2
|
|
100050b0: 326f adds r2, #111 @ 0x6f
|
|
100050b2: 306e adds r0, #110 @ 0x6e
|
|
100050b4: 4682 mov sl, r0
|
|
100050b6: 00d2 lsls r2, r2, #3
|
|
100050b8: e6eb b.n 10004e92 <_malloc_r+0x2ea>
|
|
100050ba: 23aa movs r3, #170 @ 0xaa
|
|
100050bc: 005b lsls r3, r3, #1
|
|
100050be: 4299 cmp r1, r3
|
|
100050c0: d818 bhi.n 100050f4 <_malloc_r+0x54c>
|
|
100050c2: 3bdd subs r3, #221 @ 0xdd
|
|
100050c4: 4698 mov r8, r3
|
|
100050c6: 0be9 lsrs r1, r5, #15
|
|
100050c8: 4488 add r8, r1
|
|
100050ca: 3178 adds r1, #120 @ 0x78
|
|
100050cc: 00cb lsls r3, r1, #3
|
|
100050ce: e5b9 b.n 10004c44 <_malloc_r+0x9c>
|
|
100050d0: 465b mov r3, fp
|
|
100050d2: 4641 mov r1, r8
|
|
100050d4: 6019 str r1, [r3, #0]
|
|
100050d6: e78f b.n 10004ff8 <_malloc_r+0x450>
|
|
100050d8: 4643 mov r3, r8
|
|
100050da: 6058 str r0, [r3, #4]
|
|
100050dc: e76d b.n 10004fba <_malloc_r+0x412>
|
|
100050de: 20aa movs r0, #170 @ 0xaa
|
|
100050e0: 0040 lsls r0, r0, #1
|
|
100050e2: 4282 cmp r2, r0
|
|
100050e4: d826 bhi.n 10005134 <_malloc_r+0x58c>
|
|
100050e6: 0bda lsrs r2, r3, #15
|
|
100050e8: 0010 movs r0, r2
|
|
100050ea: 3278 adds r2, #120 @ 0x78
|
|
100050ec: 3077 adds r0, #119 @ 0x77
|
|
100050ee: 4682 mov sl, r0
|
|
100050f0: 00d2 lsls r2, r2, #3
|
|
100050f2: e6ce b.n 10004e92 <_malloc_r+0x2ea>
|
|
100050f4: 4b1c ldr r3, [pc, #112] @ (10005168 <_malloc_r+0x5c0>)
|
|
100050f6: 4299 cmp r1, r3
|
|
100050f8: d826 bhi.n 10005148 <_malloc_r+0x5a0>
|
|
100050fa: 237c movs r3, #124 @ 0x7c
|
|
100050fc: 4698 mov r8, r3
|
|
100050fe: 0ca9 lsrs r1, r5, #18
|
|
10005100: 4488 add r8, r1
|
|
10005102: 317d adds r1, #125 @ 0x7d
|
|
10005104: 00cb lsls r3, r1, #3
|
|
10005106: e59d b.n 10004c44 <_malloc_r+0x9c>
|
|
10005108: 0021 movs r1, r4
|
|
1000510a: 0030 movs r0, r6
|
|
1000510c: 3108 adds r1, #8
|
|
1000510e: f000 f8df bl 100052d0 <_free_r>
|
|
10005112: 4653 mov r3, sl
|
|
10005114: 6819 ldr r1, [r3, #0]
|
|
10005116: 68bb ldr r3, [r7, #8]
|
|
10005118: 4698 mov r8, r3
|
|
1000511a: 685a ldr r2, [r3, #4]
|
|
1000511c: e684 b.n 10004e28 <_malloc_r+0x280>
|
|
1000511e: 9a01 ldr r2, [sp, #4]
|
|
10005120: 9b02 ldr r3, [sp, #8]
|
|
10005122: 4694 mov ip, r2
|
|
10005124: 4642 mov r2, r8
|
|
10005126: 3b08 subs r3, #8
|
|
10005128: 4463 add r3, ip
|
|
1000512a: 1a9b subs r3, r3, r2
|
|
1000512c: 9301 str r3, [sp, #4]
|
|
1000512e: 2300 movs r3, #0
|
|
10005130: 469b mov fp, r3
|
|
10005132: e780 b.n 10005036 <_malloc_r+0x48e>
|
|
10005134: 480c ldr r0, [pc, #48] @ (10005168 <_malloc_r+0x5c0>)
|
|
10005136: 4282 cmp r2, r0
|
|
10005138: d80c bhi.n 10005154 <_malloc_r+0x5ac>
|
|
1000513a: 0c9a lsrs r2, r3, #18
|
|
1000513c: 0010 movs r0, r2
|
|
1000513e: 327d adds r2, #125 @ 0x7d
|
|
10005140: 307c adds r0, #124 @ 0x7c
|
|
10005142: 4682 mov sl, r0
|
|
10005144: 00d2 lsls r2, r2, #3
|
|
10005146: e6a4 b.n 10004e92 <_malloc_r+0x2ea>
|
|
10005148: 23fe movs r3, #254 @ 0xfe
|
|
1000514a: 227e movs r2, #126 @ 0x7e
|
|
1000514c: 217f movs r1, #127 @ 0x7f
|
|
1000514e: 4690 mov r8, r2
|
|
10005150: 009b lsls r3, r3, #2
|
|
10005152: e577 b.n 10004c44 <_malloc_r+0x9c>
|
|
10005154: 22fe movs r2, #254 @ 0xfe
|
|
10005156: 207e movs r0, #126 @ 0x7e
|
|
10005158: 0092 lsls r2, r2, #2
|
|
1000515a: 4682 mov sl, r0
|
|
1000515c: e699 b.n 10004e92 <_malloc_r+0x2ea>
|
|
1000515e: 4643 mov r3, r8
|
|
10005160: 685b ldr r3, [r3, #4]
|
|
10005162: e5f9 b.n 10004d58 <_malloc_r+0x1b0>
|
|
10005164: 20000944 .word 0x20000944
|
|
10005168: 00000554 .word 0x00000554
|
|
|
|
1000516c <__malloc_lock>:
|
|
1000516c: 4770 bx lr
|
|
1000516e: 46c0 nop @ (mov r8, r8)
|
|
|
|
10005170 <__malloc_unlock>:
|
|
10005170: 4770 bx lr
|
|
10005172: 46c0 nop @ (mov r8, r8)
|
|
|
|
10005174 <_sbrk_r>:
|
|
10005174: 2300 movs r3, #0
|
|
10005176: b570 push {r4, r5, r6, lr}
|
|
10005178: 4c06 ldr r4, [pc, #24] @ (10005194 <_sbrk_r+0x20>)
|
|
1000517a: 0005 movs r5, r0
|
|
1000517c: 0008 movs r0, r1
|
|
1000517e: 6023 str r3, [r4, #0]
|
|
10005180: f7fd f872 bl 10002268 <_sbrk>
|
|
10005184: 1c43 adds r3, r0, #1
|
|
10005186: d000 beq.n 1000518a <_sbrk_r+0x16>
|
|
10005188: bd70 pop {r4, r5, r6, pc}
|
|
1000518a: 6823 ldr r3, [r4, #0]
|
|
1000518c: 2b00 cmp r3, #0
|
|
1000518e: d0fb beq.n 10005188 <_sbrk_r+0x14>
|
|
10005190: 602b str r3, [r5, #0]
|
|
10005192: e7f9 b.n 10005188 <_sbrk_r+0x14>
|
|
10005194: 20000b2c .word 0x20000b2c
|
|
|
|
10005198 <__errno>:
|
|
10005198: 4b01 ldr r3, [pc, #4] @ (100051a0 <__errno+0x8>)
|
|
1000519a: 6818 ldr r0, [r3, #0]
|
|
1000519c: 4770 bx lr
|
|
1000519e: 46c0 nop @ (mov r8, r8)
|
|
100051a0: 200006e0 .word 0x200006e0
|
|
|
|
100051a4 <sysconf>:
|
|
100051a4: 2380 movs r3, #128 @ 0x80
|
|
100051a6: b510 push {r4, lr}
|
|
100051a8: 015b lsls r3, r3, #5
|
|
100051aa: 2808 cmp r0, #8
|
|
100051ac: d101 bne.n 100051b2 <sysconf+0xe>
|
|
100051ae: 0018 movs r0, r3
|
|
100051b0: bd10 pop {r4, pc}
|
|
100051b2: f7ff fff1 bl 10005198 <__errno>
|
|
100051b6: 2316 movs r3, #22
|
|
100051b8: 6003 str r3, [r0, #0]
|
|
100051ba: 3b17 subs r3, #23
|
|
100051bc: e7f7 b.n 100051ae <sysconf+0xa>
|
|
100051be: 46c0 nop @ (mov r8, r8)
|
|
|
|
100051c0 <strlen>:
|
|
100051c0: b510 push {r4, lr}
|
|
100051c2: 0783 lsls r3, r0, #30
|
|
100051c4: d00a beq.n 100051dc <strlen+0x1c>
|
|
100051c6: 0003 movs r3, r0
|
|
100051c8: 2103 movs r1, #3
|
|
100051ca: e002 b.n 100051d2 <strlen+0x12>
|
|
100051cc: 3301 adds r3, #1
|
|
100051ce: 420b tst r3, r1
|
|
100051d0: d005 beq.n 100051de <strlen+0x1e>
|
|
100051d2: 781a ldrb r2, [r3, #0]
|
|
100051d4: 2a00 cmp r2, #0
|
|
100051d6: d1f9 bne.n 100051cc <strlen+0xc>
|
|
100051d8: 1a18 subs r0, r3, r0
|
|
100051da: bd10 pop {r4, pc}
|
|
100051dc: 0003 movs r3, r0
|
|
100051de: 6819 ldr r1, [r3, #0]
|
|
100051e0: 4a0c ldr r2, [pc, #48] @ (10005214 <strlen+0x54>)
|
|
100051e2: 4c0d ldr r4, [pc, #52] @ (10005218 <strlen+0x58>)
|
|
100051e4: 188a adds r2, r1, r2
|
|
100051e6: 438a bics r2, r1
|
|
100051e8: 4222 tst r2, r4
|
|
100051ea: d10f bne.n 1000520c <strlen+0x4c>
|
|
100051ec: 6859 ldr r1, [r3, #4]
|
|
100051ee: 4a09 ldr r2, [pc, #36] @ (10005214 <strlen+0x54>)
|
|
100051f0: 3304 adds r3, #4
|
|
100051f2: 188a adds r2, r1, r2
|
|
100051f4: 438a bics r2, r1
|
|
100051f6: 4222 tst r2, r4
|
|
100051f8: d108 bne.n 1000520c <strlen+0x4c>
|
|
100051fa: 6859 ldr r1, [r3, #4]
|
|
100051fc: 4a05 ldr r2, [pc, #20] @ (10005214 <strlen+0x54>)
|
|
100051fe: 3304 adds r3, #4
|
|
10005200: 188a adds r2, r1, r2
|
|
10005202: 438a bics r2, r1
|
|
10005204: 4222 tst r2, r4
|
|
10005206: d0f1 beq.n 100051ec <strlen+0x2c>
|
|
10005208: e000 b.n 1000520c <strlen+0x4c>
|
|
1000520a: 3301 adds r3, #1
|
|
1000520c: 781a ldrb r2, [r3, #0]
|
|
1000520e: 2a00 cmp r2, #0
|
|
10005210: d1fb bne.n 1000520a <strlen+0x4a>
|
|
10005212: e7e1 b.n 100051d8 <strlen+0x18>
|
|
10005214: fefefeff .word 0xfefefeff
|
|
10005218: 80808080 .word 0x80808080
|
|
|
|
1000521c <_malloc_trim_r>:
|
|
1000521c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000521e: 46c6 mov lr, r8
|
|
10005220: 0006 movs r6, r0
|
|
10005222: b500 push {lr}
|
|
10005224: 2008 movs r0, #8
|
|
10005226: 000d movs r5, r1
|
|
10005228: f7ff ffbc bl 100051a4 <sysconf>
|
|
1000522c: 0004 movs r4, r0
|
|
1000522e: 0030 movs r0, r6
|
|
10005230: f7ff ff9c bl 1000516c <__malloc_lock>
|
|
10005234: 4b23 ldr r3, [pc, #140] @ (100052c4 <_malloc_trim_r+0xa8>)
|
|
10005236: 0021 movs r1, r4
|
|
10005238: 4698 mov r8, r3
|
|
1000523a: 689b ldr r3, [r3, #8]
|
|
1000523c: 685f ldr r7, [r3, #4]
|
|
1000523e: 2303 movs r3, #3
|
|
10005240: 439f bics r7, r3
|
|
10005242: 0038 movs r0, r7
|
|
10005244: 3811 subs r0, #17
|
|
10005246: 1b40 subs r0, r0, r5
|
|
10005248: 1900 adds r0, r0, r4
|
|
1000524a: f7fe fa15 bl 10003678 <__wrap___aeabi_uidiv>
|
|
1000524e: 1e45 subs r5, r0, #1
|
|
10005250: 4365 muls r5, r4
|
|
10005252: 42ac cmp r4, r5
|
|
10005254: dc08 bgt.n 10005268 <_malloc_trim_r+0x4c>
|
|
10005256: 2100 movs r1, #0
|
|
10005258: 0030 movs r0, r6
|
|
1000525a: f7ff ff8b bl 10005174 <_sbrk_r>
|
|
1000525e: 4643 mov r3, r8
|
|
10005260: 689b ldr r3, [r3, #8]
|
|
10005262: 19db adds r3, r3, r7
|
|
10005264: 4298 cmp r0, r3
|
|
10005266: d006 beq.n 10005276 <_malloc_trim_r+0x5a>
|
|
10005268: 0030 movs r0, r6
|
|
1000526a: f7ff ff81 bl 10005170 <__malloc_unlock>
|
|
1000526e: 2000 movs r0, #0
|
|
10005270: bc80 pop {r7}
|
|
10005272: 46b8 mov r8, r7
|
|
10005274: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10005276: 0030 movs r0, r6
|
|
10005278: 4269 negs r1, r5
|
|
1000527a: f7ff ff7b bl 10005174 <_sbrk_r>
|
|
1000527e: 3001 adds r0, #1
|
|
10005280: d00e beq.n 100052a0 <_malloc_trim_r+0x84>
|
|
10005282: 2201 movs r2, #1
|
|
10005284: 4643 mov r3, r8
|
|
10005286: 1b7f subs r7, r7, r5
|
|
10005288: 689b ldr r3, [r3, #8]
|
|
1000528a: 4317 orrs r7, r2
|
|
1000528c: 4a0e ldr r2, [pc, #56] @ (100052c8 <_malloc_trim_r+0xac>)
|
|
1000528e: 605f str r7, [r3, #4]
|
|
10005290: 6813 ldr r3, [r2, #0]
|
|
10005292: 0030 movs r0, r6
|
|
10005294: 1b5b subs r3, r3, r5
|
|
10005296: 6013 str r3, [r2, #0]
|
|
10005298: f7ff ff6a bl 10005170 <__malloc_unlock>
|
|
1000529c: 2001 movs r0, #1
|
|
1000529e: e7e7 b.n 10005270 <_malloc_trim_r+0x54>
|
|
100052a0: 2100 movs r1, #0
|
|
100052a2: 0030 movs r0, r6
|
|
100052a4: f7ff ff66 bl 10005174 <_sbrk_r>
|
|
100052a8: 4643 mov r3, r8
|
|
100052aa: 689a ldr r2, [r3, #8]
|
|
100052ac: 1a83 subs r3, r0, r2
|
|
100052ae: 2b0f cmp r3, #15
|
|
100052b0: ddda ble.n 10005268 <_malloc_trim_r+0x4c>
|
|
100052b2: 4c06 ldr r4, [pc, #24] @ (100052cc <_malloc_trim_r+0xb0>)
|
|
100052b4: 4904 ldr r1, [pc, #16] @ (100052c8 <_malloc_trim_r+0xac>)
|
|
100052b6: 6824 ldr r4, [r4, #0]
|
|
100052b8: 1b00 subs r0, r0, r4
|
|
100052ba: 6008 str r0, [r1, #0]
|
|
100052bc: 2101 movs r1, #1
|
|
100052be: 430b orrs r3, r1
|
|
100052c0: 6053 str r3, [r2, #4]
|
|
100052c2: e7d1 b.n 10005268 <_malloc_trim_r+0x4c>
|
|
100052c4: 200002d8 .word 0x200002d8
|
|
100052c8: 20000944 .word 0x20000944
|
|
100052cc: 200002d0 .word 0x200002d0
|
|
|
|
100052d0 <_free_r>:
|
|
100052d0: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
100052d2: 46ce mov lr, r9
|
|
100052d4: 4647 mov r7, r8
|
|
100052d6: 0005 movs r5, r0
|
|
100052d8: 000c movs r4, r1
|
|
100052da: b580 push {r7, lr}
|
|
100052dc: 2900 cmp r1, #0
|
|
100052de: d057 beq.n 10005390 <_free_r+0xc0>
|
|
100052e0: f7ff ff44 bl 1000516c <__malloc_lock>
|
|
100052e4: 2301 movs r3, #1
|
|
100052e6: 0021 movs r1, r4
|
|
100052e8: 469c mov ip, r3
|
|
100052ea: 3908 subs r1, #8
|
|
100052ec: 6848 ldr r0, [r1, #4]
|
|
100052ee: 4662 mov r2, ip
|
|
100052f0: 0003 movs r3, r0
|
|
100052f2: 2403 movs r4, #3
|
|
100052f4: 4393 bics r3, r2
|
|
100052f6: 18cf adds r7, r1, r3
|
|
100052f8: 687a ldr r2, [r7, #4]
|
|
100052fa: 4e65 ldr r6, [pc, #404] @ (10005490 <_free_r+0x1c0>)
|
|
100052fc: 43a2 bics r2, r4
|
|
100052fe: 68b4 ldr r4, [r6, #8]
|
|
10005300: 42bc cmp r4, r7
|
|
10005302: d100 bne.n 10005306 <_free_r+0x36>
|
|
10005304: e070 b.n 100053e8 <_free_r+0x118>
|
|
10005306: 18bc adds r4, r7, r2
|
|
10005308: 46a1 mov r9, r4
|
|
1000530a: 4664 mov r4, ip
|
|
1000530c: 607a str r2, [r7, #4]
|
|
1000530e: 4204 tst r4, r0
|
|
10005310: d121 bne.n 10005356 <_free_r+0x86>
|
|
10005312: 6808 ldr r0, [r1, #0]
|
|
10005314: 1a09 subs r1, r1, r0
|
|
10005316: 181b adds r3, r3, r0
|
|
10005318: 6888 ldr r0, [r1, #8]
|
|
1000531a: 4680 mov r8, r0
|
|
1000531c: 4648 mov r0, r9
|
|
1000531e: 6840 ldr r0, [r0, #4]
|
|
10005320: 4020 ands r0, r4
|
|
10005322: 0034 movs r4, r6
|
|
10005324: 3408 adds r4, #8
|
|
10005326: 4681 mov r9, r0
|
|
10005328: 45a0 cmp r8, r4
|
|
1000532a: d051 beq.n 100053d0 <_free_r+0x100>
|
|
1000532c: 4640 mov r0, r8
|
|
1000532e: 68cc ldr r4, [r1, #12]
|
|
10005330: 60c4 str r4, [r0, #12]
|
|
10005332: 60a0 str r0, [r4, #8]
|
|
10005334: 4648 mov r0, r9
|
|
10005336: 2800 cmp r0, #0
|
|
10005338: d111 bne.n 1000535e <_free_r+0x8e>
|
|
1000533a: 189b adds r3, r3, r2
|
|
1000533c: 4855 ldr r0, [pc, #340] @ (10005494 <_free_r+0x1c4>)
|
|
1000533e: 68ba ldr r2, [r7, #8]
|
|
10005340: 4282 cmp r2, r0
|
|
10005342: d100 bne.n 10005346 <_free_r+0x76>
|
|
10005344: e07f b.n 10005446 <_free_r+0x176>
|
|
10005346: 68f8 ldr r0, [r7, #12]
|
|
10005348: 60d0 str r0, [r2, #12]
|
|
1000534a: 6082 str r2, [r0, #8]
|
|
1000534c: 2201 movs r2, #1
|
|
1000534e: 431a orrs r2, r3
|
|
10005350: 604a str r2, [r1, #4]
|
|
10005352: 50cb str r3, [r1, r3]
|
|
10005354: e007 b.n 10005366 <_free_r+0x96>
|
|
10005356: 4648 mov r0, r9
|
|
10005358: 6840 ldr r0, [r0, #4]
|
|
1000535a: 4220 tst r0, r4
|
|
1000535c: d0ed beq.n 1000533a <_free_r+0x6a>
|
|
1000535e: 4662 mov r2, ip
|
|
10005360: 431a orrs r2, r3
|
|
10005362: 604a str r2, [r1, #4]
|
|
10005364: 603b str r3, [r7, #0]
|
|
10005366: 2280 movs r2, #128 @ 0x80
|
|
10005368: 0092 lsls r2, r2, #2
|
|
1000536a: 4293 cmp r3, r2
|
|
1000536c: d214 bcs.n 10005398 <_free_r+0xc8>
|
|
1000536e: 08da lsrs r2, r3, #3
|
|
10005370: 0958 lsrs r0, r3, #5
|
|
10005372: 2301 movs r3, #1
|
|
10005374: 4083 lsls r3, r0
|
|
10005376: 6870 ldr r0, [r6, #4]
|
|
10005378: 4303 orrs r3, r0
|
|
1000537a: 6073 str r3, [r6, #4]
|
|
1000537c: 00d3 lsls r3, r2, #3
|
|
1000537e: 199b adds r3, r3, r6
|
|
10005380: 689a ldr r2, [r3, #8]
|
|
10005382: 60cb str r3, [r1, #12]
|
|
10005384: 608a str r2, [r1, #8]
|
|
10005386: 6099 str r1, [r3, #8]
|
|
10005388: 60d1 str r1, [r2, #12]
|
|
1000538a: 0028 movs r0, r5
|
|
1000538c: f7ff fef0 bl 10005170 <__malloc_unlock>
|
|
10005390: bcc0 pop {r6, r7}
|
|
10005392: 46b9 mov r9, r7
|
|
10005394: 46b0 mov r8, r6
|
|
10005396: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10005398: 0a5c lsrs r4, r3, #9
|
|
1000539a: 2c04 cmp r4, #4
|
|
1000539c: d83d bhi.n 1000541a <_free_r+0x14a>
|
|
1000539e: 099c lsrs r4, r3, #6
|
|
100053a0: 0020 movs r0, r4
|
|
100053a2: 3439 adds r4, #57 @ 0x39
|
|
100053a4: 3038 adds r0, #56 @ 0x38
|
|
100053a6: 00e4 lsls r4, r4, #3
|
|
100053a8: 1934 adds r4, r6, r4
|
|
100053aa: 6822 ldr r2, [r4, #0]
|
|
100053ac: 3c08 subs r4, #8
|
|
100053ae: 2703 movs r7, #3
|
|
100053b0: 4294 cmp r4, r2
|
|
100053b2: d103 bne.n 100053bc <_free_r+0xec>
|
|
100053b4: e040 b.n 10005438 <_free_r+0x168>
|
|
100053b6: 6892 ldr r2, [r2, #8]
|
|
100053b8: 4294 cmp r4, r2
|
|
100053ba: d003 beq.n 100053c4 <_free_r+0xf4>
|
|
100053bc: 6850 ldr r0, [r2, #4]
|
|
100053be: 43b8 bics r0, r7
|
|
100053c0: 4298 cmp r0, r3
|
|
100053c2: d8f8 bhi.n 100053b6 <_free_r+0xe6>
|
|
100053c4: 68d4 ldr r4, [r2, #12]
|
|
100053c6: 60cc str r4, [r1, #12]
|
|
100053c8: 608a str r2, [r1, #8]
|
|
100053ca: 60a1 str r1, [r4, #8]
|
|
100053cc: 60d1 str r1, [r2, #12]
|
|
100053ce: e7dc b.n 1000538a <_free_r+0xba>
|
|
100053d0: 2800 cmp r0, #0
|
|
100053d2: d158 bne.n 10005486 <_free_r+0x1b6>
|
|
100053d4: 68b8 ldr r0, [r7, #8]
|
|
100053d6: 18d2 adds r2, r2, r3
|
|
100053d8: 68fb ldr r3, [r7, #12]
|
|
100053da: 60c3 str r3, [r0, #12]
|
|
100053dc: 6098 str r0, [r3, #8]
|
|
100053de: 4663 mov r3, ip
|
|
100053e0: 4313 orrs r3, r2
|
|
100053e2: 604b str r3, [r1, #4]
|
|
100053e4: 508a str r2, [r1, r2]
|
|
100053e6: e7d0 b.n 1000538a <_free_r+0xba>
|
|
100053e8: 189a adds r2, r3, r2
|
|
100053ea: 4663 mov r3, ip
|
|
100053ec: 4203 tst r3, r0
|
|
100053ee: d106 bne.n 100053fe <_free_r+0x12e>
|
|
100053f0: 680b ldr r3, [r1, #0]
|
|
100053f2: 1ac9 subs r1, r1, r3
|
|
100053f4: 6888 ldr r0, [r1, #8]
|
|
100053f6: 18d2 adds r2, r2, r3
|
|
100053f8: 68cb ldr r3, [r1, #12]
|
|
100053fa: 60c3 str r3, [r0, #12]
|
|
100053fc: 6098 str r0, [r3, #8]
|
|
100053fe: 2301 movs r3, #1
|
|
10005400: 4313 orrs r3, r2
|
|
10005402: 604b str r3, [r1, #4]
|
|
10005404: 4b24 ldr r3, [pc, #144] @ (10005498 <_free_r+0x1c8>)
|
|
10005406: 60b1 str r1, [r6, #8]
|
|
10005408: 681b ldr r3, [r3, #0]
|
|
1000540a: 4293 cmp r3, r2
|
|
1000540c: d8bd bhi.n 1000538a <_free_r+0xba>
|
|
1000540e: 4b23 ldr r3, [pc, #140] @ (1000549c <_free_r+0x1cc>)
|
|
10005410: 0028 movs r0, r5
|
|
10005412: 6819 ldr r1, [r3, #0]
|
|
10005414: f7ff ff02 bl 1000521c <_malloc_trim_r>
|
|
10005418: e7b7 b.n 1000538a <_free_r+0xba>
|
|
1000541a: 2c14 cmp r4, #20
|
|
1000541c: d907 bls.n 1000542e <_free_r+0x15e>
|
|
1000541e: 2c54 cmp r4, #84 @ 0x54
|
|
10005420: d81a bhi.n 10005458 <_free_r+0x188>
|
|
10005422: 0b1c lsrs r4, r3, #12
|
|
10005424: 0020 movs r0, r4
|
|
10005426: 346f adds r4, #111 @ 0x6f
|
|
10005428: 306e adds r0, #110 @ 0x6e
|
|
1000542a: 00e4 lsls r4, r4, #3
|
|
1000542c: e7bc b.n 100053a8 <_free_r+0xd8>
|
|
1000542e: 0020 movs r0, r4
|
|
10005430: 345c adds r4, #92 @ 0x5c
|
|
10005432: 305b adds r0, #91 @ 0x5b
|
|
10005434: 00e4 lsls r4, r4, #3
|
|
10005436: e7b7 b.n 100053a8 <_free_r+0xd8>
|
|
10005438: 2301 movs r3, #1
|
|
1000543a: 1080 asrs r0, r0, #2
|
|
1000543c: 4083 lsls r3, r0
|
|
1000543e: 6870 ldr r0, [r6, #4]
|
|
10005440: 4303 orrs r3, r0
|
|
10005442: 6073 str r3, [r6, #4]
|
|
10005444: e7bf b.n 100053c6 <_free_r+0xf6>
|
|
10005446: 60d1 str r1, [r2, #12]
|
|
10005448: 6091 str r1, [r2, #8]
|
|
1000544a: 60ca str r2, [r1, #12]
|
|
1000544c: 608a str r2, [r1, #8]
|
|
1000544e: 2201 movs r2, #1
|
|
10005450: 431a orrs r2, r3
|
|
10005452: 604a str r2, [r1, #4]
|
|
10005454: 50cb str r3, [r1, r3]
|
|
10005456: e798 b.n 1000538a <_free_r+0xba>
|
|
10005458: 22aa movs r2, #170 @ 0xaa
|
|
1000545a: 0052 lsls r2, r2, #1
|
|
1000545c: 4294 cmp r4, r2
|
|
1000545e: d805 bhi.n 1000546c <_free_r+0x19c>
|
|
10005460: 0bdc lsrs r4, r3, #15
|
|
10005462: 0020 movs r0, r4
|
|
10005464: 3478 adds r4, #120 @ 0x78
|
|
10005466: 3077 adds r0, #119 @ 0x77
|
|
10005468: 00e4 lsls r4, r4, #3
|
|
1000546a: e79d b.n 100053a8 <_free_r+0xd8>
|
|
1000546c: 4a0c ldr r2, [pc, #48] @ (100054a0 <_free_r+0x1d0>)
|
|
1000546e: 4294 cmp r4, r2
|
|
10005470: d805 bhi.n 1000547e <_free_r+0x1ae>
|
|
10005472: 0c9c lsrs r4, r3, #18
|
|
10005474: 0020 movs r0, r4
|
|
10005476: 347d adds r4, #125 @ 0x7d
|
|
10005478: 307c adds r0, #124 @ 0x7c
|
|
1000547a: 00e4 lsls r4, r4, #3
|
|
1000547c: e794 b.n 100053a8 <_free_r+0xd8>
|
|
1000547e: 24fe movs r4, #254 @ 0xfe
|
|
10005480: 207e movs r0, #126 @ 0x7e
|
|
10005482: 00a4 lsls r4, r4, #2
|
|
10005484: e790 b.n 100053a8 <_free_r+0xd8>
|
|
10005486: 4662 mov r2, ip
|
|
10005488: 431a orrs r2, r3
|
|
1000548a: 604a str r2, [r1, #4]
|
|
1000548c: 603b str r3, [r7, #0]
|
|
1000548e: e77c b.n 1000538a <_free_r+0xba>
|
|
10005490: 200002d8 .word 0x200002d8
|
|
10005494: 200002e0 .word 0x200002e0
|
|
10005498: 200002d4 .word 0x200002d4
|
|
1000549c: 20000974 .word 0x20000974
|
|
100054a0: 00000554 .word 0x00000554
|
|
|
|
100054a4 <_fini>:
|
|
100054a4: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
100054a6: 46c0 nop @ (mov r8, r8)
|
|
|
|
100054a8 <__mutex_exit_veneer>:
|
|
100054a8: b401 push {r0}
|
|
100054aa: 4802 ldr r0, [pc, #8] @ (100054b4 <__mutex_exit_veneer+0xc>)
|
|
100054ac: 4684 mov ip, r0
|
|
100054ae: bc01 pop {r0}
|
|
100054b0: 4760 bx ip
|
|
100054b2: bf00 nop
|
|
100054b4: 200001c9 .word 0x200001c9
|
|
|
|
100054b8 <____aeabi_ldiv0_veneer>:
|
|
100054b8: b401 push {r0}
|
|
100054ba: 4802 ldr r0, [pc, #8] @ (100054c4 <____aeabi_ldiv0_veneer+0xc>)
|
|
100054bc: 4684 mov ip, r0
|
|
100054be: bc01 pop {r0}
|
|
100054c0: 4760 bx ip
|
|
100054c2: bf00 nop
|
|
100054c4: 20000215 .word 0x20000215
|
|
|
|
100054c8 <____aeabi_idiv0_veneer>:
|
|
100054c8: b401 push {r0}
|
|
100054ca: 4802 ldr r0, [pc, #8] @ (100054d4 <____aeabi_idiv0_veneer+0xc>)
|
|
100054cc: 4684 mov ip, r0
|
|
100054ce: bc01 pop {r0}
|
|
100054d0: 4760 bx ip
|
|
100054d2: bf00 nop
|
|
100054d4: 20000215 .word 0x20000215
|
|
|
|
100054d8 <__mutex_try_enter_block_until_veneer>:
|
|
100054d8: b401 push {r0}
|
|
100054da: 4802 ldr r0, [pc, #8] @ (100054e4 <__mutex_try_enter_block_until_veneer+0xc>)
|
|
100054dc: 4684 mov ip, r0
|
|
100054de: bc01 pop {r0}
|
|
100054e0: 4760 bx ip
|
|
100054e2: bf00 nop
|
|
100054e4: 20000195 .word 0x20000195
|
|
|
|
Disassembly of section .data:
|
|
|
|
200000c0 <mutex_try_enter>:
|
|
200000c0: 0003 movs r3, r0
|
|
200000c2: 6800 ldr r0, [r0, #0]
|
|
200000c4: f3ef 8c10 mrs ip, PRIMASK
|
|
200000c8: b672 cpsid i
|
|
200000ca: 6802 ldr r2, [r0, #0]
|
|
200000cc: 2a00 cmp r2, #0
|
|
200000ce: d0fc beq.n 200000ca <mutex_try_enter+0xa>
|
|
200000d0: f3bf 8f5f dmb sy
|
|
200000d4: 2204 movs r2, #4
|
|
200000d6: 569a ldrsb r2, [r3, r2]
|
|
200000d8: 2a00 cmp r2, #0
|
|
200000da: db0b blt.n 200000f4 <mutex_try_enter+0x34>
|
|
200000dc: 2900 cmp r1, #0
|
|
200000de: d010 beq.n 20000102 <mutex_try_enter+0x42>
|
|
200000e0: 600a str r2, [r1, #0]
|
|
200000e2: 2000 movs r0, #0
|
|
200000e4: 681b ldr r3, [r3, #0]
|
|
200000e6: f3bf 8f5f dmb sy
|
|
200000ea: 2200 movs r2, #0
|
|
200000ec: 601a str r2, [r3, #0]
|
|
200000ee: f38c 8810 msr PRIMASK, ip
|
|
200000f2: 4770 bx lr
|
|
200000f4: 22d0 movs r2, #208 @ 0xd0
|
|
200000f6: 0612 lsls r2, r2, #24
|
|
200000f8: 7812 ldrb r2, [r2, #0]
|
|
200000fa: b252 sxtb r2, r2
|
|
200000fc: 711a strb r2, [r3, #4]
|
|
200000fe: 2001 movs r0, #1
|
|
20000100: e7f0 b.n 200000e4 <mutex_try_enter+0x24>
|
|
20000102: 2000 movs r0, #0
|
|
20000104: e7ee b.n 200000e4 <mutex_try_enter+0x24>
|
|
...
|
|
|
|
20000108 <mutex_enter_block_until>:
|
|
20000108: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
2000010a: 46ce mov lr, r9
|
|
2000010c: 4647 mov r7, r8
|
|
2000010e: b580 push {r7, lr}
|
|
20000110: 0004 movs r4, r0
|
|
20000112: 0017 movs r7, r2
|
|
20000114: 4698 mov r8, r3
|
|
20000116: 6803 ldr r3, [r0, #0]
|
|
20000118: 2b00 cmp r3, #0
|
|
2000011a: d020 beq.n 2000015e <mutex_enter_block_until+0x56>
|
|
2000011c: 23d0 movs r3, #208 @ 0xd0
|
|
2000011e: 061b lsls r3, r3, #24
|
|
20000120: 781b ldrb r3, [r3, #0]
|
|
20000122: b25b sxtb r3, r3
|
|
20000124: 4699 mov r9, r3
|
|
20000126: 6826 ldr r6, [r4, #0]
|
|
20000128: f3ef 8c10 mrs ip, PRIMASK
|
|
2000012c: b672 cpsid i
|
|
2000012e: 6835 ldr r5, [r6, #0]
|
|
20000130: 2d00 cmp r5, #0
|
|
20000132: d0fc beq.n 2000012e <mutex_enter_block_until+0x26>
|
|
20000134: f3bf 8f5f dmb sy
|
|
20000138: 2504 movs r5, #4
|
|
2000013a: 5765 ldrsb r5, [r4, r5]
|
|
2000013c: 2d00 cmp r5, #0
|
|
2000013e: db14 blt.n 2000016a <mutex_enter_block_until+0x62>
|
|
20000140: 6823 ldr r3, [r4, #0]
|
|
20000142: f3bf 8f5f dmb sy
|
|
20000146: 2200 movs r2, #0
|
|
20000148: 601a str r2, [r3, #0]
|
|
2000014a: f38c 8810 msr PRIMASK, ip
|
|
2000014e: 0038 movs r0, r7
|
|
20000150: 4641 mov r1, r8
|
|
20000152: f000 f869 bl 20000228 <__best_effort_wfe_or_timeout_veneer>
|
|
20000156: 2800 cmp r0, #0
|
|
20000158: d0e5 beq.n 20000126 <mutex_enter_block_until+0x1e>
|
|
2000015a: 2000 movs r0, #0
|
|
2000015c: e00f b.n 2000017e <mutex_enter_block_until+0x76>
|
|
2000015e: 4b0a ldr r3, [pc, #40] @ (20000188 <mutex_enter_block_until+0x80>)
|
|
20000160: 4a0a ldr r2, [pc, #40] @ (2000018c <mutex_enter_block_until+0x84>)
|
|
20000162: 480b ldr r0, [pc, #44] @ (20000190 <mutex_enter_block_until+0x88>)
|
|
20000164: 2185 movs r1, #133 @ 0x85
|
|
20000166: f000 f857 bl 20000218 <____assert_func_veneer>
|
|
2000016a: 464b mov r3, r9
|
|
2000016c: 7123 strb r3, [r4, #4]
|
|
2000016e: 6823 ldr r3, [r4, #0]
|
|
20000170: f3bf 8f5f dmb sy
|
|
20000174: 2200 movs r2, #0
|
|
20000176: 601a str r2, [r3, #0]
|
|
20000178: f38c 8810 msr PRIMASK, ip
|
|
2000017c: 2001 movs r0, #1
|
|
2000017e: bcc0 pop {r6, r7}
|
|
20000180: 46b9 mov r9, r7
|
|
20000182: 46b0 mov r8, r6
|
|
20000184: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
20000186: 46c0 nop @ (mov r8, r8)
|
|
20000188: 100058a4 .word 0x100058a4
|
|
2000018c: 100058fc .word 0x100058fc
|
|
20000190: 10005860 .word 0x10005860
|
|
|
|
20000194 <mutex_try_enter_block_until>:
|
|
20000194: b570 push {r4, r5, r6, lr}
|
|
20000196: b082 sub sp, #8
|
|
20000198: 0006 movs r6, r0
|
|
2000019a: 0015 movs r5, r2
|
|
2000019c: 001c movs r4, r3
|
|
2000019e: a901 add r1, sp, #4
|
|
200001a0: f7ff ff8e bl 200000c0 <mutex_try_enter>
|
|
200001a4: 2800 cmp r0, #0
|
|
200001a6: d107 bne.n 200001b8 <mutex_try_enter_block_until+0x24>
|
|
200001a8: 9b01 ldr r3, [sp, #4]
|
|
200001aa: b25b sxtb r3, r3
|
|
200001ac: 22d0 movs r2, #208 @ 0xd0
|
|
200001ae: 0612 lsls r2, r2, #24
|
|
200001b0: 7812 ldrb r2, [r2, #0]
|
|
200001b2: b252 sxtb r2, r2
|
|
200001b4: 4293 cmp r3, r2
|
|
200001b6: d101 bne.n 200001bc <mutex_try_enter_block_until+0x28>
|
|
200001b8: b002 add sp, #8
|
|
200001ba: bd70 pop {r4, r5, r6, pc}
|
|
200001bc: 002a movs r2, r5
|
|
200001be: 0023 movs r3, r4
|
|
200001c0: 0030 movs r0, r6
|
|
200001c2: f7ff ffa1 bl 20000108 <mutex_enter_block_until>
|
|
200001c6: e7f7 b.n 200001b8 <mutex_try_enter_block_until+0x24>
|
|
|
|
200001c8 <mutex_exit>:
|
|
200001c8: b510 push {r4, lr}
|
|
200001ca: 6802 ldr r2, [r0, #0]
|
|
200001cc: f3ef 8110 mrs r1, PRIMASK
|
|
200001d0: b672 cpsid i
|
|
200001d2: 6813 ldr r3, [r2, #0]
|
|
200001d4: 2b00 cmp r3, #0
|
|
200001d6: d0fc beq.n 200001d2 <mutex_exit+0xa>
|
|
200001d8: f3bf 8f5f dmb sy
|
|
200001dc: 2304 movs r3, #4
|
|
200001de: 56c3 ldrsb r3, [r0, r3]
|
|
200001e0: 2b00 cmp r3, #0
|
|
200001e2: db0a blt.n 200001fa <mutex_exit+0x32>
|
|
200001e4: 23ff movs r3, #255 @ 0xff
|
|
200001e6: 7103 strb r3, [r0, #4]
|
|
200001e8: 6803 ldr r3, [r0, #0]
|
|
200001ea: f3bf 8f5f dmb sy
|
|
200001ee: 2200 movs r2, #0
|
|
200001f0: 601a str r2, [r3, #0]
|
|
200001f2: f381 8810 msr PRIMASK, r1
|
|
200001f6: bf40 sev
|
|
200001f8: bd10 pop {r4, pc}
|
|
200001fa: 4b03 ldr r3, [pc, #12] @ (20000208 <mutex_exit+0x40>)
|
|
200001fc: 4a03 ldr r2, [pc, #12] @ (2000020c <mutex_exit+0x44>)
|
|
200001fe: 4804 ldr r0, [pc, #16] @ (20000210 <mutex_exit+0x48>)
|
|
20000200: 21b4 movs r1, #180 @ 0xb4
|
|
20000202: f000 f809 bl 20000218 <____assert_func_veneer>
|
|
20000206: 46c0 nop @ (mov r8, r8)
|
|
20000208: 100058b8 .word 0x100058b8
|
|
2000020c: 100058f0 .word 0x100058f0
|
|
20000210: 10005860 .word 0x10005860
|
|
|
|
20000214 <__aeabi_idiv0>:
|
|
20000214: 4770 bx lr
|
|
20000216: 46c0 nop @ (mov r8, r8)
|
|
|
|
20000218 <____assert_func_veneer>:
|
|
20000218: b401 push {r0}
|
|
2000021a: 4802 ldr r0, [pc, #8] @ (20000224 <____assert_func_veneer+0xc>)
|
|
2000021c: 4684 mov ip, r0
|
|
2000021e: bc01 pop {r0}
|
|
20000220: 4760 bx ip
|
|
20000222: bf00 nop
|
|
20000224: 100022a9 .word 0x100022a9
|
|
|
|
20000228 <__best_effort_wfe_or_timeout_veneer>:
|
|
20000228: b401 push {r0}
|
|
2000022a: 4802 ldr r0, [pc, #8] @ (20000234 <__best_effort_wfe_or_timeout_veneer+0xc>)
|
|
2000022c: 4684 mov ip, r0
|
|
2000022e: bc01 pop {r0}
|
|
20000230: 4760 bx ip
|
|
20000232: bf00 nop
|
|
20000234: 10001925 .word 0x10001925
|
|
|
|
20000238 <striped_spin_lock_num>:
|
|
20000238: 00000010 ....
|
|
|
|
2000023c <irq_handler_chain_slots>:
|
|
2000023c: 00000000 .word 0x00000000
|
|
20000240: 00010000 .word 0x00010000
|
|
...
|
|
2000024c: 00020000 .word 0x00020000
|
|
...
|
|
20000258: 00030000 .word 0x00030000
|
|
...
|
|
20000264: 00ff0000 .word 0x00ff0000
|
|
20000268: 00000000 .word 0x00000000
|
|
|
|
2000026c <irq_handler_chain_first_slot>:
|
|
2000026c: b501 push {r0, lr}
|
|
2000026e: 6848 ldr r0, [r1, #4]
|
|
20000270: 3101 adds r1, #1
|
|
20000272: 468e mov lr, r1
|
|
20000274: 4700 bx r0
|
|
|
|
20000276 <irq_handler_chain_remove_tail>:
|
|
20000276: 4670 mov r0, lr
|
|
20000278: 3809 subs r0, #9
|
|
2000027a: 4901 ldr r1, [pc, #4] @ (20000280 <irq_handler_chain_remove_tail+0xa>)
|
|
2000027c: 4788 blx r1
|
|
2000027e: bd01 pop {r0, pc}
|
|
20000280: 10000e6d .word 0x10000e6d
|
|
|
|
20000284 <default_alarm_pool>:
|
|
20000284: 2000029c 00000000 20000828 20000ae4 ... ....(.. ...
|
|
...
|
|
|
|
2000029c <default_alarm_pool_heap>:
|
|
2000029c: 20000af4 00000000 00000000 00000010 ... ............
|
|
200002ac: 00000000 ....
|
|
|
|
200002b0 <aeabi_bits_funcs>:
|
|
200002b0: 00003350 .word 0x00003350
|
|
200002b4: 0000334c .word 0x0000334c
|
|
200002b8: 00003354 .word 0x00003354
|
|
200002bc: 00003352 .word 0x00003352
|
|
|
|
200002c0 <aeabi_bits_funcs_end>:
|
|
200002c0: 0000534d .word 0x0000534d
|
|
200002c4: 0000434d .word 0x0000434d
|
|
200002c8: 00003453 .word 0x00003453
|
|
200002cc: 00003443 .word 0x00003443
|
|
|
|
200002d0 <__malloc_sbrk_base>:
|
|
200002d0: ffffffff ....
|
|
|
|
200002d4 <__malloc_trim_threshold>:
|
|
200002d4: 00020000 ....
|
|
|
|
200002d8 <__malloc_av_>:
|
|
...
|
|
200002e0: 200002d8 200002d8 200002e0 200002e0 ... ... ... ...
|
|
200002f0: 200002e8 200002e8 200002f0 200002f0 ... ... ... ...
|
|
20000300: 200002f8 200002f8 20000300 20000300 ... ... ... ...
|
|
20000310: 20000308 20000308 20000310 20000310 ... ... ... ...
|
|
20000320: 20000318 20000318 20000320 20000320 ... ... .. ..
|
|
20000330: 20000328 20000328 20000330 20000330 (.. (.. 0.. 0..
|
|
20000340: 20000338 20000338 20000340 20000340 8.. 8.. @.. @..
|
|
20000350: 20000348 20000348 20000350 20000350 H.. H.. P.. P..
|
|
20000360: 20000358 20000358 20000360 20000360 X.. X.. `.. `..
|
|
20000370: 20000368 20000368 20000370 20000370 h.. h.. p.. p..
|
|
20000380: 20000378 20000378 20000380 20000380 x.. x.. ... ...
|
|
20000390: 20000388 20000388 20000390 20000390 ... ... ... ...
|
|
200003a0: 20000398 20000398 200003a0 200003a0 ... ... ... ...
|
|
200003b0: 200003a8 200003a8 200003b0 200003b0 ... ... ... ...
|
|
200003c0: 200003b8 200003b8 200003c0 200003c0 ... ... ... ...
|
|
200003d0: 200003c8 200003c8 200003d0 200003d0 ... ... ... ...
|
|
200003e0: 200003d8 200003d8 200003e0 200003e0 ... ... ... ...
|
|
200003f0: 200003e8 200003e8 200003f0 200003f0 ... ... ... ...
|
|
20000400: 200003f8 200003f8 20000400 20000400 ... ... ... ...
|
|
20000410: 20000408 20000408 20000410 20000410 ... ... ... ...
|
|
20000420: 20000418 20000418 20000420 20000420 ... ... .. ..
|
|
20000430: 20000428 20000428 20000430 20000430 (.. (.. 0.. 0..
|
|
20000440: 20000438 20000438 20000440 20000440 8.. 8.. @.. @..
|
|
20000450: 20000448 20000448 20000450 20000450 H.. H.. P.. P..
|
|
20000460: 20000458 20000458 20000460 20000460 X.. X.. `.. `..
|
|
20000470: 20000468 20000468 20000470 20000470 h.. h.. p.. p..
|
|
20000480: 20000478 20000478 20000480 20000480 x.. x.. ... ...
|
|
20000490: 20000488 20000488 20000490 20000490 ... ... ... ...
|
|
200004a0: 20000498 20000498 200004a0 200004a0 ... ... ... ...
|
|
200004b0: 200004a8 200004a8 200004b0 200004b0 ... ... ... ...
|
|
200004c0: 200004b8 200004b8 200004c0 200004c0 ... ... ... ...
|
|
200004d0: 200004c8 200004c8 200004d0 200004d0 ... ... ... ...
|
|
200004e0: 200004d8 200004d8 200004e0 200004e0 ... ... ... ...
|
|
200004f0: 200004e8 200004e8 200004f0 200004f0 ... ... ... ...
|
|
20000500: 200004f8 200004f8 20000500 20000500 ... ... ... ...
|
|
20000510: 20000508 20000508 20000510 20000510 ... ... ... ...
|
|
20000520: 20000518 20000518 20000520 20000520 ... ... .. ..
|
|
20000530: 20000528 20000528 20000530 20000530 (.. (.. 0.. 0..
|
|
20000540: 20000538 20000538 20000540 20000540 8.. 8.. @.. @..
|
|
20000550: 20000548 20000548 20000550 20000550 H.. H.. P.. P..
|
|
20000560: 20000558 20000558 20000560 20000560 X.. X.. `.. `..
|
|
20000570: 20000568 20000568 20000570 20000570 h.. h.. p.. p..
|
|
20000580: 20000578 20000578 20000580 20000580 x.. x.. ... ...
|
|
20000590: 20000588 20000588 20000590 20000590 ... ... ... ...
|
|
200005a0: 20000598 20000598 200005a0 200005a0 ... ... ... ...
|
|
200005b0: 200005a8 200005a8 200005b0 200005b0 ... ... ... ...
|
|
200005c0: 200005b8 200005b8 200005c0 200005c0 ... ... ... ...
|
|
200005d0: 200005c8 200005c8 200005d0 200005d0 ... ... ... ...
|
|
200005e0: 200005d8 200005d8 200005e0 200005e0 ... ... ... ...
|
|
200005f0: 200005e8 200005e8 200005f0 200005f0 ... ... ... ...
|
|
20000600: 200005f8 200005f8 20000600 20000600 ... ... ... ...
|
|
20000610: 20000608 20000608 20000610 20000610 ... ... ... ...
|
|
20000620: 20000618 20000618 20000620 20000620 ... ... .. ..
|
|
20000630: 20000628 20000628 20000630 20000630 (.. (.. 0.. 0..
|
|
20000640: 20000638 20000638 20000640 20000640 8.. 8.. @.. @..
|
|
20000650: 20000648 20000648 20000650 20000650 H.. H.. P.. P..
|
|
20000660: 20000658 20000658 20000660 20000660 X.. X.. `.. `..
|
|
20000670: 20000668 20000668 20000670 20000670 h.. h.. p.. p..
|
|
20000680: 20000678 20000678 20000680 20000680 x.. x.. ... ...
|
|
20000690: 20000688 20000688 20000690 20000690 ... ... ... ...
|
|
200006a0: 20000698 20000698 200006a0 200006a0 ... ... ... ...
|
|
200006b0: 200006a8 200006a8 200006b0 200006b0 ... ... ... ...
|
|
200006c0: 200006b8 200006b8 200006c0 200006c0 ... ... ... ...
|
|
200006d0: 200006c8 200006c8 200006d0 200006d0 ... ... ... ...
|
|
|
|
200006e0 <_impure_ptr>:
|
|
200006e0: 200006e8 00000000 ... ....
|
|
|
|
200006e8 <_impure_data>:
|
|
200006e8: 00000000 20000978 200009dc 20000a40 ....x.. ... @..
|
|
...
|
|
20000780: 00000001 00000000 abcd330e e66d1234 .........3..4.m.
|
|
20000790: 0005deec 0000000b 00000000 00000000 ................
|
|
...
|
|
|
|
20000808 <print_mutex>:
|
|
...
|
|
|
|
20000810 <__mutex_array_end>:
|
|
20000810: 1000454d .word 0x1000454d
|
|
20000814: 100035c1 .word 0x100035c1
|
|
20000818: 10003cc1 .word 0x10003cc1
|
|
2000081c: 100043e1 .word 0x100043e1
|
|
|
|
20000820 <__frame_dummy_init_array_entry>:
|
|
20000820: 10000331 1...
|