11169 lines
435 KiB
Plaintext
11169 lines
435 KiB
Plaintext
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/home/spider_pig/src/c/pico/clacer/build/clacer.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .boot2 00000100 10000000 10000000 00001000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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1 .text 00005750 10000100 10000100 00001100 2**3
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 000010a4 10005850 10005850 00006850 2**3
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .binary_info 00000024 100068f4 100068f4 000078f4 2**2
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CONTENTS, ALLOC, LOAD, DATA
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4 .ram_vector_table 000000c0 20000000 20000000 0000883c 2**2
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CONTENTS
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5 .data 0000077c 200000c0 10006918 000080c0 2**4
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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6 .uninitialized_data 00000000 2000083c 2000083c 000088fc 2**0
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CONTENTS
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7 .scratch_x 00000000 20040000 20040000 000088fc 2**0
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CONTENTS
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8 .scratch_y 00000000 20041000 20041000 000088fc 2**0
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CONTENTS
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9 .bss 00000574 20000840 20000840 00008840 2**3
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ALLOC
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10 .heap 00000800 20000db4 20000db4 000088fc 2**2
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CONTENTS, READONLY
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11 .stack_dummy 00000800 20041000 20041000 00009100 2**5
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CONTENTS, READONLY
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12 .ARM.attributes 00000028 00000000 00000000 00009900 2**0
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CONTENTS, READONLY
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13 .comment 00000055 00000000 00000000 00009928 2**0
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CONTENTS, READONLY
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14 .debug_info 0001a1c7 00000000 00000000 0000997d 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_abbrev 000055cb 00000000 00000000 00023b44 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_loclists 0000a861 00000000 00000000 0002910f 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_aranges 000011c0 00000000 00000000 00033970 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_rnglists 00000fd4 00000000 00000000 00034b30 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .debug_line 00010495 00000000 00000000 00035b04 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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20 .debug_str 00004ac6 00000000 00000000 00045f99 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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21 .debug_frame 000022d4 00000000 00000000 0004aa60 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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22 .debug_line_str 00000347 00000000 00000000 0004cd34 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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/home/spider_pig/src/c/pico/clacer/build/clacer.elf: file format elf32-littlearm
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Disassembly of section .boot2:
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10000000 <__boot2_start__>:
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10000000: 4b32b500 .word 0x4b32b500
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10000004: 60582021 .word 0x60582021
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10000008: 21026898 .word 0x21026898
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1000000c: 60984388 .word 0x60984388
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10000010: 611860d8 .word 0x611860d8
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10000014: 4b2e6158 .word 0x4b2e6158
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10000018: 60992100 .word 0x60992100
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1000001c: 61592102 .word 0x61592102
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10000020: 22f02101 .word 0x22f02101
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10000024: 492b5099 .word 0x492b5099
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10000028: 21016019 .word 0x21016019
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1000002c: 20356099 .word 0x20356099
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10000030: f844f000 .word 0xf844f000
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10000034: 42902202 .word 0x42902202
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10000038: 2106d014 .word 0x2106d014
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1000003c: f0006619 .word 0xf0006619
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10000040: 6e19f834 .word 0x6e19f834
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10000044: 66192101 .word 0x66192101
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10000048: 66182000 .word 0x66182000
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1000004c: f000661a .word 0xf000661a
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10000050: 6e19f82c .word 0x6e19f82c
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10000054: 6e196e19 .word 0x6e196e19
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10000058: f0002005 .word 0xf0002005
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1000005c: 2101f82f .word 0x2101f82f
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10000060: d1f94208 .word 0xd1f94208
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10000064: 60992100 .word 0x60992100
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10000068: 6019491b .word 0x6019491b
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1000006c: 60592100 .word 0x60592100
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10000070: 481b491a .word 0x481b491a
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10000074: 21016001 .word 0x21016001
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10000078: 21eb6099 .word 0x21eb6099
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1000007c: 21a06619 .word 0x21a06619
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10000080: f0006619 .word 0xf0006619
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10000084: 2100f812 .word 0x2100f812
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10000088: 49166099 .word 0x49166099
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1000008c: 60014814 .word 0x60014814
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10000090: 60992101 .word 0x60992101
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10000094: 2800bc01 .word 0x2800bc01
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10000098: 4700d000 .word 0x4700d000
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1000009c: 49134812 .word 0x49134812
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100000a0: c8036008 .word 0xc8036008
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100000a4: 8808f380 .word 0x8808f380
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100000a8: b5034708 .word 0xb5034708
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100000ac: 20046a99 .word 0x20046a99
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100000b0: d0fb4201 .word 0xd0fb4201
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100000b4: 42012001 .word 0x42012001
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100000b8: bd03d1f8 .word 0xbd03d1f8
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100000bc: 6618b502 .word 0x6618b502
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100000c0: f7ff6618 .word 0xf7ff6618
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100000c4: 6e18fff2 .word 0x6e18fff2
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100000c8: bd026e18 .word 0xbd026e18
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100000cc: 40020000 .word 0x40020000
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100000d0: 18000000 .word 0x18000000
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100000d4: 00070000 .word 0x00070000
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100000d8: 005f0300 .word 0x005f0300
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100000dc: 00002221 .word 0x00002221
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100000e0: 180000f4 .word 0x180000f4
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100000e4: a0002022 .word 0xa0002022
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100000e8: 10000100 .word 0x10000100
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100000ec: e000ed08 .word 0xe000ed08
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...
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100000fc: 7a4eb274 .word 0x7a4eb274
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Disassembly of section .text:
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10000100 <__VECTOR_TABLE>:
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10000100: 20042000 .word 0x20042000
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10000104: 100001f7 .word 0x100001f7
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10000108: 100001c3 .word 0x100001c3
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1000010c: 100001c5 .word 0x100001c5
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10000110: 100001c1 .word 0x100001c1
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10000114: 100001c1 .word 0x100001c1
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10000118: 100001c1 .word 0x100001c1
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1000011c: 100001c1 .word 0x100001c1
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10000120: 100001c1 .word 0x100001c1
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10000124: 100001c1 .word 0x100001c1
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10000128: 100001c1 .word 0x100001c1
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1000012c: 100001c7 .word 0x100001c7
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10000130: 100001c1 .word 0x100001c1
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10000134: 100001c1 .word 0x100001c1
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10000138: 100001c9 .word 0x100001c9
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1000013c: 100001cb .word 0x100001cb
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10000140: 100001cd .word 0x100001cd
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10000144: 100001cd .word 0x100001cd
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10000148: 100001cd .word 0x100001cd
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1000014c: 100001cd .word 0x100001cd
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10000150: 100001cd .word 0x100001cd
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10000154: 100001cd .word 0x100001cd
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10000158: 100001cd .word 0x100001cd
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1000015c: 100001cd .word 0x100001cd
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10000160: 100001cd .word 0x100001cd
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10000164: 100001cd .word 0x100001cd
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10000168: 100001cd .word 0x100001cd
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1000016c: 100001cd .word 0x100001cd
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10000170: 100001cd .word 0x100001cd
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10000174: 100001cd .word 0x100001cd
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10000178: 100001cd .word 0x100001cd
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1000017c: 100001cd .word 0x100001cd
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10000180: 100001cd .word 0x100001cd
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10000184: 100001cd .word 0x100001cd
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10000188: 100001cd .word 0x100001cd
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1000018c: 100001cd .word 0x100001cd
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10000190: 100001cd .word 0x100001cd
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10000194: 100001cd .word 0x100001cd
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10000198: 100001cd .word 0x100001cd
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1000019c: 100001cd .word 0x100001cd
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100001a0: 100001cd .word 0x100001cd
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100001a4: 100001cd .word 0x100001cd
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100001a8: 100001cd .word 0x100001cd
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100001ac: 100001cd .word 0x100001cd
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100001b0: 100001cd .word 0x100001cd
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100001b4: 100001cd .word 0x100001cd
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100001b8: 100001cd .word 0x100001cd
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100001bc: 100001cd .word 0x100001cd
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100001c0 <isr_invalid>:
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100001c0: be00 bkpt 0x0000
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100001c2 <isr_nmi>:
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100001c2: be00 bkpt 0x0000
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100001c4 <isr_hardfault>:
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100001c4: be00 bkpt 0x0000
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100001c6 <isr_svcall>:
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100001c6: be00 bkpt 0x0000
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100001c8 <isr_pendsv>:
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100001c8: be00 bkpt 0x0000
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100001ca <isr_systick>:
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100001ca: be00 bkpt 0x0000
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100001cc <__unhandled_user_irq>:
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100001cc: f3ef 8005 mrs r0, IPSR
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100001d0: 3810 subs r0, #16
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100001d2 <unhandled_user_irq_num_in_r0>:
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100001d2: be00 bkpt 0x0000
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100001d4 <binary_info_header>:
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100001d4: 7188ebf2 .word 0x7188ebf2
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100001d8: 100068f4 .word 0x100068f4
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100001dc: 10006918 .word 0x10006918
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100001e0: 10000234 .word 0x10000234
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100001e4: e71aa390 .word 0xe71aa390
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100001e8 <_entry_point>:
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100001e8: 2000 movs r0, #0
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100001ea: 491f ldr r1, [pc, #124] @ (10000268 <hold_non_core0_in_bootrom+0xa>)
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100001ec: 6008 str r0, [r1, #0]
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100001ee: c806 ldmia r0!, {r1, r2}
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100001f0: f381 8808 msr MSP, r1
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100001f4: 4710 bx r2
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100001f6 <_reset_handler>:
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100001f6: 481d ldr r0, [pc, #116] @ (1000026c <hold_non_core0_in_bootrom+0xe>)
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100001f8: 6800 ldr r0, [r0, #0]
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100001fa: 2800 cmp r0, #0
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100001fc: d12f bne.n 1000025e <hold_non_core0_in_bootrom>
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100001fe: a40d add r4, pc, #52 @ (adr r4, 10000234 <data_cpy_table>)
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10000200: cc0e ldmia r4!, {r1, r2, r3}
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10000202: 2900 cmp r1, #0
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10000204: d002 beq.n 1000020c <_reset_handler+0x16>
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10000206: f000 f812 bl 1000022e <data_cpy>
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1000020a: e7f9 b.n 10000200 <_reset_handler+0xa>
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1000020c: 4918 ldr r1, [pc, #96] @ (10000270 <hold_non_core0_in_bootrom+0x12>)
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1000020e: 4a19 ldr r2, [pc, #100] @ (10000274 <hold_non_core0_in_bootrom+0x16>)
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10000210: 2000 movs r0, #0
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10000212: e000 b.n 10000216 <bss_fill_test>
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10000214 <bss_fill_loop>:
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10000214: c101 stmia r1!, {r0}
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10000216 <bss_fill_test>:
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10000216: 4291 cmp r1, r2
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10000218: d1fc bne.n 10000214 <bss_fill_loop>
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1000021a <platform_entry>:
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1000021a: 4917 ldr r1, [pc, #92] @ (10000278 <hold_non_core0_in_bootrom+0x1a>)
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1000021c: 4788 blx r1
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1000021e: 4917 ldr r1, [pc, #92] @ (1000027c <hold_non_core0_in_bootrom+0x1e>)
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10000220: 4788 blx r1
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10000222: 4917 ldr r1, [pc, #92] @ (10000280 <hold_non_core0_in_bootrom+0x22>)
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10000224: 4788 blx r1
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10000226: be00 bkpt 0x0000
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10000228: e7fd b.n 10000226 <platform_entry+0xc>
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1000022a <data_cpy_loop>:
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1000022a: c901 ldmia r1!, {r0}
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1000022c: c201 stmia r2!, {r0}
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1000022e <data_cpy>:
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1000022e: 429a cmp r2, r3
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10000230: d3fb bcc.n 1000022a <data_cpy_loop>
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10000232: 4770 bx lr
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10000234 <data_cpy_table>:
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10000234: 10006918 .word 0x10006918
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10000238: 200000c0 .word 0x200000c0
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1000023c: 2000083c .word 0x2000083c
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10000240: 10007094 .word 0x10007094
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10000244: 20040000 .word 0x20040000
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10000248: 20040000 .word 0x20040000
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1000024c: 10007094 .word 0x10007094
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10000250: 20041000 .word 0x20041000
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10000254: 20041000 .word 0x20041000
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10000258: 00000000 .word 0x00000000
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1000025c: 4770 bx lr
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1000025e <hold_non_core0_in_bootrom>:
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1000025e: 4809 ldr r0, [pc, #36] @ (10000284 <hold_non_core0_in_bootrom+0x26>)
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10000260: f003 fa3e bl 100036e0 <rom_func_lookup>
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10000264: 4700 bx r0
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10000266: 0000 .short 0x0000
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10000268: e000ed08 .word 0xe000ed08
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1000026c: d0000000 .word 0xd0000000
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10000270: 20000840 .word 0x20000840
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10000274: 20000db4 .word 0x20000db4
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10000278: 100023f1 .word 0x100023f1
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1000027c: 100005e1 .word 0x100005e1
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10000280: 100023b1 .word 0x100023b1
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10000284: 00005657 .word 0x00005657
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10000288 <__bi_50>:
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10000288: 50520006 5360b3ab 10006788 ..RP..`S.g..
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10000294 <__bi_38>:
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10000294: 50520006 02031c86 10006798 ..RP.....g..
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100002a0 <__bi_30>:
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100002a0: 50520006 9da22254 100067a0 ..RPT"...g..
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100002ac <__bi_22>:
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100002ac: 50520005 68f465de 10007094 ..RP.e.h.p..
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100002b8 <_init>:
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100002b8: b5f8 push {r3, r4, r5, r6, r7, lr}
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100002ba: 46c0 nop @ (mov r8, r8)
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100002bc <deregister_tm_clones>:
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100002bc: 4804 ldr r0, [pc, #16] @ (100002d0 <deregister_tm_clones+0x14>)
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100002be: 4b05 ldr r3, [pc, #20] @ (100002d4 <deregister_tm_clones+0x18>)
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100002c0: b510 push {r4, lr}
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100002c2: 4283 cmp r3, r0
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100002c4: d003 beq.n 100002ce <deregister_tm_clones+0x12>
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100002c6: 4b04 ldr r3, [pc, #16] @ (100002d8 <deregister_tm_clones+0x1c>)
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100002c8: 2b00 cmp r3, #0
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100002ca: d000 beq.n 100002ce <deregister_tm_clones+0x12>
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100002cc: 4798 blx r3
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100002ce: bd10 pop {r4, pc}
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100002d0: 2000083c .word 0x2000083c
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100002d4: 2000083c .word 0x2000083c
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100002d8: 00000000 .word 0x00000000
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100002dc <register_tm_clones>:
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100002dc: 4806 ldr r0, [pc, #24] @ (100002f8 <register_tm_clones+0x1c>)
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100002de: 4907 ldr r1, [pc, #28] @ (100002fc <register_tm_clones+0x20>)
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100002e0: 1a09 subs r1, r1, r0
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100002e2: 108b asrs r3, r1, #2
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100002e4: 0fc9 lsrs r1, r1, #31
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100002e6: 18c9 adds r1, r1, r3
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100002e8: b510 push {r4, lr}
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100002ea: 1049 asrs r1, r1, #1
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100002ec: d003 beq.n 100002f6 <register_tm_clones+0x1a>
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100002ee: 4b04 ldr r3, [pc, #16] @ (10000300 <register_tm_clones+0x24>)
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100002f0: 2b00 cmp r3, #0
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100002f2: d000 beq.n 100002f6 <register_tm_clones+0x1a>
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100002f4: 4798 blx r3
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100002f6: bd10 pop {r4, pc}
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100002f8: 2000083c .word 0x2000083c
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100002fc: 2000083c .word 0x2000083c
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10000300: 00000000 .word 0x00000000
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10000304 <__do_global_dtors_aux>:
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10000304: b510 push {r4, lr}
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10000306: 4c07 ldr r4, [pc, #28] @ (10000324 <__do_global_dtors_aux+0x20>)
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10000308: 7823 ldrb r3, [r4, #0]
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1000030a: 2b00 cmp r3, #0
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1000030c: d109 bne.n 10000322 <__do_global_dtors_aux+0x1e>
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1000030e: f7ff ffd5 bl 100002bc <deregister_tm_clones>
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10000312: 4b05 ldr r3, [pc, #20] @ (10000328 <__do_global_dtors_aux+0x24>)
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10000314: 2b00 cmp r3, #0
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10000316: d002 beq.n 1000031e <__do_global_dtors_aux+0x1a>
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10000318: 4804 ldr r0, [pc, #16] @ (1000032c <__do_global_dtors_aux+0x28>)
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1000031a: e000 b.n 1000031e <__do_global_dtors_aux+0x1a>
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1000031c: bf00 nop
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1000031e: 2301 movs r3, #1
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10000320: 7023 strb r3, [r4, #0]
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10000322: bd10 pop {r4, pc}
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10000324: 20000940 .word 0x20000940
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10000328: 00000000 .word 0x00000000
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1000032c: 10005850 .word 0x10005850
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10000330 <frame_dummy>:
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10000330: 4b05 ldr r3, [pc, #20] @ (10000348 <frame_dummy+0x18>)
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10000332: b510 push {r4, lr}
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10000334: 2b00 cmp r3, #0
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10000336: d003 beq.n 10000340 <frame_dummy+0x10>
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10000338: 4904 ldr r1, [pc, #16] @ (1000034c <frame_dummy+0x1c>)
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1000033a: 4805 ldr r0, [pc, #20] @ (10000350 <frame_dummy+0x20>)
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1000033c: e000 b.n 10000340 <frame_dummy+0x10>
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1000033e: bf00 nop
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|
10000340: f7ff ffcc bl 100002dc <register_tm_clones>
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10000344: bd10 pop {r4, pc}
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10000346: 46c0 nop @ (mov r8, r8)
|
|
10000348: 00000000 .word 0x00000000
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|
1000034c: 20000944 .word 0x20000944
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10000350: 10005850 .word 0x10005850
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10000354 <sm_config_set_clkdiv>:
|
|
10000354: b570 push {r4, r5, r6, lr}
|
|
10000356: 0006 movs r6, r0
|
|
10000358: 1c0d adds r5, r1, #0
|
|
1000035a: 1c08 adds r0, r1, #0
|
|
1000035c: f004 f8c0 bl 100044e0 <__wrap___aeabi_f2uiz>
|
|
10000360: b284 uxth r4, r0
|
|
10000362: 2c00 cmp r4, #0
|
|
10000364: d012 beq.n 1000038c <sm_config_set_clkdiv+0x38>
|
|
10000366: 0020 movs r0, r4
|
|
10000368: f004 f892 bl 10004490 <__wrap___aeabi_ui2f>
|
|
1000036c: 1c01 adds r1, r0, #0
|
|
1000036e: 1c28 adds r0, r5, #0
|
|
10000370: f004 f865 bl 1000443e <__wrap___aeabi_fsub>
|
|
10000374: 2187 movs r1, #135 @ 0x87
|
|
10000376: 05c9 lsls r1, r1, #23
|
|
10000378: f004 f881 bl 1000447e <__wrap___aeabi_fmul>
|
|
1000037c: f004 f8b0 bl 100044e0 <__wrap___aeabi_f2uiz>
|
|
10000380: b2c3 uxtb r3, r0
|
|
10000382: 021b lsls r3, r3, #8
|
|
10000384: 0424 lsls r4, r4, #16
|
|
10000386: 431c orrs r4, r3
|
|
10000388: 6034 str r4, [r6, #0]
|
|
1000038a: bd70 pop {r4, r5, r6, pc}
|
|
1000038c: 2300 movs r3, #0
|
|
1000038e: e7f8 b.n 10000382 <sm_config_set_clkdiv+0x2e>
|
|
|
|
10000390 <pio_get_default_sm_config>:
|
|
10000390: b510 push {r4, lr}
|
|
10000392: 0004 movs r4, r0
|
|
10000394: 2210 movs r2, #16
|
|
10000396: 2100 movs r1, #0
|
|
10000398: f004 f968 bl 1000466c <__wrap_memset>
|
|
1000039c: 2380 movs r3, #128 @ 0x80
|
|
1000039e: 025b lsls r3, r3, #9
|
|
100003a0: 6023 str r3, [r4, #0]
|
|
100003a2: 23f8 movs r3, #248 @ 0xf8
|
|
100003a4: 025b lsls r3, r3, #9
|
|
100003a6: 6063 str r3, [r4, #4]
|
|
100003a8: 2380 movs r3, #128 @ 0x80
|
|
100003aa: 02db lsls r3, r3, #11
|
|
100003ac: 60a3 str r3, [r4, #8]
|
|
100003ae: 23c0 movs r3, #192 @ 0xc0
|
|
100003b0: 031b lsls r3, r3, #12
|
|
100003b2: 60a3 str r3, [r4, #8]
|
|
100003b4: 0020 movs r0, r4
|
|
100003b6: bd10 pop {r4, pc}
|
|
|
|
100003b8 <tft_program_get_default_config>:
|
|
100003b8: b570 push {r4, r5, r6, lr}
|
|
100003ba: 0004 movs r4, r0
|
|
100003bc: 000d movs r5, r1
|
|
100003be: f7ff ffe7 bl 10000390 <pio_get_default_sm_config>
|
|
100003c2: 1c6a adds r2, r5, #1
|
|
100003c4: 6863 ldr r3, [r4, #4]
|
|
100003c6: 4909 ldr r1, [pc, #36] @ (100003ec <tft_program_get_default_config+0x34>)
|
|
100003c8: 400b ands r3, r1
|
|
100003ca: 01ed lsls r5, r5, #7
|
|
100003cc: 432b orrs r3, r5
|
|
100003ce: 0312 lsls r2, r2, #12
|
|
100003d0: 4313 orrs r3, r2
|
|
100003d2: 6063 str r3, [r4, #4]
|
|
100003d4: 68e2 ldr r2, [r4, #12]
|
|
100003d6: 00d2 lsls r2, r2, #3
|
|
100003d8: 08d2 lsrs r2, r2, #3
|
|
100003da: 2180 movs r1, #128 @ 0x80
|
|
100003dc: 0589 lsls r1, r1, #22
|
|
100003de: 430a orrs r2, r1
|
|
100003e0: 60e2 str r2, [r4, #12]
|
|
100003e2: 4a03 ldr r2, [pc, #12] @ (100003f0 <tft_program_get_default_config+0x38>)
|
|
100003e4: 4013 ands r3, r2
|
|
100003e6: 6063 str r3, [r4, #4]
|
|
100003e8: 0020 movs r0, r4
|
|
100003ea: bd70 pop {r4, r5, r6, pc}
|
|
100003ec: fffe007f .word 0xfffe007f
|
|
100003f0: 9fffffff .word 0x9fffffff
|
|
|
|
100003f4 <set_sys_clock_khz>:
|
|
100003f4: b570 push {r4, r5, r6, lr}
|
|
100003f6: b084 sub sp, #16
|
|
100003f8: 0006 movs r6, r0
|
|
100003fa: 000c movs r4, r1
|
|
100003fc: ab01 add r3, sp, #4
|
|
100003fe: aa02 add r2, sp, #8
|
|
10000400: a903 add r1, sp, #12
|
|
10000402: f000 fab3 bl 1000096c <check_sys_clock_khz>
|
|
10000406: 1e05 subs r5, r0, #0
|
|
10000408: d104 bne.n 10000414 <set_sys_clock_khz+0x20>
|
|
1000040a: 2c00 cmp r4, #0
|
|
1000040c: d109 bne.n 10000422 <set_sys_clock_khz+0x2e>
|
|
1000040e: 0020 movs r0, r4
|
|
10000410: b004 add sp, #16
|
|
10000412: bd70 pop {r4, r5, r6, pc}
|
|
10000414: 9a01 ldr r2, [sp, #4]
|
|
10000416: 9902 ldr r1, [sp, #8]
|
|
10000418: 9803 ldr r0, [sp, #12]
|
|
1000041a: f000 fa6b bl 100008f4 <set_sys_clock_pll>
|
|
1000041e: 002c movs r4, r5
|
|
10000420: e7f5 b.n 1000040e <set_sys_clock_khz+0x1a>
|
|
10000422: 4802 ldr r0, [pc, #8] @ (1000042c <set_sys_clock_khz+0x38>)
|
|
10000424: 0031 movs r1, r6
|
|
10000426: f002 f85f bl 100024e8 <panic>
|
|
1000042a: 46c0 nop @ (mov r8, r8)
|
|
1000042c: 10005850 .word 0x10005850
|
|
|
|
10000430 <tft_program_init>:
|
|
10000430: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000432: 46ce mov lr, r9
|
|
10000434: 4647 mov r7, r8
|
|
10000436: b580 push {r7, lr}
|
|
10000438: b087 sub sp, #28
|
|
1000043a: 0004 movs r4, r0
|
|
1000043c: 000f movs r7, r1
|
|
1000043e: 4691 mov r9, r2
|
|
10000440: 001e movs r6, r3
|
|
10000442: 4b28 ldr r3, [pc, #160] @ (100004e4 <tft_program_init+0xb4>)
|
|
10000444: 4298 cmp r0, r3
|
|
10000446: d04b beq.n 100004e0 <tft_program_init+0xb0>
|
|
10000448: 2507 movs r5, #7
|
|
1000044a: 0029 movs r1, r5
|
|
1000044c: 0030 movs r0, r6
|
|
1000044e: f000 fae5 bl 10000a1c <gpio_set_function>
|
|
10000452: 0029 movs r1, r5
|
|
10000454: 980e ldr r0, [sp, #56] @ 0x38
|
|
10000456: f000 fae1 bl 10000a1c <gpio_set_function>
|
|
1000045a: 2301 movs r3, #1
|
|
1000045c: 4698 mov r8, r3
|
|
1000045e: 9300 str r3, [sp, #0]
|
|
10000460: 0032 movs r2, r6
|
|
10000462: 0039 movs r1, r7
|
|
10000464: 0020 movs r0, r4
|
|
10000466: f004 fc83 bl 10004d70 <pio_sm_set_consecutive_pindirs>
|
|
1000046a: 4643 mov r3, r8
|
|
1000046c: 9300 str r3, [sp, #0]
|
|
1000046e: 9a0e ldr r2, [sp, #56] @ 0x38
|
|
10000470: 0039 movs r1, r7
|
|
10000472: 0020 movs r0, r4
|
|
10000474: f004 fc7c bl 10004d70 <pio_sm_set_consecutive_pindirs>
|
|
10000478: 4649 mov r1, r9
|
|
1000047a: a802 add r0, sp, #8
|
|
1000047c: f7ff ff9c bl 100003b8 <tft_program_get_default_config>
|
|
10000480: 9d05 ldr r5, [sp, #20]
|
|
10000482: 4b19 ldr r3, [pc, #100] @ (100004e8 <tft_program_init+0xb8>)
|
|
10000484: 401d ands r5, r3
|
|
10000486: 9b0e ldr r3, [sp, #56] @ 0x38
|
|
10000488: 029b lsls r3, r3, #10
|
|
1000048a: 431d orrs r5, r3
|
|
1000048c: 9505 str r5, [sp, #20]
|
|
1000048e: 4b17 ldr r3, [pc, #92] @ (100004ec <tft_program_init+0xbc>)
|
|
10000490: 401d ands r5, r3
|
|
10000492: 432e orrs r6, r5
|
|
10000494: 2380 movs r3, #128 @ 0x80
|
|
10000496: 035b lsls r3, r3, #13
|
|
10000498: 4333 orrs r3, r6
|
|
1000049a: 9305 str r3, [sp, #20]
|
|
1000049c: 9b04 ldr r3, [sp, #16]
|
|
1000049e: 009b lsls r3, r3, #2
|
|
100004a0: 089b lsrs r3, r3, #2
|
|
100004a2: 2280 movs r2, #128 @ 0x80
|
|
100004a4: 05d2 lsls r2, r2, #23
|
|
100004a6: 4313 orrs r3, r2
|
|
100004a8: 9304 str r3, [sp, #16]
|
|
100004aa: 990f ldr r1, [sp, #60] @ 0x3c
|
|
100004ac: a802 add r0, sp, #8
|
|
100004ae: f7ff ff51 bl 10000354 <sm_config_set_clkdiv>
|
|
100004b2: 9a04 ldr r2, [sp, #16]
|
|
100004b4: 4b0e ldr r3, [pc, #56] @ (100004f0 <tft_program_init+0xc0>)
|
|
100004b6: 401a ands r2, r3
|
|
100004b8: 2380 movs r3, #128 @ 0x80
|
|
100004ba: 029b lsls r3, r3, #10
|
|
100004bc: 4313 orrs r3, r2
|
|
100004be: 9304 str r3, [sp, #16]
|
|
100004c0: ab02 add r3, sp, #8
|
|
100004c2: 464a mov r2, r9
|
|
100004c4: 0039 movs r1, r7
|
|
100004c6: 0020 movs r0, r4
|
|
100004c8: f004 fca4 bl 10004e14 <pio_sm_init>
|
|
100004cc: 6822 ldr r2, [r4, #0]
|
|
100004ce: 4643 mov r3, r8
|
|
100004d0: 40bb lsls r3, r7
|
|
100004d2: 4313 orrs r3, r2
|
|
100004d4: 6023 str r3, [r4, #0]
|
|
100004d6: b007 add sp, #28
|
|
100004d8: bcc0 pop {r6, r7}
|
|
100004da: 46b9 mov r9, r7
|
|
100004dc: 46b0 mov r8, r6
|
|
100004de: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100004e0: 2506 movs r5, #6
|
|
100004e2: e7b2 b.n 1000044a <tft_program_init+0x1a>
|
|
100004e4: 50200000 .word 0x50200000
|
|
100004e8: ffff83ff .word 0xffff83ff
|
|
100004ec: fc0fffe0 .word 0xfc0fffe0
|
|
100004f0: c1f5ffff .word 0xc1f5ffff
|
|
|
|
100004f4 <channel_config_set_chain_to>:
|
|
100004f4: b510 push {r4, lr}
|
|
100004f6: 290c cmp r1, #12
|
|
100004f8: d806 bhi.n 10000508 <channel_config_set_chain_to+0x14>
|
|
100004fa: 6803 ldr r3, [r0, #0]
|
|
100004fc: 4a05 ldr r2, [pc, #20] @ (10000514 <channel_config_set_chain_to+0x20>)
|
|
100004fe: 4013 ands r3, r2
|
|
10000500: 02c9 lsls r1, r1, #11
|
|
10000502: 430b orrs r3, r1
|
|
10000504: 6003 str r3, [r0, #0]
|
|
10000506: bd10 pop {r4, pc}
|
|
10000508: 4b03 ldr r3, [pc, #12] @ (10000518 <channel_config_set_chain_to+0x24>)
|
|
1000050a: 4a04 ldr r2, [pc, #16] @ (1000051c <channel_config_set_chain_to+0x28>)
|
|
1000050c: 4804 ldr r0, [pc, #16] @ (10000520 <channel_config_set_chain_to+0x2c>)
|
|
1000050e: 21c3 movs r1, #195 @ 0xc3
|
|
10000510: f001 ff52 bl 100023b8 <__assert_func>
|
|
10000514: ffff87ff .word 0xffff87ff
|
|
10000518: 10005884 .word 0x10005884
|
|
1000051c: 10005988 .word 0x10005988
|
|
10000520: 100058a4 .word 0x100058a4
|
|
|
|
10000524 <dma_channel_get_default_config>:
|
|
10000524: b500 push {lr}
|
|
10000526: b083 sub sp, #12
|
|
10000528: 0001 movs r1, r0
|
|
1000052a: 2300 movs r3, #0
|
|
1000052c: 9301 str r3, [sp, #4]
|
|
1000052e: 3310 adds r3, #16
|
|
10000530: 9301 str r3, [sp, #4]
|
|
10000532: 4b13 ldr r3, [pc, #76] @ (10000580 <dma_channel_get_default_config+0x5c>)
|
|
10000534: 9301 str r3, [sp, #4]
|
|
10000536: a801 add r0, sp, #4
|
|
10000538: f7ff ffdc bl 100004f4 <channel_config_set_chain_to>
|
|
1000053c: 9b01 ldr r3, [sp, #4]
|
|
1000053e: 220c movs r2, #12
|
|
10000540: 0019 movs r1, r3
|
|
10000542: 4391 bics r1, r2
|
|
10000544: 000a movs r2, r1
|
|
10000546: 2108 movs r1, #8
|
|
10000548: 430a orrs r2, r1
|
|
1000054a: 9201 str r2, [sp, #4]
|
|
1000054c: 4a0d ldr r2, [pc, #52] @ (10000584 <dma_channel_get_default_config+0x60>)
|
|
1000054e: 401a ands r2, r3
|
|
10000550: 430a orrs r2, r1
|
|
10000552: 9201 str r2, [sp, #4]
|
|
10000554: 4a0c ldr r2, [pc, #48] @ (10000588 <dma_channel_get_default_config+0x64>)
|
|
10000556: 401a ands r2, r3
|
|
10000558: 430a orrs r2, r1
|
|
1000055a: 9201 str r2, [sp, #4]
|
|
1000055c: 4a0b ldr r2, [pc, #44] @ (1000058c <dma_channel_get_default_config+0x68>)
|
|
1000055e: 401a ands r2, r3
|
|
10000560: 4311 orrs r1, r2
|
|
10000562: 9101 str r1, [sp, #4]
|
|
10000564: 2109 movs r1, #9
|
|
10000566: 430a orrs r2, r1
|
|
10000568: 9201 str r2, [sp, #4]
|
|
1000056a: 4a09 ldr r2, [pc, #36] @ (10000590 <dma_channel_get_default_config+0x6c>)
|
|
1000056c: 401a ands r2, r3
|
|
1000056e: 430a orrs r2, r1
|
|
10000570: 9201 str r2, [sp, #4]
|
|
10000572: 4808 ldr r0, [pc, #32] @ (10000594 <dma_channel_get_default_config+0x70>)
|
|
10000574: 4018 ands r0, r3
|
|
10000576: 4308 orrs r0, r1
|
|
10000578: 9001 str r0, [sp, #4]
|
|
1000057a: b003 add sp, #12
|
|
1000057c: bd00 pop {pc}
|
|
1000057e: 46c0 nop @ (mov r8, r8)
|
|
10000580: 001f8010 .word 0x001f8010
|
|
10000584: fffff833 .word 0xfffff833
|
|
10000588: ffbff833 .word 0xffbff833
|
|
1000058c: ff9ff833 .word 0xff9ff833
|
|
10000590: ff1ff833 .word 0xff1ff833
|
|
10000594: ff1ff831 .word 0xff1ff831
|
|
|
|
10000598 <update_us_since_boot>:
|
|
10000598: b510 push {r4, lr}
|
|
1000059a: 2b00 cmp r3, #0
|
|
1000059c: db02 blt.n 100005a4 <update_us_since_boot+0xc>
|
|
1000059e: 6002 str r2, [r0, #0]
|
|
100005a0: 6043 str r3, [r0, #4]
|
|
100005a2: bd10 pop {r4, pc}
|
|
100005a4: 4b02 ldr r3, [pc, #8] @ (100005b0 <update_us_since_boot+0x18>)
|
|
100005a6: 4a03 ldr r2, [pc, #12] @ (100005b4 <update_us_since_boot+0x1c>)
|
|
100005a8: 4803 ldr r0, [pc, #12] @ (100005b8 <update_us_since_boot+0x20>)
|
|
100005aa: 213f movs r1, #63 @ 0x3f
|
|
100005ac: f001 ff04 bl 100023b8 <__assert_func>
|
|
100005b0: 100058fc .word 0x100058fc
|
|
100005b4: 10005970 .word 0x10005970
|
|
100005b8: 10005918 .word 0x10005918
|
|
|
|
100005bc <get_absolute_time>:
|
|
100005bc: b510 push {r4, lr}
|
|
100005be: b082 sub sp, #8
|
|
100005c0: 0004 movs r4, r0
|
|
100005c2: f001 fa29 bl 10001a18 <time_us_64>
|
|
100005c6: 0002 movs r2, r0
|
|
100005c8: 000b movs r3, r1
|
|
100005ca: 4668 mov r0, sp
|
|
100005cc: f7ff ffe4 bl 10000598 <update_us_since_boot>
|
|
100005d0: 9a00 ldr r2, [sp, #0]
|
|
100005d2: 9b01 ldr r3, [sp, #4]
|
|
100005d4: 6022 str r2, [r4, #0]
|
|
100005d6: 6063 str r3, [r4, #4]
|
|
100005d8: 0020 movs r0, r4
|
|
100005da: b002 add sp, #8
|
|
100005dc: bd10 pop {r4, pc}
|
|
...
|
|
|
|
100005e0 <main>:
|
|
100005e0: b530 push {r4, r5, lr}
|
|
100005e2: b087 sub sp, #28
|
|
100005e4: f004 f9e4 bl 100049b0 <stdio_init_all>
|
|
100005e8: 2101 movs r1, #1
|
|
100005ea: 4824 ldr r0, [pc, #144] @ (1000067c <main+0x9c>)
|
|
100005ec: f7ff ff02 bl 100003f4 <set_sys_clock_khz>
|
|
100005f0: 4923 ldr r1, [pc, #140] @ (10000680 <main+0xa0>)
|
|
100005f2: 4c24 ldr r4, [pc, #144] @ (10000684 <main+0xa4>)
|
|
100005f4: 0020 movs r0, r4
|
|
100005f6: f004 fb9f bl 10004d38 <pio_add_program>
|
|
100005fa: 0002 movs r2, r0
|
|
100005fc: 23fe movs r3, #254 @ 0xfe
|
|
100005fe: 059b lsls r3, r3, #22
|
|
10000600: 9301 str r3, [sp, #4]
|
|
10000602: 2312 movs r3, #18
|
|
10000604: 9300 str r3, [sp, #0]
|
|
10000606: 3301 adds r3, #1
|
|
10000608: 2100 movs r1, #0
|
|
1000060a: 0020 movs r0, r4
|
|
1000060c: f7ff ff10 bl 10000430 <tft_program_init>
|
|
10000610: 2001 movs r0, #1
|
|
10000612: f004 fc57 bl 10004ec4 <dma_claim_unused_channel>
|
|
10000616: 0004 movs r4, r0
|
|
10000618: f7ff ff84 bl 10000524 <dma_channel_get_default_config>
|
|
1000061c: 4b1a ldr r3, [pc, #104] @ (10000688 <main+0xa8>)
|
|
1000061e: 4018 ands r0, r3
|
|
10000620: 2308 movs r3, #8
|
|
10000622: 4318 orrs r0, r3
|
|
10000624: 01a3 lsls r3, r4, #6
|
|
10000626: 22a0 movs r2, #160 @ 0xa0
|
|
10000628: 05d2 lsls r2, r2, #23
|
|
1000062a: 4694 mov ip, r2
|
|
1000062c: 4463 add r3, ip
|
|
1000062e: 2200 movs r2, #0
|
|
10000630: 601a str r2, [r3, #0]
|
|
10000632: 4a16 ldr r2, [pc, #88] @ (1000068c <main+0xac>)
|
|
10000634: 605a str r2, [r3, #4]
|
|
10000636: 2280 movs r2, #128 @ 0x80
|
|
10000638: 0152 lsls r2, r2, #5
|
|
1000063a: 609a str r2, [r3, #8]
|
|
1000063c: 6118 str r0, [r3, #16]
|
|
1000063e: 4814 ldr r0, [pc, #80] @ (10000690 <main+0xb0>)
|
|
10000640: 0021 movs r1, r4
|
|
10000642: f000 f8e9 bl 10000818 <tft_init>
|
|
10000646: a802 add r0, sp, #8
|
|
10000648: f7ff ffb8 bl 100005bc <get_absolute_time>
|
|
1000064c: 9c02 ldr r4, [sp, #8]
|
|
1000064e: 9d03 ldr r5, [sp, #12]
|
|
10000650: 2000 movs r0, #0
|
|
10000652: f000 f91d bl 10000890 <tft_fill>
|
|
10000656: 480f ldr r0, [pc, #60] @ (10000694 <main+0xb4>)
|
|
10000658: f000 f91a bl 10000890 <tft_fill>
|
|
1000065c: 2000 movs r0, #0
|
|
1000065e: f000 f917 bl 10000890 <tft_fill>
|
|
10000662: a802 add r0, sp, #8
|
|
10000664: f7ff ffaa bl 100005bc <get_absolute_time>
|
|
10000668: 9a02 ldr r2, [sp, #8]
|
|
1000066a: 9b03 ldr r3, [sp, #12]
|
|
1000066c: 1b12 subs r2, r2, r4
|
|
1000066e: 41ab sbcs r3, r5
|
|
10000670: 9204 str r2, [sp, #16]
|
|
10000672: 9305 str r3, [sp, #20]
|
|
10000674: 4808 ldr r0, [pc, #32] @ (10000698 <main+0xb8>)
|
|
10000676: f004 f98f bl 10004998 <__wrap_printf>
|
|
1000067a: e7e4 b.n 10000646 <main+0x66>
|
|
1000067c: 00030d40 .word 0x00030d40
|
|
10000680: 100059c8 .word 0x100059c8
|
|
10000684: 50200000 .word 0x50200000
|
|
10000688: ffe07ff3 .word 0xffe07ff3
|
|
1000068c: 50200010 .word 0x50200010
|
|
10000690: 100059a4 .word 0x100059a4
|
|
10000694: 0000ffff .word 0x0000ffff
|
|
10000698: 10005968 .word 0x10005968
|
|
|
|
1000069c <tft_push>:
|
|
1000069c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000069e: 46c6 mov lr, r8
|
|
100006a0: b500 push {lr}
|
|
100006a2: 4690 mov r8, r2
|
|
100006a4: 001d movs r5, r3
|
|
100006a6: 9f06 ldr r7, [sp, #24]
|
|
100006a8: 0878 lsrs r0, r7, #1
|
|
100006aa: 0080 lsls r0, r0, #2
|
|
100006ac: f003 ffc8 bl 10004640 <__wrap_malloc>
|
|
100006b0: 0006 movs r6, r0
|
|
100006b2: 2200 movs r2, #0
|
|
100006b4: 2400 movs r4, #0
|
|
100006b6: e00a b.n 100006ce <tft_push+0x32>
|
|
100006b8: 0063 lsls r3, r4, #1
|
|
100006ba: 5b59 ldrh r1, [r3, r5]
|
|
100006bc: 0409 lsls r1, r1, #16
|
|
100006be: 1c63 adds r3, r4, #1
|
|
100006c0: 005b lsls r3, r3, #1
|
|
100006c2: 5b5b ldrh r3, [r3, r5]
|
|
100006c4: 4319 orrs r1, r3
|
|
100006c6: 0093 lsls r3, r2, #2
|
|
100006c8: 50f1 str r1, [r6, r3]
|
|
100006ca: 3402 adds r4, #2
|
|
100006cc: 3201 adds r2, #1
|
|
100006ce: 42bc cmp r4, r7
|
|
100006d0: d3f2 bcc.n 100006b8 <tft_push+0x1c>
|
|
100006d2: 4643 mov r3, r8
|
|
100006d4: 019b lsls r3, r3, #6
|
|
100006d6: 22a0 movs r2, #160 @ 0xa0
|
|
100006d8: 05d2 lsls r2, r2, #23
|
|
100006da: 4694 mov ip, r2
|
|
100006dc: 4463 add r3, ip
|
|
100006de: 63de str r6, [r3, #60] @ 0x3c
|
|
100006e0: 2064 movs r0, #100 @ 0x64
|
|
100006e2: f001 f91a bl 1000191a <sleep_ms>
|
|
100006e6: 0030 movs r0, r6
|
|
100006e8: f003 ffb4 bl 10004654 <__wrap_free>
|
|
100006ec: bc80 pop {r7}
|
|
100006ee: 46b8 mov r8, r7
|
|
100006f0: bdf0 pop {r4, r5, r6, r7, pc}
|
|
...
|
|
|
|
100006f4 <tft_set_dc_cs>:
|
|
100006f4: b570 push {r4, r5, r6, lr}
|
|
100006f6: 0004 movs r4, r0
|
|
100006f8: 000d movs r5, r1
|
|
100006fa: 2001 movs r0, #1
|
|
100006fc: 2100 movs r1, #0
|
|
100006fe: f001 f8ff bl 10001900 <sleep_us>
|
|
10000702: 490b ldr r1, [pc, #44] @ (10000730 <tft_set_dc_cs+0x3c>)
|
|
10000704: 6948 ldr r0, [r1, #20]
|
|
10000706: 2301 movs r3, #1
|
|
10000708: 001a movs r2, r3
|
|
1000070a: 4082 lsls r2, r0
|
|
1000070c: 6909 ldr r1, [r1, #16]
|
|
1000070e: 408b lsls r3, r1
|
|
10000710: 4313 orrs r3, r2
|
|
10000712: 4084 lsls r4, r0
|
|
10000714: 408d lsls r5, r1
|
|
10000716: 432c orrs r4, r5
|
|
10000718: 22d0 movs r2, #208 @ 0xd0
|
|
1000071a: 0612 lsls r2, r2, #24
|
|
1000071c: 6911 ldr r1, [r2, #16]
|
|
1000071e: 404c eors r4, r1
|
|
10000720: 401c ands r4, r3
|
|
10000722: 61d4 str r4, [r2, #28]
|
|
10000724: 2001 movs r0, #1
|
|
10000726: 2100 movs r1, #0
|
|
10000728: f001 f8ea bl 10001900 <sleep_us>
|
|
1000072c: bd70 pop {r4, r5, r6, pc}
|
|
1000072e: 46c0 nop @ (mov r8, r8)
|
|
10000730: 20000d80 .word 0x20000d80
|
|
|
|
10000734 <tft_write_cmd>:
|
|
10000734: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000736: 46d6 mov lr, sl
|
|
10000738: 464f mov r7, r9
|
|
1000073a: 4646 mov r6, r8
|
|
1000073c: b5c0 push {r6, r7, lr}
|
|
1000073e: 0005 movs r5, r0
|
|
10000740: 000f movs r7, r1
|
|
10000742: 0014 movs r4, r2
|
|
10000744: 4699 mov r9, r3
|
|
10000746: 000b movs r3, r1
|
|
10000748: 3318 adds r3, #24
|
|
1000074a: 2601 movs r6, #1
|
|
1000074c: 409e lsls r6, r3
|
|
1000074e: 6086 str r6, [r0, #8]
|
|
10000750: 68ab ldr r3, [r5, #8]
|
|
10000752: 4233 tst r3, r6
|
|
10000754: d0fc beq.n 10000750 <tft_write_cmd+0x1c>
|
|
10000756: 2100 movs r1, #0
|
|
10000758: 2000 movs r0, #0
|
|
1000075a: f7ff ffcb bl 100006f4 <tft_set_dc_cs>
|
|
1000075e: 1c63 adds r3, r4, #1
|
|
10000760: 469a mov sl, r3
|
|
10000762: 7821 ldrb r1, [r4, #0]
|
|
10000764: 686a ldr r2, [r5, #4]
|
|
10000766: 003b movs r3, r7
|
|
10000768: 3310 adds r3, #16
|
|
1000076a: 2401 movs r4, #1
|
|
1000076c: 409c lsls r4, r3
|
|
1000076e: 0023 movs r3, r4
|
|
10000770: 4013 ands r3, r2
|
|
10000772: 4698 mov r8, r3
|
|
10000774: 4214 tst r4, r2
|
|
10000776: d1f5 bne.n 10000764 <tft_write_cmd+0x30>
|
|
10000778: 3704 adds r7, #4
|
|
1000077a: 00bf lsls r7, r7, #2
|
|
1000077c: 19ef adds r7, r5, r7
|
|
1000077e: 7039 strb r1, [r7, #0]
|
|
10000780: 464b mov r3, r9
|
|
10000782: 2b01 cmp r3, #1
|
|
10000784: d918 bls.n 100007b8 <tft_write_cmd+0x84>
|
|
10000786: 60ae str r6, [r5, #8]
|
|
10000788: 68ab ldr r3, [r5, #8]
|
|
1000078a: 4233 tst r3, r6
|
|
1000078c: d0fc beq.n 10000788 <tft_write_cmd+0x54>
|
|
1000078e: 2100 movs r1, #0
|
|
10000790: 2001 movs r0, #1
|
|
10000792: f7ff ffaf bl 100006f4 <tft_set_dc_cs>
|
|
10000796: e00b b.n 100007b0 <tft_write_cmd+0x7c>
|
|
10000798: 4653 mov r3, sl
|
|
1000079a: 3301 adds r3, #1
|
|
1000079c: 4652 mov r2, sl
|
|
1000079e: 7811 ldrb r1, [r2, #0]
|
|
100007a0: 686a ldr r2, [r5, #4]
|
|
100007a2: 4222 tst r2, r4
|
|
100007a4: d1fc bne.n 100007a0 <tft_write_cmd+0x6c>
|
|
100007a6: 7039 strb r1, [r7, #0]
|
|
100007a8: 2201 movs r2, #1
|
|
100007aa: 4694 mov ip, r2
|
|
100007ac: 44e0 add r8, ip
|
|
100007ae: 469a mov sl, r3
|
|
100007b0: 464b mov r3, r9
|
|
100007b2: 3b01 subs r3, #1
|
|
100007b4: 4543 cmp r3, r8
|
|
100007b6: d8ef bhi.n 10000798 <tft_write_cmd+0x64>
|
|
100007b8: 60ae str r6, [r5, #8]
|
|
100007ba: 68ab ldr r3, [r5, #8]
|
|
100007bc: 4233 tst r3, r6
|
|
100007be: d0fc beq.n 100007ba <tft_write_cmd+0x86>
|
|
100007c0: 2101 movs r1, #1
|
|
100007c2: 2001 movs r0, #1
|
|
100007c4: f7ff ff96 bl 100006f4 <tft_set_dc_cs>
|
|
100007c8: bce0 pop {r5, r6, r7}
|
|
100007ca: 46ba mov sl, r7
|
|
100007cc: 46b1 mov r9, r6
|
|
100007ce: 46a8 mov r8, r5
|
|
100007d0: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100007d2 <lcd_init>:
|
|
100007d2: b570 push {r4, r5, r6, lr}
|
|
100007d4: 0006 movs r6, r0
|
|
100007d6: 000d movs r5, r1
|
|
100007d8: 0014 movs r4, r2
|
|
100007da: e00a b.n 100007f2 <lcd_init+0x20>
|
|
100007dc: 1ca2 adds r2, r4, #2
|
|
100007de: 0029 movs r1, r5
|
|
100007e0: 0030 movs r0, r6
|
|
100007e2: f7ff ffa7 bl 10000734 <tft_write_cmd>
|
|
100007e6: 20c8 movs r0, #200 @ 0xc8
|
|
100007e8: f001 f897 bl 1000191a <sleep_ms>
|
|
100007ec: 7823 ldrb r3, [r4, #0]
|
|
100007ee: 3302 adds r3, #2
|
|
100007f0: 18e4 adds r4, r4, r3
|
|
100007f2: 7823 ldrb r3, [r4, #0]
|
|
100007f4: 2b00 cmp r3, #0
|
|
100007f6: d1f1 bne.n 100007dc <lcd_init+0xa>
|
|
100007f8: bd70 pop {r4, r5, r6, pc}
|
|
|
|
100007fa <tft_start_pixels>:
|
|
100007fa: b500 push {lr}
|
|
100007fc: b083 sub sp, #12
|
|
100007fe: 466b mov r3, sp
|
|
10000800: 1dda adds r2, r3, #7
|
|
10000802: 232c movs r3, #44 @ 0x2c
|
|
10000804: 7013 strb r3, [r2, #0]
|
|
10000806: 3b2b subs r3, #43 @ 0x2b
|
|
10000808: f7ff ff94 bl 10000734 <tft_write_cmd>
|
|
1000080c: 2100 movs r1, #0
|
|
1000080e: 2001 movs r0, #1
|
|
10000810: f7ff ff70 bl 100006f4 <tft_set_dc_cs>
|
|
10000814: b003 add sp, #12
|
|
10000816: bd00 pop {pc}
|
|
|
|
10000818 <tft_init>:
|
|
10000818: b570 push {r4, r5, r6, lr}
|
|
1000081a: 000d movs r5, r1
|
|
1000081c: 4c19 ldr r4, [pc, #100] @ (10000884 <tft_init+0x6c>)
|
|
1000081e: 2224 movs r2, #36 @ 0x24
|
|
10000820: 0001 movs r1, r0
|
|
10000822: 0020 movs r0, r4
|
|
10000824: f003 ff28 bl 10004678 <__wrap___aeabi_memcpy>
|
|
10000828: 4b17 ldr r3, [pc, #92] @ (10000888 <tft_init+0x70>)
|
|
1000082a: 601d str r5, [r3, #0]
|
|
1000082c: 6920 ldr r0, [r4, #16]
|
|
1000082e: f000 f90d bl 10000a4c <gpio_init>
|
|
10000832: 6960 ldr r0, [r4, #20]
|
|
10000834: f000 f90a bl 10000a4c <gpio_init>
|
|
10000838: 69a0 ldr r0, [r4, #24]
|
|
1000083a: f000 f907 bl 10000a4c <gpio_init>
|
|
1000083e: 69e0 ldr r0, [r4, #28]
|
|
10000840: f000 f904 bl 10000a4c <gpio_init>
|
|
10000844: 6923 ldr r3, [r4, #16]
|
|
10000846: 2601 movs r6, #1
|
|
10000848: 0032 movs r2, r6
|
|
1000084a: 409a lsls r2, r3
|
|
1000084c: 25d0 movs r5, #208 @ 0xd0
|
|
1000084e: 062d lsls r5, r5, #24
|
|
10000850: 626a str r2, [r5, #36] @ 0x24
|
|
10000852: 6963 ldr r3, [r4, #20]
|
|
10000854: 0031 movs r1, r6
|
|
10000856: 4099 lsls r1, r3
|
|
10000858: 6269 str r1, [r5, #36] @ 0x24
|
|
1000085a: 69a3 ldr r3, [r4, #24]
|
|
1000085c: 0031 movs r1, r6
|
|
1000085e: 4099 lsls r1, r3
|
|
10000860: 000b movs r3, r1
|
|
10000862: 6269 str r1, [r5, #36] @ 0x24
|
|
10000864: 69e1 ldr r1, [r4, #28]
|
|
10000866: 0030 movs r0, r6
|
|
10000868: 4088 lsls r0, r1
|
|
1000086a: 6268 str r0, [r5, #36] @ 0x24
|
|
1000086c: 616a str r2, [r5, #20]
|
|
1000086e: 616b str r3, [r5, #20]
|
|
10000870: 4a06 ldr r2, [pc, #24] @ (1000088c <tft_init+0x74>)
|
|
10000872: 6861 ldr r1, [r4, #4]
|
|
10000874: 6820 ldr r0, [r4, #0]
|
|
10000876: f7ff ffac bl 100007d2 <lcd_init>
|
|
1000087a: 69e3 ldr r3, [r4, #28]
|
|
1000087c: 409e lsls r6, r3
|
|
1000087e: 616e str r6, [r5, #20]
|
|
10000880: bd70 pop {r4, r5, r6, pc}
|
|
10000882: 46c0 nop @ (mov r8, r8)
|
|
10000884: 20000d80 .word 0x20000d80
|
|
10000888: 20000b44 .word 0x20000b44
|
|
1000088c: 100059d4 .word 0x100059d4
|
|
|
|
10000890 <tft_fill>:
|
|
10000890: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000892: b083 sub sp, #12
|
|
10000894: 0005 movs r5, r0
|
|
10000896: 4b15 ldr r3, [pc, #84] @ (100008ec <tft_fill+0x5c>)
|
|
10000898: 6859 ldr r1, [r3, #4]
|
|
1000089a: 6818 ldr r0, [r3, #0]
|
|
1000089c: f7ff ffad bl 100007fa <tft_start_pixels>
|
|
100008a0: 2080 movs r0, #128 @ 0x80
|
|
100008a2: 0180 lsls r0, r0, #6
|
|
100008a4: f003 fecc bl 10004640 <__wrap_malloc>
|
|
100008a8: 0004 movs r4, r0
|
|
100008aa: 2300 movs r3, #0
|
|
100008ac: e002 b.n 100008b4 <tft_fill+0x24>
|
|
100008ae: 005a lsls r2, r3, #1
|
|
100008b0: 52a5 strh r5, [r4, r2]
|
|
100008b2: 3301 adds r3, #1
|
|
100008b4: 2280 movs r2, #128 @ 0x80
|
|
100008b6: 0152 lsls r2, r2, #5
|
|
100008b8: 4293 cmp r3, r2
|
|
100008ba: d3f8 bcc.n 100008ae <tft_fill+0x1e>
|
|
100008bc: 4f0c ldr r7, [pc, #48] @ (100008f0 <tft_fill+0x60>)
|
|
100008be: 683a ldr r2, [r7, #0]
|
|
100008c0: 4d0a ldr r5, [pc, #40] @ (100008ec <tft_fill+0x5c>)
|
|
100008c2: 6869 ldr r1, [r5, #4]
|
|
100008c4: 6828 ldr r0, [r5, #0]
|
|
100008c6: 2680 movs r6, #128 @ 0x80
|
|
100008c8: 0176 lsls r6, r6, #5
|
|
100008ca: 9600 str r6, [sp, #0]
|
|
100008cc: 0023 movs r3, r4
|
|
100008ce: f7ff fee5 bl 1000069c <tft_push>
|
|
100008d2: 683a ldr r2, [r7, #0]
|
|
100008d4: 6869 ldr r1, [r5, #4]
|
|
100008d6: 6828 ldr r0, [r5, #0]
|
|
100008d8: 9600 str r6, [sp, #0]
|
|
100008da: 0023 movs r3, r4
|
|
100008dc: f7ff fede bl 1000069c <tft_push>
|
|
100008e0: 0020 movs r0, r4
|
|
100008e2: f003 feb7 bl 10004654 <__wrap_free>
|
|
100008e6: b003 add sp, #12
|
|
100008e8: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100008ea: 46c0 nop @ (mov r8, r8)
|
|
100008ec: 20000d80 .word 0x20000d80
|
|
100008f0: 20000b44 .word 0x20000b44
|
|
|
|
100008f4 <set_sys_clock_pll>:
|
|
100008f4: b5f0 push {r4, r5, r6, r7, lr}
|
|
100008f6: b083 sub sp, #12
|
|
100008f8: 0004 movs r4, r0
|
|
100008fa: 000d movs r5, r1
|
|
100008fc: 0016 movs r6, r2
|
|
100008fe: f000 f8b1 bl 10000a64 <running_on_fpga>
|
|
10000902: 2800 cmp r0, #0
|
|
10000904: d001 beq.n 1000090a <set_sys_clock_pll+0x16>
|
|
10000906: b003 add sp, #12
|
|
10000908: bdf0 pop {r4, r5, r6, r7, pc}
|
|
1000090a: 4f15 ldr r7, [pc, #84] @ (10000960 <set_sys_clock_pll+0x6c>)
|
|
1000090c: 9700 str r7, [sp, #0]
|
|
1000090e: 003b movs r3, r7
|
|
10000910: 2201 movs r2, #1
|
|
10000912: 2101 movs r1, #1
|
|
10000914: 3005 adds r0, #5
|
|
10000916: f001 fb73 bl 10002000 <clock_configure>
|
|
1000091a: 9600 str r6, [sp, #0]
|
|
1000091c: 002b movs r3, r5
|
|
1000091e: 0022 movs r2, r4
|
|
10000920: 2101 movs r1, #1
|
|
10000922: 4810 ldr r0, [pc, #64] @ (10000964 <set_sys_clock_pll+0x70>)
|
|
10000924: f001 fc74 bl 10002210 <pll_init>
|
|
10000928: 0031 movs r1, r6
|
|
1000092a: 4369 muls r1, r5
|
|
1000092c: 0020 movs r0, r4
|
|
1000092e: f002 ff2b bl 10003788 <__wrap___aeabi_uidiv>
|
|
10000932: 0004 movs r4, r0
|
|
10000934: 4b0c ldr r3, [pc, #48] @ (10000968 <set_sys_clock_pll+0x74>)
|
|
10000936: 9300 str r3, [sp, #0]
|
|
10000938: 2200 movs r2, #0
|
|
1000093a: 2102 movs r1, #2
|
|
1000093c: 2004 movs r0, #4
|
|
1000093e: f001 fb5f bl 10002000 <clock_configure>
|
|
10000942: 9400 str r4, [sp, #0]
|
|
10000944: 0023 movs r3, r4
|
|
10000946: 2200 movs r2, #0
|
|
10000948: 2101 movs r1, #1
|
|
1000094a: 2005 movs r0, #5
|
|
1000094c: f001 fb58 bl 10002000 <clock_configure>
|
|
10000950: 9700 str r7, [sp, #0]
|
|
10000952: 003b movs r3, r7
|
|
10000954: 2202 movs r2, #2
|
|
10000956: 2100 movs r1, #0
|
|
10000958: 2006 movs r0, #6
|
|
1000095a: f001 fb51 bl 10002000 <clock_configure>
|
|
1000095e: e7d2 b.n 10000906 <set_sys_clock_pll+0x12>
|
|
10000960: 02dc6c00 .word 0x02dc6c00
|
|
10000964: 40028000 .word 0x40028000
|
|
10000968: 00b71b00 .word 0x00b71b00
|
|
|
|
1000096c <check_sys_clock_khz>:
|
|
1000096c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000096e: 46de mov lr, fp
|
|
10000970: 4657 mov r7, sl
|
|
10000972: 464e mov r6, r9
|
|
10000974: 4645 mov r5, r8
|
|
10000976: b5e0 push {r5, r6, r7, lr}
|
|
10000978: b083 sub sp, #12
|
|
1000097a: 4680 mov r8, r0
|
|
1000097c: 468b mov fp, r1
|
|
1000097e: 9200 str r2, [sp, #0]
|
|
10000980: 9301 str r3, [sp, #4]
|
|
10000982: 2004 movs r0, #4
|
|
10000984: f001 fc3e bl 10002204 <clock_get_hz>
|
|
10000988: 21fa movs r1, #250 @ 0xfa
|
|
1000098a: 0089 lsls r1, r1, #2
|
|
1000098c: f002 fefc bl 10003788 <__wrap___aeabi_uidiv>
|
|
10000990: 4682 mov sl, r0
|
|
10000992: 23a0 movs r3, #160 @ 0xa0
|
|
10000994: 005b lsls r3, r3, #1
|
|
10000996: 4699 mov r9, r3
|
|
10000998: e02c b.n 100009f4 <check_sys_clock_khz+0x88>
|
|
1000099a: 3c01 subs r4, #1
|
|
1000099c: 2c00 cmp r4, #0
|
|
1000099e: d020 beq.n 100009e2 <check_sys_clock_khz+0x76>
|
|
100009a0: 0025 movs r5, r4
|
|
100009a2: 437d muls r5, r7
|
|
100009a4: 0029 movs r1, r5
|
|
100009a6: 0030 movs r0, r6
|
|
100009a8: f002 feee bl 10003788 <__wrap___aeabi_uidiv>
|
|
100009ac: 4540 cmp r0, r8
|
|
100009ae: d1f4 bne.n 1000099a <check_sys_clock_khz+0x2e>
|
|
100009b0: 0029 movs r1, r5
|
|
100009b2: 0030 movs r0, r6
|
|
100009b4: f002 fee8 bl 10003788 <__wrap___aeabi_uidiv>
|
|
100009b8: 2900 cmp r1, #0
|
|
100009ba: d1ee bne.n 1000099a <check_sys_clock_khz+0x2e>
|
|
100009bc: 0173 lsls r3, r6, #5
|
|
100009be: 1b9b subs r3, r3, r6
|
|
100009c0: 009b lsls r3, r3, #2
|
|
100009c2: 199b adds r3, r3, r6
|
|
100009c4: 00db lsls r3, r3, #3
|
|
100009c6: 465a mov r2, fp
|
|
100009c8: 6013 str r3, [r2, #0]
|
|
100009ca: 9b00 ldr r3, [sp, #0]
|
|
100009cc: 601f str r7, [r3, #0]
|
|
100009ce: 9b01 ldr r3, [sp, #4]
|
|
100009d0: 601c str r4, [r3, #0]
|
|
100009d2: 2001 movs r0, #1
|
|
100009d4: b003 add sp, #12
|
|
100009d6: bcf0 pop {r4, r5, r6, r7}
|
|
100009d8: 46bb mov fp, r7
|
|
100009da: 46b2 mov sl, r6
|
|
100009dc: 46a9 mov r9, r5
|
|
100009de: 46a0 mov r8, r4
|
|
100009e0: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100009e2: 3f01 subs r7, #1
|
|
100009e4: 2f00 cmp r7, #0
|
|
100009e6: d001 beq.n 100009ec <check_sys_clock_khz+0x80>
|
|
100009e8: 003c movs r4, r7
|
|
100009ea: e7d7 b.n 1000099c <check_sys_clock_khz+0x30>
|
|
100009ec: 2301 movs r3, #1
|
|
100009ee: 425b negs r3, r3
|
|
100009f0: 469c mov ip, r3
|
|
100009f2: 44e1 add r9, ip
|
|
100009f4: 464b mov r3, r9
|
|
100009f6: 2b0f cmp r3, #15
|
|
100009f8: d909 bls.n 10000a0e <check_sys_clock_khz+0xa2>
|
|
100009fa: 4656 mov r6, sl
|
|
100009fc: 464b mov r3, r9
|
|
100009fe: 435e muls r6, r3
|
|
10000a00: 4b04 ldr r3, [pc, #16] @ (10000a14 <check_sys_clock_khz+0xa8>)
|
|
10000a02: 18f2 adds r2, r6, r3
|
|
10000a04: 4b04 ldr r3, [pc, #16] @ (10000a18 <check_sys_clock_khz+0xac>)
|
|
10000a06: 429a cmp r2, r3
|
|
10000a08: d8f0 bhi.n 100009ec <check_sys_clock_khz+0x80>
|
|
10000a0a: 2707 movs r7, #7
|
|
10000a0c: e7ea b.n 100009e4 <check_sys_clock_khz+0x78>
|
|
10000a0e: 2000 movs r0, #0
|
|
10000a10: e7e0 b.n 100009d4 <check_sys_clock_khz+0x68>
|
|
10000a12: 46c0 nop @ (mov r8, r8)
|
|
10000a14: fff48e50 .word 0xfff48e50
|
|
10000a18: 000cf850 .word 0x000cf850
|
|
|
|
10000a1c <gpio_set_function>:
|
|
10000a1c: b510 push {r4, lr}
|
|
10000a1e: 0083 lsls r3, r0, #2
|
|
10000a20: 4a08 ldr r2, [pc, #32] @ (10000a44 <gpio_set_function+0x28>)
|
|
10000a22: 4694 mov ip, r2
|
|
10000a24: 4463 add r3, ip
|
|
10000a26: 681a ldr r2, [r3, #0]
|
|
10000a28: 2440 movs r4, #64 @ 0x40
|
|
10000a2a: 4062 eors r2, r4
|
|
10000a2c: 3480 adds r4, #128 @ 0x80
|
|
10000a2e: 4014 ands r4, r2
|
|
10000a30: 2280 movs r2, #128 @ 0x80
|
|
10000a32: 0152 lsls r2, r2, #5
|
|
10000a34: 4313 orrs r3, r2
|
|
10000a36: 601c str r4, [r3, #0]
|
|
10000a38: 00c0 lsls r0, r0, #3
|
|
10000a3a: 4b03 ldr r3, [pc, #12] @ (10000a48 <gpio_set_function+0x2c>)
|
|
10000a3c: 469c mov ip, r3
|
|
10000a3e: 4460 add r0, ip
|
|
10000a40: 6041 str r1, [r0, #4]
|
|
10000a42: bd10 pop {r4, pc}
|
|
10000a44: 4001c004 .word 0x4001c004
|
|
10000a48: 40014000 .word 0x40014000
|
|
|
|
10000a4c <gpio_init>:
|
|
10000a4c: b510 push {r4, lr}
|
|
10000a4e: 2301 movs r3, #1
|
|
10000a50: 4083 lsls r3, r0
|
|
10000a52: 22d0 movs r2, #208 @ 0xd0
|
|
10000a54: 0612 lsls r2, r2, #24
|
|
10000a56: 6293 str r3, [r2, #40] @ 0x28
|
|
10000a58: 6193 str r3, [r2, #24]
|
|
10000a5a: 2105 movs r1, #5
|
|
10000a5c: f7ff ffde bl 10000a1c <gpio_set_function>
|
|
10000a60: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10000a64 <running_on_fpga>:
|
|
10000a64: 4b03 ldr r3, [pc, #12] @ (10000a74 <running_on_fpga+0x10>)
|
|
10000a66: 681b ldr r3, [r3, #0]
|
|
10000a68: 2002 movs r0, #2
|
|
10000a6a: 4018 ands r0, r3
|
|
10000a6c: 1e43 subs r3, r0, #1
|
|
10000a6e: 4198 sbcs r0, r3
|
|
10000a70: b2c0 uxtb r0, r0
|
|
10000a72: 4770 bx lr
|
|
10000a74: 4006c000 .word 0x4006c000
|
|
|
|
10000a78 <hw_claim_lock>:
|
|
10000a78: f3ef 8010 mrs r0, PRIMASK
|
|
10000a7c: b672 cpsid i
|
|
10000a7e: 4b03 ldr r3, [pc, #12] @ (10000a8c <hw_claim_lock+0x14>)
|
|
10000a80: 681b ldr r3, [r3, #0]
|
|
10000a82: 2b00 cmp r3, #0
|
|
10000a84: d0fb beq.n 10000a7e <hw_claim_lock+0x6>
|
|
10000a86: f3bf 8f5f dmb sy
|
|
10000a8a: 4770 bx lr
|
|
10000a8c: d000012c .word 0xd000012c
|
|
|
|
10000a90 <hw_claim_unlock>:
|
|
10000a90: f3bf 8f5f dmb sy
|
|
10000a94: 4b02 ldr r3, [pc, #8] @ (10000aa0 <hw_claim_unlock+0x10>)
|
|
10000a96: 2200 movs r2, #0
|
|
10000a98: 601a str r2, [r3, #0]
|
|
10000a9a: f380 8810 msr PRIMASK, r0
|
|
10000a9e: 4770 bx lr
|
|
10000aa0: d000012c .word 0xd000012c
|
|
|
|
10000aa4 <hw_claim_or_assert>:
|
|
10000aa4: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10000aa6: 0006 movs r6, r0
|
|
10000aa8: 000c movs r4, r1
|
|
10000aaa: 0015 movs r5, r2
|
|
10000aac: f7ff ffe4 bl 10000a78 <hw_claim_lock>
|
|
10000ab0: 08e3 lsrs r3, r4, #3
|
|
10000ab2: 18f7 adds r7, r6, r3
|
|
10000ab4: 5cf1 ldrb r1, [r6, r3]
|
|
10000ab6: 2207 movs r2, #7
|
|
10000ab8: 4022 ands r2, r4
|
|
10000aba: 2301 movs r3, #1
|
|
10000abc: 4093 lsls r3, r2
|
|
10000abe: 420b tst r3, r1
|
|
10000ac0: d105 bne.n 10000ace <hw_claim_or_assert+0x2a>
|
|
10000ac2: b2db uxtb r3, r3
|
|
10000ac4: 430b orrs r3, r1
|
|
10000ac6: 703b strb r3, [r7, #0]
|
|
10000ac8: f7ff ffe2 bl 10000a90 <hw_claim_unlock>
|
|
10000acc: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10000ace: 0021 movs r1, r4
|
|
10000ad0: 0028 movs r0, r5
|
|
10000ad2: f001 fd09 bl 100024e8 <panic>
|
|
|
|
10000ad6 <hw_claim_unused_from_range>:
|
|
10000ad6: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000ad8: b083 sub sp, #12
|
|
10000ada: 0006 movs r6, r0
|
|
10000adc: 9101 str r1, [sp, #4]
|
|
10000ade: 0014 movs r4, r2
|
|
10000ae0: 001f movs r7, r3
|
|
10000ae2: f7ff ffc9 bl 10000a78 <hw_claim_lock>
|
|
10000ae6: e000 b.n 10000aea <hw_claim_unused_from_range+0x14>
|
|
10000ae8: 3401 adds r4, #1
|
|
10000aea: 42bc cmp r4, r7
|
|
10000aec: d80c bhi.n 10000b08 <hw_claim_unused_from_range+0x32>
|
|
10000aee: 08e3 lsrs r3, r4, #3
|
|
10000af0: 18f5 adds r5, r6, r3
|
|
10000af2: 5cf3 ldrb r3, [r6, r3]
|
|
10000af4: 2107 movs r1, #7
|
|
10000af6: 4021 ands r1, r4
|
|
10000af8: 2201 movs r2, #1
|
|
10000afa: 408a lsls r2, r1
|
|
10000afc: 421a tst r2, r3
|
|
10000afe: d1f3 bne.n 10000ae8 <hw_claim_unused_from_range+0x12>
|
|
10000b00: b2d2 uxtb r2, r2
|
|
10000b02: 431a orrs r2, r3
|
|
10000b04: 702a strb r2, [r5, #0]
|
|
10000b06: e001 b.n 10000b0c <hw_claim_unused_from_range+0x36>
|
|
10000b08: 2401 movs r4, #1
|
|
10000b0a: 4264 negs r4, r4
|
|
10000b0c: f7ff ffc0 bl 10000a90 <hw_claim_unlock>
|
|
10000b10: 2c00 cmp r4, #0
|
|
10000b12: db02 blt.n 10000b1a <hw_claim_unused_from_range+0x44>
|
|
10000b14: 0020 movs r0, r4
|
|
10000b16: b003 add sp, #12
|
|
10000b18: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10000b1a: 9b01 ldr r3, [sp, #4]
|
|
10000b1c: 2b00 cmp r3, #0
|
|
10000b1e: d0f9 beq.n 10000b14 <hw_claim_unused_from_range+0x3e>
|
|
10000b20: 9808 ldr r0, [sp, #32]
|
|
10000b22: f001 fce1 bl 100024e8 <panic>
|
|
...
|
|
|
|
10000b28 <spin_locks_reset>:
|
|
10000b28: 2300 movs r3, #0
|
|
10000b2a: e007 b.n 10000b3c <spin_locks_reset+0x14>
|
|
10000b2c: 4a05 ldr r2, [pc, #20] @ (10000b44 <spin_locks_reset+0x1c>)
|
|
10000b2e: 189a adds r2, r3, r2
|
|
10000b30: 0092 lsls r2, r2, #2
|
|
10000b32: f3bf 8f5f dmb sy
|
|
10000b36: 2100 movs r1, #0
|
|
10000b38: 6011 str r1, [r2, #0]
|
|
10000b3a: 3301 adds r3, #1
|
|
10000b3c: 2b1f cmp r3, #31
|
|
10000b3e: d9f5 bls.n 10000b2c <spin_locks_reset+0x4>
|
|
10000b40: 4770 bx lr
|
|
10000b42: 46c0 nop @ (mov r8, r8)
|
|
10000b44: 34000040 .word 0x34000040
|
|
|
|
10000b48 <next_striped_spin_lock_num>:
|
|
10000b48: 4a05 ldr r2, [pc, #20] @ (10000b60 <next_striped_spin_lock_num+0x18>)
|
|
10000b4a: 7810 ldrb r0, [r2, #0]
|
|
10000b4c: 1c43 adds r3, r0, #1
|
|
10000b4e: b2db uxtb r3, r3
|
|
10000b50: 7013 strb r3, [r2, #0]
|
|
10000b52: 2b17 cmp r3, #23
|
|
10000b54: d902 bls.n 10000b5c <next_striped_spin_lock_num+0x14>
|
|
10000b56: 0013 movs r3, r2
|
|
10000b58: 2210 movs r2, #16
|
|
10000b5a: 701a strb r2, [r3, #0]
|
|
10000b5c: 4770 bx lr
|
|
10000b5e: 46c0 nop @ (mov r8, r8)
|
|
10000b60: 20000238 .word 0x20000238
|
|
|
|
10000b64 <set_raw_irq_handler_and_unlock>:
|
|
10000b64: 4b07 ldr r3, [pc, #28] @ (10000b84 <set_raw_irq_handler_and_unlock+0x20>)
|
|
10000b66: 689b ldr r3, [r3, #8]
|
|
10000b68: 3010 adds r0, #16
|
|
10000b6a: 0080 lsls r0, r0, #2
|
|
10000b6c: 5019 str r1, [r3, r0]
|
|
10000b6e: f3bf 8f5f dmb sy
|
|
10000b72: f3bf 8f5f dmb sy
|
|
10000b76: 4b04 ldr r3, [pc, #16] @ (10000b88 <set_raw_irq_handler_and_unlock+0x24>)
|
|
10000b78: 2100 movs r1, #0
|
|
10000b7a: 6019 str r1, [r3, #0]
|
|
10000b7c: f382 8810 msr PRIMASK, r2
|
|
10000b80: 4770 bx lr
|
|
10000b82: 46c0 nop @ (mov r8, r8)
|
|
10000b84: e000ed00 .word 0xe000ed00
|
|
10000b88: d0000124 .word 0xd0000124
|
|
|
|
10000b8c <resolve_branch>:
|
|
10000b8c: b510 push {r4, lr}
|
|
10000b8e: 8803 ldrh r3, [r0, #0]
|
|
10000b90: 0ada lsrs r2, r3, #11
|
|
10000b92: 2a1c cmp r2, #28
|
|
10000b94: d105 bne.n 10000ba2 <resolve_branch+0x16>
|
|
10000b96: 055b lsls r3, r3, #21
|
|
10000b98: 155b asrs r3, r3, #21
|
|
10000b9a: 3302 adds r3, #2
|
|
10000b9c: 005b lsls r3, r3, #1
|
|
10000b9e: 18c0 adds r0, r0, r3
|
|
10000ba0: bd10 pop {r4, pc}
|
|
10000ba2: 4b03 ldr r3, [pc, #12] @ (10000bb0 <resolve_branch+0x24>)
|
|
10000ba4: 4a03 ldr r2, [pc, #12] @ (10000bb4 <resolve_branch+0x28>)
|
|
10000ba6: 4804 ldr r0, [pc, #16] @ (10000bb8 <resolve_branch+0x2c>)
|
|
10000ba8: 21b1 movs r1, #177 @ 0xb1
|
|
10000baa: f001 fc05 bl 100023b8 <__assert_func>
|
|
10000bae: 46c0 nop @ (mov r8, r8)
|
|
10000bb0: 100059f8 .word 0x100059f8
|
|
10000bb4: 10005b9c .word 0x10005b9c
|
|
10000bb8: 10005a10 .word 0x10005a10
|
|
|
|
10000bbc <make_branch>:
|
|
10000bbc: b510 push {r4, lr}
|
|
10000bbe: 1a09 subs r1, r1, r0
|
|
10000bc0: 1f0b subs r3, r1, #4
|
|
10000bc2: 4a0a ldr r2, [pc, #40] @ (10000bec <make_branch+0x30>)
|
|
10000bc4: 1888 adds r0, r1, r2
|
|
10000bc6: 4a0a ldr r2, [pc, #40] @ (10000bf0 <make_branch+0x34>)
|
|
10000bc8: 4290 cmp r0, r2
|
|
10000bca: d808 bhi.n 10000bde <make_branch+0x22>
|
|
10000bcc: 07c9 lsls r1, r1, #31
|
|
10000bce: d406 bmi.n 10000bde <make_branch+0x22>
|
|
10000bd0: 105b asrs r3, r3, #1
|
|
10000bd2: 055b lsls r3, r3, #21
|
|
10000bd4: 0d5b lsrs r3, r3, #21
|
|
10000bd6: 4807 ldr r0, [pc, #28] @ (10000bf4 <make_branch+0x38>)
|
|
10000bd8: 4318 orrs r0, r3
|
|
10000bda: b280 uxth r0, r0
|
|
10000bdc: bd10 pop {r4, pc}
|
|
10000bde: 4b06 ldr r3, [pc, #24] @ (10000bf8 <make_branch+0x3c>)
|
|
10000be0: 4a06 ldr r2, [pc, #24] @ (10000bfc <make_branch+0x40>)
|
|
10000be2: 4807 ldr r0, [pc, #28] @ (10000c00 <make_branch+0x44>)
|
|
10000be4: 21a3 movs r1, #163 @ 0xa3
|
|
10000be6: f001 fbe7 bl 100023b8 <__assert_func>
|
|
10000bea: 46c0 nop @ (mov r8, r8)
|
|
10000bec: 000007fc .word 0x000007fc
|
|
10000bf0: 00000ffe .word 0x00000ffe
|
|
10000bf4: ffffe000 .word 0xffffe000
|
|
10000bf8: 10005a58 .word 0x10005a58
|
|
10000bfc: 10005b90 .word 0x10005b90
|
|
10000c00: 10005a10 .word 0x10005a10
|
|
|
|
10000c04 <insert_branch_and_link>:
|
|
10000c04: b510 push {r4, lr}
|
|
10000c06: 1a09 subs r1, r1, r0
|
|
10000c08: 3904 subs r1, #4
|
|
10000c0a: 084a lsrs r2, r1, #1
|
|
10000c0c: 0b09 lsrs r1, r1, #12
|
|
10000c0e: d108 bne.n 10000c22 <insert_branch_and_link+0x1e>
|
|
10000c10: 0549 lsls r1, r1, #21
|
|
10000c12: 0d49 lsrs r1, r1, #21
|
|
10000c14: 4b06 ldr r3, [pc, #24] @ (10000c30 <insert_branch_and_link+0x2c>)
|
|
10000c16: 430b orrs r3, r1
|
|
10000c18: 8003 strh r3, [r0, #0]
|
|
10000c1a: 4b06 ldr r3, [pc, #24] @ (10000c34 <insert_branch_and_link+0x30>)
|
|
10000c1c: 4313 orrs r3, r2
|
|
10000c1e: 8043 strh r3, [r0, #2]
|
|
10000c20: bd10 pop {r4, pc}
|
|
10000c22: 4b05 ldr r3, [pc, #20] @ (10000c38 <insert_branch_and_link+0x34>)
|
|
10000c24: 4a05 ldr r2, [pc, #20] @ (10000c3c <insert_branch_and_link+0x38>)
|
|
10000c26: 4806 ldr r0, [pc, #24] @ (10000c40 <insert_branch_and_link+0x3c>)
|
|
10000c28: 21ab movs r1, #171 @ 0xab
|
|
10000c2a: f001 fbc5 bl 100023b8 <__assert_func>
|
|
10000c2e: 46c0 nop @ (mov r8, r8)
|
|
10000c30: fffff000 .word 0xfffff000
|
|
10000c34: fffff800 .word 0xfffff800
|
|
10000c38: 10005a88 .word 0x10005a88
|
|
10000c3c: 10005b64 .word 0x10005b64
|
|
10000c40: 10005a10 .word 0x10005a10
|
|
|
|
10000c44 <irq_is_enabled>:
|
|
10000c44: 2301 movs r3, #1
|
|
10000c46: 4083 lsls r3, r0
|
|
10000c48: 4a03 ldr r2, [pc, #12] @ (10000c58 <irq_is_enabled+0x14>)
|
|
10000c4a: 6810 ldr r0, [r2, #0]
|
|
10000c4c: 4018 ands r0, r3
|
|
10000c4e: 1e43 subs r3, r0, #1
|
|
10000c50: 4198 sbcs r0, r3
|
|
10000c52: b2c0 uxtb r0, r0
|
|
10000c54: 4770 bx lr
|
|
10000c56: 46c0 nop @ (mov r8, r8)
|
|
10000c58: e000e100 .word 0xe000e100
|
|
|
|
10000c5c <irq_set_mask_enabled>:
|
|
10000c5c: 2900 cmp r1, #0
|
|
10000c5e: d004 beq.n 10000c6a <irq_set_mask_enabled+0xe>
|
|
10000c60: 4b03 ldr r3, [pc, #12] @ (10000c70 <irq_set_mask_enabled+0x14>)
|
|
10000c62: 6018 str r0, [r3, #0]
|
|
10000c64: 4b03 ldr r3, [pc, #12] @ (10000c74 <irq_set_mask_enabled+0x18>)
|
|
10000c66: 6018 str r0, [r3, #0]
|
|
10000c68: 4770 bx lr
|
|
10000c6a: 4b03 ldr r3, [pc, #12] @ (10000c78 <irq_set_mask_enabled+0x1c>)
|
|
10000c6c: 6018 str r0, [r3, #0]
|
|
10000c6e: e7fb b.n 10000c68 <irq_set_mask_enabled+0xc>
|
|
10000c70: e000e280 .word 0xe000e280
|
|
10000c74: e000e100 .word 0xe000e100
|
|
10000c78: e000e180 .word 0xe000e180
|
|
|
|
10000c7c <irq_set_enabled>:
|
|
10000c7c: b510 push {r4, lr}
|
|
10000c7e: 2301 movs r3, #1
|
|
10000c80: 4083 lsls r3, r0
|
|
10000c82: 0018 movs r0, r3
|
|
10000c84: f7ff ffea bl 10000c5c <irq_set_mask_enabled>
|
|
10000c88: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10000c8c <irq_get_vtable_handler>:
|
|
10000c8c: 4b02 ldr r3, [pc, #8] @ (10000c98 <irq_get_vtable_handler+0xc>)
|
|
10000c8e: 689b ldr r3, [r3, #8]
|
|
10000c90: 3010 adds r0, #16
|
|
10000c92: 0080 lsls r0, r0, #2
|
|
10000c94: 58c0 ldr r0, [r0, r3]
|
|
10000c96: 4770 bx lr
|
|
10000c98: e000ed00 .word 0xe000ed00
|
|
|
|
10000c9c <irq_set_exclusive_handler>:
|
|
10000c9c: b570 push {r4, r5, r6, lr}
|
|
10000c9e: 0004 movs r4, r0
|
|
10000ca0: 000d movs r5, r1
|
|
10000ca2: f3ef 8610 mrs r6, PRIMASK
|
|
10000ca6: b672 cpsid i
|
|
10000ca8: 4b0c ldr r3, [pc, #48] @ (10000cdc <irq_set_exclusive_handler+0x40>)
|
|
10000caa: 681b ldr r3, [r3, #0]
|
|
10000cac: 2b00 cmp r3, #0
|
|
10000cae: d0fb beq.n 10000ca8 <irq_set_exclusive_handler+0xc>
|
|
10000cb0: f3bf 8f5f dmb sy
|
|
10000cb4: 0020 movs r0, r4
|
|
10000cb6: f7ff ffe9 bl 10000c8c <irq_get_vtable_handler>
|
|
10000cba: 4b09 ldr r3, [pc, #36] @ (10000ce0 <irq_set_exclusive_handler+0x44>)
|
|
10000cbc: 4298 cmp r0, r3
|
|
10000cbe: d001 beq.n 10000cc4 <irq_set_exclusive_handler+0x28>
|
|
10000cc0: 42a8 cmp r0, r5
|
|
10000cc2: d105 bne.n 10000cd0 <irq_set_exclusive_handler+0x34>
|
|
10000cc4: 0032 movs r2, r6
|
|
10000cc6: 0029 movs r1, r5
|
|
10000cc8: 0020 movs r0, r4
|
|
10000cca: f7ff ff4b bl 10000b64 <set_raw_irq_handler_and_unlock>
|
|
10000cce: bd70 pop {r4, r5, r6, pc}
|
|
10000cd0: 4b04 ldr r3, [pc, #16] @ (10000ce4 <irq_set_exclusive_handler+0x48>)
|
|
10000cd2: 4a05 ldr r2, [pc, #20] @ (10000ce8 <irq_set_exclusive_handler+0x4c>)
|
|
10000cd4: 4805 ldr r0, [pc, #20] @ (10000cec <irq_set_exclusive_handler+0x50>)
|
|
10000cd6: 2186 movs r1, #134 @ 0x86
|
|
10000cd8: f001 fb6e bl 100023b8 <__assert_func>
|
|
10000cdc: d0000124 .word 0xd0000124
|
|
10000ce0: 100001cd .word 0x100001cd
|
|
10000ce4: 10005a98 .word 0x10005a98
|
|
10000ce8: 10005bac .word 0x10005bac
|
|
10000cec: 10005a10 .word 0x10005a10
|
|
|
|
10000cf0 <irq_remove_handler>:
|
|
10000cf0: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000cf2: 46ce mov lr, r9
|
|
10000cf4: 4647 mov r7, r8
|
|
10000cf6: b580 push {r7, lr}
|
|
10000cf8: b083 sub sp, #12
|
|
10000cfa: 0006 movs r6, r0
|
|
10000cfc: 000d movs r5, r1
|
|
10000cfe: f3ef 8810 mrs r8, PRIMASK
|
|
10000d02: b672 cpsid i
|
|
10000d04: 4b4f ldr r3, [pc, #316] @ (10000e44 <irq_remove_handler+0x154>)
|
|
10000d06: 681b ldr r3, [r3, #0]
|
|
10000d08: 2b00 cmp r3, #0
|
|
10000d0a: d0fb beq.n 10000d04 <irq_remove_handler+0x14>
|
|
10000d0c: f3bf 8f5f dmb sy
|
|
10000d10: 4b4d ldr r3, [pc, #308] @ (10000e48 <irq_remove_handler+0x158>)
|
|
10000d12: 689a ldr r2, [r3, #8]
|
|
10000d14: 0034 movs r4, r6
|
|
10000d16: 3410 adds r4, #16
|
|
10000d18: 00a3 lsls r3, r4, #2
|
|
10000d1a: 58d7 ldr r7, [r2, r3]
|
|
10000d1c: 4b4b ldr r3, [pc, #300] @ (10000e4c <irq_remove_handler+0x15c>)
|
|
10000d1e: 429f cmp r7, r3
|
|
10000d20: d007 beq.n 10000d32 <irq_remove_handler+0x42>
|
|
10000d22: 42af cmp r7, r5
|
|
10000d24: d100 bne.n 10000d28 <irq_remove_handler+0x38>
|
|
10000d26: e08b b.n 10000e40 <irq_remove_handler+0x150>
|
|
10000d28: 9701 str r7, [sp, #4]
|
|
10000d2a: 4b49 ldr r3, [pc, #292] @ (10000e50 <irq_remove_handler+0x160>)
|
|
10000d2c: 1afb subs r3, r7, r3
|
|
10000d2e: 2b2f cmp r3, #47 @ 0x2f
|
|
10000d30: d909 bls.n 10000d46 <irq_remove_handler+0x56>
|
|
10000d32: 4642 mov r2, r8
|
|
10000d34: 0039 movs r1, r7
|
|
10000d36: 0030 movs r0, r6
|
|
10000d38: f7ff ff14 bl 10000b64 <set_raw_irq_handler_and_unlock>
|
|
10000d3c: b003 add sp, #12
|
|
10000d3e: bcc0 pop {r6, r7}
|
|
10000d40: 46b9 mov r9, r7
|
|
10000d42: 46b0 mov r8, r6
|
|
10000d44: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10000d46: 0030 movs r0, r6
|
|
10000d48: f7ff ff7c bl 10000c44 <irq_is_enabled>
|
|
10000d4c: 4681 mov r9, r0
|
|
10000d4e: 2100 movs r1, #0
|
|
10000d50: 0030 movs r0, r6
|
|
10000d52: f7ff ff93 bl 10000c7c <irq_set_enabled>
|
|
10000d56: f3bf 8f5f dmb sy
|
|
10000d5a: f3ef 8105 mrs r1, IPSR
|
|
10000d5e: 2900 cmp r1, #0
|
|
10000d60: d001 beq.n 10000d66 <irq_remove_handler+0x76>
|
|
10000d62: 428c cmp r4, r1
|
|
10000d64: d111 bne.n 10000d8a <irq_remove_handler+0x9a>
|
|
10000d66: 2301 movs r3, #1
|
|
10000d68: 9c01 ldr r4, [sp, #4]
|
|
10000d6a: 439c bics r4, r3
|
|
10000d6c: 2000 movs r0, #0
|
|
10000d6e: 68a3 ldr r3, [r4, #8]
|
|
10000d70: 42ab cmp r3, r5
|
|
10000d72: d012 beq.n 10000d9a <irq_remove_handler+0xaa>
|
|
10000d74: 2206 movs r2, #6
|
|
10000d76: 56a2 ldrsb r2, [r4, r2]
|
|
10000d78: 2a00 cmp r2, #0
|
|
10000d7a: db0d blt.n 10000d98 <irq_remove_handler+0xa8>
|
|
10000d7c: 0053 lsls r3, r2, #1
|
|
10000d7e: 189b adds r3, r3, r2
|
|
10000d80: 009b lsls r3, r3, #2
|
|
10000d82: 4a33 ldr r2, [pc, #204] @ (10000e50 <irq_remove_handler+0x160>)
|
|
10000d84: 0020 movs r0, r4
|
|
10000d86: 18d4 adds r4, r2, r3
|
|
10000d88: e7f1 b.n 10000d6e <irq_remove_handler+0x7e>
|
|
10000d8a: 4b32 ldr r3, [pc, #200] @ (10000e54 <irq_remove_handler+0x164>)
|
|
10000d8c: 4a32 ldr r2, [pc, #200] @ (10000e58 <irq_remove_handler+0x168>)
|
|
10000d8e: 2136 movs r1, #54 @ 0x36
|
|
10000d90: 4832 ldr r0, [pc, #200] @ (10000e5c <irq_remove_handler+0x16c>)
|
|
10000d92: 31ff adds r1, #255 @ 0xff
|
|
10000d94: f001 fb10 bl 100023b8 <__assert_func>
|
|
10000d98: 0020 movs r0, r4
|
|
10000d9a: 42ab cmp r3, r5
|
|
10000d9c: d149 bne.n 10000e32 <irq_remove_handler+0x142>
|
|
10000d9e: 2506 movs r5, #6
|
|
10000da0: 5765 ldrsb r5, [r4, r5]
|
|
10000da2: 2d00 cmp r5, #0
|
|
10000da4: db2b blt.n 10000dfe <irq_remove_handler+0x10e>
|
|
10000da6: 4b2a ldr r3, [pc, #168] @ (10000e50 <irq_remove_handler+0x160>)
|
|
10000da8: 006a lsls r2, r5, #1
|
|
10000daa: 1952 adds r2, r2, r5
|
|
10000dac: 0092 lsls r2, r2, #2
|
|
10000dae: 189b adds r3, r3, r2
|
|
10000db0: 689a ldr r2, [r3, #8]
|
|
10000db2: 60a2 str r2, [r4, #8]
|
|
10000db4: 79da ldrb r2, [r3, #7]
|
|
10000db6: 71e2 strb r2, [r4, #7]
|
|
10000db8: 799b ldrb r3, [r3, #6]
|
|
10000dba: b25b sxtb r3, r3
|
|
10000dbc: 71a3 strb r3, [r4, #6]
|
|
10000dbe: 2b00 cmp r3, #0
|
|
10000dc0: da0f bge.n 10000de2 <irq_remove_handler+0xf2>
|
|
10000dc2: 4827 ldr r0, [pc, #156] @ (10000e60 <irq_remove_handler+0x170>)
|
|
10000dc4: 80a0 strh r0, [r4, #4]
|
|
10000dc6: 4b22 ldr r3, [pc, #136] @ (10000e50 <irq_remove_handler+0x160>)
|
|
10000dc8: 006a lsls r2, r5, #1
|
|
10000dca: 1952 adds r2, r2, r5
|
|
10000dcc: 0092 lsls r2, r2, #2
|
|
10000dce: 189b adds r3, r3, r2
|
|
10000dd0: 4a24 ldr r2, [pc, #144] @ (10000e64 <irq_remove_handler+0x174>)
|
|
10000dd2: 7811 ldrb r1, [r2, #0]
|
|
10000dd4: 7199 strb r1, [r3, #6]
|
|
10000dd6: 7015 strb r5, [r2, #0]
|
|
10000dd8: 4649 mov r1, r9
|
|
10000dda: 0030 movs r0, r6
|
|
10000ddc: f7ff ff4e bl 10000c7c <irq_set_enabled>
|
|
10000de0: e7a7 b.n 10000d32 <irq_remove_handler+0x42>
|
|
10000de2: 0068 lsls r0, r5, #1
|
|
10000de4: 1940 adds r0, r0, r5
|
|
10000de6: 0080 lsls r0, r0, #2
|
|
10000de8: 4b19 ldr r3, [pc, #100] @ (10000e50 <irq_remove_handler+0x160>)
|
|
10000dea: 18c0 adds r0, r0, r3
|
|
10000dec: 3004 adds r0, #4
|
|
10000dee: f7ff fecd bl 10000b8c <resolve_branch>
|
|
10000df2: 0001 movs r1, r0
|
|
10000df4: 1d23 adds r3, r4, #4
|
|
10000df6: 0018 movs r0, r3
|
|
10000df8: f7ff fee0 bl 10000bbc <make_branch>
|
|
10000dfc: e7e2 b.n 10000dc4 <irq_remove_handler+0xd4>
|
|
10000dfe: 2900 cmp r1, #0
|
|
10000e00: d112 bne.n 10000e28 <irq_remove_handler+0x138>
|
|
10000e02: 2800 cmp r0, #0
|
|
10000e04: d00e beq.n 10000e24 <irq_remove_handler+0x134>
|
|
10000e06: 23ff movs r3, #255 @ 0xff
|
|
10000e08: 7183 strb r3, [r0, #6]
|
|
10000e0a: 4b17 ldr r3, [pc, #92] @ (10000e68 <irq_remove_handler+0x178>)
|
|
10000e0c: 8083 strh r3, [r0, #4]
|
|
10000e0e: 4915 ldr r1, [pc, #84] @ (10000e64 <irq_remove_handler+0x174>)
|
|
10000e10: 780b ldrb r3, [r1, #0]
|
|
10000e12: 71a3 strb r3, [r4, #6]
|
|
10000e14: 4a0e ldr r2, [pc, #56] @ (10000e50 <irq_remove_handler+0x160>)
|
|
10000e16: 4b15 ldr r3, [pc, #84] @ (10000e6c <irq_remove_handler+0x17c>)
|
|
10000e18: 1aa4 subs r4, r4, r2
|
|
10000e1a: 4164 adcs r4, r4
|
|
10000e1c: 4363 muls r3, r4
|
|
10000e1e: 0d1b lsrs r3, r3, #20
|
|
10000e20: 700b strb r3, [r1, #0]
|
|
10000e22: e7d9 b.n 10000dd8 <irq_remove_handler+0xe8>
|
|
10000e24: 4f09 ldr r7, [pc, #36] @ (10000e4c <irq_remove_handler+0x15c>)
|
|
10000e26: e7f2 b.n 10000e0e <irq_remove_handler+0x11e>
|
|
10000e28: 4911 ldr r1, [pc, #68] @ (10000e70 <irq_remove_handler+0x180>)
|
|
10000e2a: 1d20 adds r0, r4, #4
|
|
10000e2c: f7ff feea bl 10000c04 <insert_branch_and_link>
|
|
10000e30: e7d2 b.n 10000dd8 <irq_remove_handler+0xe8>
|
|
10000e32: 4b10 ldr r3, [pc, #64] @ (10000e74 <irq_remove_handler+0x184>)
|
|
10000e34: 4a08 ldr r2, [pc, #32] @ (10000e58 <irq_remove_handler+0x168>)
|
|
10000e36: 216a movs r1, #106 @ 0x6a
|
|
10000e38: 4808 ldr r0, [pc, #32] @ (10000e5c <irq_remove_handler+0x16c>)
|
|
10000e3a: 31ff adds r1, #255 @ 0xff
|
|
10000e3c: f001 fabc bl 100023b8 <__assert_func>
|
|
10000e40: 4f02 ldr r7, [pc, #8] @ (10000e4c <irq_remove_handler+0x15c>)
|
|
10000e42: e776 b.n 10000d32 <irq_remove_handler+0x42>
|
|
10000e44: d0000124 .word 0xd0000124
|
|
10000e48: e000ed00 .word 0xe000ed00
|
|
10000e4c: 100001cd .word 0x100001cd
|
|
10000e50: 2000023c .word 0x2000023c
|
|
10000e54: 10005ad0 .word 0x10005ad0
|
|
10000e58: 10005b7c .word 0x10005b7c
|
|
10000e5c: 10005a10 .word 0x10005a10
|
|
10000e60: 0000bd01 .word 0x0000bd01
|
|
10000e64: 20000daf .word 0x20000daf
|
|
10000e68: ffffbd01 .word 0xffffbd01
|
|
10000e6c: 0000aaaa .word 0x0000aaaa
|
|
10000e70: 20000276 .word 0x20000276
|
|
10000e74: 10005b04 .word 0x10005b04
|
|
|
|
10000e78 <irq_add_tail_to_free_list>:
|
|
10000e78: b570 push {r4, r5, r6, lr}
|
|
10000e7a: 2201 movs r2, #1
|
|
10000e7c: 4302 orrs r2, r0
|
|
10000e7e: 4b2e ldr r3, [pc, #184] @ (10000f38 <irq_add_tail_to_free_list+0xc0>)
|
|
10000e80: 1ad3 subs r3, r2, r3
|
|
10000e82: 2b2f cmp r3, #47 @ 0x2f
|
|
10000e84: d828 bhi.n 10000ed8 <irq_add_tail_to_free_list+0x60>
|
|
10000e86: f3ef 8305 mrs r3, IPSR
|
|
10000e8a: 2b00 cmp r3, #0
|
|
10000e8c: d02b beq.n 10000ee6 <irq_add_tail_to_free_list+0x6e>
|
|
10000e8e: f3ef 8c10 mrs ip, PRIMASK
|
|
10000e92: b672 cpsid i
|
|
10000e94: 4929 ldr r1, [pc, #164] @ (10000f3c <irq_add_tail_to_free_list+0xc4>)
|
|
10000e96: 6809 ldr r1, [r1, #0]
|
|
10000e98: 2900 cmp r1, #0
|
|
10000e9a: d0fb beq.n 10000e94 <irq_add_tail_to_free_list+0x1c>
|
|
10000e9c: f3bf 8f5f dmb sy
|
|
10000ea0: 4c25 ldr r4, [pc, #148] @ (10000f38 <irq_add_tail_to_free_list+0xc0>)
|
|
10000ea2: 4927 ldr r1, [pc, #156] @ (10000f40 <irq_add_tail_to_free_list+0xc8>)
|
|
10000ea4: 0005 movs r5, r0
|
|
10000ea6: 1b2d subs r5, r5, r4
|
|
10000ea8: 416d adcs r5, r5
|
|
10000eaa: 4369 muls r1, r5
|
|
10000eac: 0d09 lsrs r1, r1, #20
|
|
10000eae: b24c sxtb r4, r1
|
|
10000eb0: 4924 ldr r1, [pc, #144] @ (10000f44 <irq_add_tail_to_free_list+0xcc>)
|
|
10000eb2: 6889 ldr r1, [r1, #8]
|
|
10000eb4: 009b lsls r3, r3, #2
|
|
10000eb6: 58c9 ldr r1, [r1, r3]
|
|
10000eb8: 4291 cmp r1, r2
|
|
10000eba: d01b beq.n 10000ef4 <irq_add_tail_to_free_list+0x7c>
|
|
10000ebc: 2100 movs r1, #0
|
|
10000ebe: 2903 cmp r1, #3
|
|
10000ec0: d832 bhi.n 10000f28 <irq_add_tail_to_free_list+0xb0>
|
|
10000ec2: 4b1d ldr r3, [pc, #116] @ (10000f38 <irq_add_tail_to_free_list+0xc0>)
|
|
10000ec4: 004a lsls r2, r1, #1
|
|
10000ec6: 1852 adds r2, r2, r1
|
|
10000ec8: 0092 lsls r2, r2, #2
|
|
10000eca: 189b adds r3, r3, r2
|
|
10000ecc: 799b ldrb r3, [r3, #6]
|
|
10000ece: b25b sxtb r3, r3
|
|
10000ed0: 42a3 cmp r3, r4
|
|
10000ed2: d01f beq.n 10000f14 <irq_add_tail_to_free_list+0x9c>
|
|
10000ed4: 3101 adds r1, #1
|
|
10000ed6: e7f2 b.n 10000ebe <irq_add_tail_to_free_list+0x46>
|
|
10000ed8: 4b1b ldr r3, [pc, #108] @ (10000f48 <irq_add_tail_to_free_list+0xd0>)
|
|
10000eda: 4a1c ldr r2, [pc, #112] @ (10000f4c <irq_add_tail_to_free_list+0xd4>)
|
|
10000edc: 21c7 movs r1, #199 @ 0xc7
|
|
10000ede: 481c ldr r0, [pc, #112] @ (10000f50 <irq_add_tail_to_free_list+0xd8>)
|
|
10000ee0: 0049 lsls r1, r1, #1
|
|
10000ee2: f001 fa69 bl 100023b8 <__assert_func>
|
|
10000ee6: 4b1b ldr r3, [pc, #108] @ (10000f54 <irq_add_tail_to_free_list+0xdc>)
|
|
10000ee8: 4a18 ldr r2, [pc, #96] @ (10000f4c <irq_add_tail_to_free_list+0xd4>)
|
|
10000eea: 2192 movs r1, #146 @ 0x92
|
|
10000eec: 4818 ldr r0, [pc, #96] @ (10000f50 <irq_add_tail_to_free_list+0xd8>)
|
|
10000eee: 31ff adds r1, #255 @ 0xff
|
|
10000ef0: f001 fa62 bl 100023b8 <__assert_func>
|
|
10000ef4: 4a13 ldr r2, [pc, #76] @ (10000f44 <irq_add_tail_to_free_list+0xcc>)
|
|
10000ef6: 6892 ldr r2, [r2, #8]
|
|
10000ef8: 4917 ldr r1, [pc, #92] @ (10000f58 <irq_add_tail_to_free_list+0xe0>)
|
|
10000efa: 50d1 str r1, [r2, r3]
|
|
10000efc: 4b17 ldr r3, [pc, #92] @ (10000f5c <irq_add_tail_to_free_list+0xe4>)
|
|
10000efe: 781a ldrb r2, [r3, #0]
|
|
10000f00: 7182 strb r2, [r0, #6]
|
|
10000f02: 701c strb r4, [r3, #0]
|
|
10000f04: f3bf 8f5f dmb sy
|
|
10000f08: 4b0c ldr r3, [pc, #48] @ (10000f3c <irq_add_tail_to_free_list+0xc4>)
|
|
10000f0a: 2200 movs r2, #0
|
|
10000f0c: 601a str r2, [r3, #0]
|
|
10000f0e: f38c 8810 msr PRIMASK, ip
|
|
10000f12: bd70 pop {r4, r5, r6, pc}
|
|
10000f14: 4b08 ldr r3, [pc, #32] @ (10000f38 <irq_add_tail_to_free_list+0xc0>)
|
|
10000f16: 004a lsls r2, r1, #1
|
|
10000f18: 1855 adds r5, r2, r1
|
|
10000f1a: 00ad lsls r5, r5, #2
|
|
10000f1c: 195d adds r5, r3, r5
|
|
10000f1e: 26ff movs r6, #255 @ 0xff
|
|
10000f20: 71ae strb r6, [r5, #6]
|
|
10000f22: 4a0f ldr r2, [pc, #60] @ (10000f60 <irq_add_tail_to_free_list+0xe8>)
|
|
10000f24: 80aa strh r2, [r5, #4]
|
|
10000f26: e7e9 b.n 10000efc <irq_add_tail_to_free_list+0x84>
|
|
10000f28: 4b0e ldr r3, [pc, #56] @ (10000f64 <irq_add_tail_to_free_list+0xec>)
|
|
10000f2a: 4a08 ldr r2, [pc, #32] @ (10000f4c <irq_add_tail_to_free_list+0xd4>)
|
|
10000f2c: 21d1 movs r1, #209 @ 0xd1
|
|
10000f2e: 4808 ldr r0, [pc, #32] @ (10000f50 <irq_add_tail_to_free_list+0xd8>)
|
|
10000f30: 0049 lsls r1, r1, #1
|
|
10000f32: f001 fa41 bl 100023b8 <__assert_func>
|
|
10000f36: 46c0 nop @ (mov r8, r8)
|
|
10000f38: 2000023c .word 0x2000023c
|
|
10000f3c: d0000124 .word 0xd0000124
|
|
10000f40: 0000aaaa .word 0x0000aaaa
|
|
10000f44: e000ed00 .word 0xe000ed00
|
|
10000f48: 10005b0c .word 0x10005b0c
|
|
10000f4c: 10005b48 .word 0x10005b48
|
|
10000f50: 10005a10 .word 0x10005a10
|
|
10000f54: 10005b34 .word 0x10005b34
|
|
10000f58: 100001cd .word 0x100001cd
|
|
10000f5c: 20000daf .word 0x20000daf
|
|
10000f60: ffffbd01 .word 0xffffbd01
|
|
10000f64: 10005b40 .word 0x10005b40
|
|
|
|
10000f68 <irq_init_priorities>:
|
|
10000f68: 2200 movs r2, #0
|
|
10000f6a: 4b04 ldr r3, [pc, #16] @ (10000f7c <irq_init_priorities+0x14>)
|
|
10000f6c: e002 b.n 10000f74 <irq_init_priorities+0xc>
|
|
10000f6e: 4904 ldr r1, [pc, #16] @ (10000f80 <irq_init_priorities+0x18>)
|
|
10000f70: c302 stmia r3!, {r1}
|
|
10000f72: 3201 adds r2, #1
|
|
10000f74: 2a07 cmp r2, #7
|
|
10000f76: d9fa bls.n 10000f6e <irq_init_priorities+0x6>
|
|
10000f78: 4770 bx lr
|
|
10000f7a: 46c0 nop @ (mov r8, r8)
|
|
10000f7c: e000e400 .word 0xe000e400
|
|
10000f80: 80808080 .word 0x80808080
|
|
|
|
10000f84 <lock_init>:
|
|
10000f84: 4b02 ldr r3, [pc, #8] @ (10000f90 <lock_init+0xc>)
|
|
10000f86: 469c mov ip, r3
|
|
10000f88: 4461 add r1, ip
|
|
10000f8a: 0089 lsls r1, r1, #2
|
|
10000f8c: 6001 str r1, [r0, #0]
|
|
10000f8e: 4770 bx lr
|
|
10000f90: 34000040 .word 0x34000040
|
|
|
|
10000f94 <mutex_init>:
|
|
10000f94: b510 push {r4, lr}
|
|
10000f96: 0004 movs r4, r0
|
|
10000f98: f7ff fdd6 bl 10000b48 <next_striped_spin_lock_num>
|
|
10000f9c: 0001 movs r1, r0
|
|
10000f9e: 0020 movs r0, r4
|
|
10000fa0: f7ff fff0 bl 10000f84 <lock_init>
|
|
10000fa4: 23ff movs r3, #255 @ 0xff
|
|
10000fa6: 7123 strb r3, [r4, #4]
|
|
10000fa8: f3bf 8f5f dmb sy
|
|
10000fac: bd10 pop {r4, pc}
|
|
|
|
10000fae <recursive_mutex_init>:
|
|
10000fae: b510 push {r4, lr}
|
|
10000fb0: 0004 movs r4, r0
|
|
10000fb2: f7ff fdc9 bl 10000b48 <next_striped_spin_lock_num>
|
|
10000fb6: 0001 movs r1, r0
|
|
10000fb8: 0020 movs r0, r4
|
|
10000fba: f7ff ffe3 bl 10000f84 <lock_init>
|
|
10000fbe: 23ff movs r3, #255 @ 0xff
|
|
10000fc0: 7123 strb r3, [r4, #4]
|
|
10000fc2: 2300 movs r3, #0
|
|
10000fc4: 7163 strb r3, [r4, #5]
|
|
10000fc6: f3bf 8f5f dmb sy
|
|
10000fca: bd10 pop {r4, pc}
|
|
|
|
10000fcc <time_reached>:
|
|
10000fcc: 4b08 ldr r3, [pc, #32] @ (10000ff0 <time_reached+0x24>)
|
|
10000fce: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10000fd0: 4299 cmp r1, r3
|
|
10000fd2: d809 bhi.n 10000fe8 <time_reached+0x1c>
|
|
10000fd4: 4a06 ldr r2, [pc, #24] @ (10000ff0 <time_reached+0x24>)
|
|
10000fd6: 6a92 ldr r2, [r2, #40] @ 0x28
|
|
10000fd8: 4282 cmp r2, r0
|
|
10000fda: d207 bcs.n 10000fec <time_reached+0x20>
|
|
10000fdc: 4299 cmp r1, r3
|
|
10000fde: d001 beq.n 10000fe4 <time_reached+0x18>
|
|
10000fe0: 2001 movs r0, #1
|
|
10000fe2: e002 b.n 10000fea <time_reached+0x1e>
|
|
10000fe4: 2000 movs r0, #0
|
|
10000fe6: e000 b.n 10000fea <time_reached+0x1e>
|
|
10000fe8: 2000 movs r0, #0
|
|
10000fea: 4770 bx lr
|
|
10000fec: 2001 movs r0, #1
|
|
10000fee: e7fc b.n 10000fea <time_reached+0x1e>
|
|
10000ff0: 40054000 .word 0x40054000
|
|
|
|
10000ff4 <get_entry>:
|
|
10000ff4: b510 push {r4, lr}
|
|
10000ff6: 2900 cmp r1, #0
|
|
10000ff8: d00a beq.n 10001010 <get_entry+0x1c>
|
|
10000ffa: 6803 ldr r3, [r0, #0]
|
|
10000ffc: 7b1b ldrb r3, [r3, #12]
|
|
10000ffe: 428b cmp r3, r1
|
|
10001000: d306 bcc.n 10001010 <get_entry+0x1c>
|
|
10001002: 6880 ldr r0, [r0, #8]
|
|
10001004: 4b05 ldr r3, [pc, #20] @ (1000101c <get_entry+0x28>)
|
|
10001006: 469c mov ip, r3
|
|
10001008: 4461 add r1, ip
|
|
1000100a: 0109 lsls r1, r1, #4
|
|
1000100c: 1840 adds r0, r0, r1
|
|
1000100e: bd10 pop {r4, pc}
|
|
10001010: 4b03 ldr r3, [pc, #12] @ (10001020 <get_entry+0x2c>)
|
|
10001012: 4a04 ldr r2, [pc, #16] @ (10001024 <get_entry+0x30>)
|
|
10001014: 4804 ldr r0, [pc, #16] @ (10001028 <get_entry+0x34>)
|
|
10001016: 213c movs r1, #60 @ 0x3c
|
|
10001018: f001 f9ce bl 100023b8 <__assert_func>
|
|
1000101c: 0fffffff .word 0x0fffffff
|
|
10001020: 10005c84 .word 0x10005c84
|
|
10001024: 10005fbc .word 0x10005fbc
|
|
10001028: 10005ca8 .word 0x10005ca8
|
|
|
|
1000102c <timer_pool_entry_comparator>:
|
|
1000102c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
1000102e: 0004 movs r4, r0
|
|
10001030: 0017 movs r7, r2
|
|
10001032: f7ff ffdf bl 10000ff4 <get_entry>
|
|
10001036: 6806 ldr r6, [r0, #0]
|
|
10001038: 6845 ldr r5, [r0, #4]
|
|
1000103a: 0039 movs r1, r7
|
|
1000103c: 0020 movs r0, r4
|
|
1000103e: f7ff ffd9 bl 10000ff4 <get_entry>
|
|
10001042: 6802 ldr r2, [r0, #0]
|
|
10001044: 6843 ldr r3, [r0, #4]
|
|
10001046: 2001 movs r0, #1
|
|
10001048: 42ab cmp r3, r5
|
|
1000104a: d801 bhi.n 10001050 <timer_pool_entry_comparator+0x24>
|
|
1000104c: d002 beq.n 10001054 <timer_pool_entry_comparator+0x28>
|
|
1000104e: 2000 movs r0, #0
|
|
10001050: b2c0 uxtb r0, r0
|
|
10001052: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10001054: 42b2 cmp r2, r6
|
|
10001056: d8fb bhi.n 10001050 <timer_pool_entry_comparator+0x24>
|
|
10001058: e7f9 b.n 1000104e <timer_pool_entry_comparator+0x22>
|
|
...
|
|
|
|
1000105c <update_us_since_boot>:
|
|
1000105c: b510 push {r4, lr}
|
|
1000105e: 2b00 cmp r3, #0
|
|
10001060: db02 blt.n 10001068 <update_us_since_boot+0xc>
|
|
10001062: 6002 str r2, [r0, #0]
|
|
10001064: 6043 str r3, [r0, #4]
|
|
10001066: bd10 pop {r4, pc}
|
|
10001068: 4b02 ldr r3, [pc, #8] @ (10001074 <update_us_since_boot+0x18>)
|
|
1000106a: 4a03 ldr r2, [pc, #12] @ (10001078 <update_us_since_boot+0x1c>)
|
|
1000106c: 4803 ldr r0, [pc, #12] @ (1000107c <update_us_since_boot+0x20>)
|
|
1000106e: 213f movs r1, #63 @ 0x3f
|
|
10001070: f001 f9a2 bl 100023b8 <__assert_func>
|
|
10001074: 100058fc .word 0x100058fc
|
|
10001078: 10005f88 .word 0x10005f88
|
|
1000107c: 10005918 .word 0x10005918
|
|
|
|
10001080 <delayed_by_us>:
|
|
10001080: b510 push {r4, lr}
|
|
10001082: b082 sub sp, #8
|
|
10001084: 0004 movs r4, r0
|
|
10001086: 9804 ldr r0, [sp, #16]
|
|
10001088: 9905 ldr r1, [sp, #20]
|
|
1000108a: 1812 adds r2, r2, r0
|
|
1000108c: 414b adcs r3, r1
|
|
1000108e: 2b00 cmp r3, #0
|
|
10001090: db09 blt.n 100010a6 <delayed_by_us+0x26>
|
|
10001092: 4668 mov r0, sp
|
|
10001094: f7ff ffe2 bl 1000105c <update_us_since_boot>
|
|
10001098: 9a00 ldr r2, [sp, #0]
|
|
1000109a: 9b01 ldr r3, [sp, #4]
|
|
1000109c: 6022 str r2, [r4, #0]
|
|
1000109e: 6063 str r3, [r4, #4]
|
|
100010a0: 0020 movs r0, r4
|
|
100010a2: b002 add sp, #8
|
|
100010a4: bd10 pop {r4, pc}
|
|
100010a6: 2201 movs r2, #1
|
|
100010a8: 4252 negs r2, r2
|
|
100010aa: 4b01 ldr r3, [pc, #4] @ (100010b0 <delayed_by_us+0x30>)
|
|
100010ac: e7f1 b.n 10001092 <delayed_by_us+0x12>
|
|
100010ae: 46c0 nop @ (mov r8, r8)
|
|
100010b0: 7fffffff .word 0x7fffffff
|
|
|
|
100010b4 <ph_get_node>:
|
|
100010b4: b510 push {r4, lr}
|
|
100010b6: 2900 cmp r1, #0
|
|
100010b8: d008 beq.n 100010cc <ph_get_node+0x18>
|
|
100010ba: 7b03 ldrb r3, [r0, #12]
|
|
100010bc: 428b cmp r3, r1
|
|
100010be: d305 bcc.n 100010cc <ph_get_node+0x18>
|
|
100010c0: 6800 ldr r0, [r0, #0]
|
|
100010c2: 004b lsls r3, r1, #1
|
|
100010c4: 185b adds r3, r3, r1
|
|
100010c6: 3b03 subs r3, #3
|
|
100010c8: 18c0 adds r0, r0, r3
|
|
100010ca: bd10 pop {r4, pc}
|
|
100010cc: 4b02 ldr r3, [pc, #8] @ (100010d8 <ph_get_node+0x24>)
|
|
100010ce: 4a03 ldr r2, [pc, #12] @ (100010dc <ph_get_node+0x28>)
|
|
100010d0: 4803 ldr r0, [pc, #12] @ (100010e0 <ph_get_node+0x2c>)
|
|
100010d2: 2168 movs r1, #104 @ 0x68
|
|
100010d4: f001 f970 bl 100023b8 <__assert_func>
|
|
100010d8: 10005cec .word 0x10005cec
|
|
100010dc: 10005f64 .word 0x10005f64
|
|
100010e0: 10005d08 .word 0x10005d08
|
|
|
|
100010e4 <ph_contains_node>:
|
|
100010e4: b510 push {r4, lr}
|
|
100010e6: 7b43 ldrb r3, [r0, #13]
|
|
100010e8: 428b cmp r3, r1
|
|
100010ea: d101 bne.n 100010f0 <ph_contains_node+0xc>
|
|
100010ec: 2001 movs r0, #1
|
|
100010ee: bd10 pop {r4, pc}
|
|
100010f0: f7ff ffe0 bl 100010b4 <ph_get_node>
|
|
100010f4: 7883 ldrb r3, [r0, #2]
|
|
100010f6: 2b00 cmp r3, #0
|
|
100010f8: d101 bne.n 100010fe <ph_contains_node+0x1a>
|
|
100010fa: 2000 movs r0, #0
|
|
100010fc: e7f7 b.n 100010ee <ph_contains_node+0xa>
|
|
100010fe: 2001 movs r0, #1
|
|
10001100: e7f5 b.n 100010ee <ph_contains_node+0xa>
|
|
|
|
10001102 <ph_new_node>:
|
|
10001102: b570 push {r4, r5, r6, lr}
|
|
10001104: 0004 movs r4, r0
|
|
10001106: 7b85 ldrb r5, [r0, #14]
|
|
10001108: 2d00 cmp r5, #0
|
|
1000110a: d101 bne.n 10001110 <ph_new_node+0xe>
|
|
1000110c: 0028 movs r0, r5
|
|
1000110e: bd70 pop {r4, r5, r6, pc}
|
|
10001110: 0029 movs r1, r5
|
|
10001112: f7ff ffcf bl 100010b4 <ph_get_node>
|
|
10001116: 7843 ldrb r3, [r0, #1]
|
|
10001118: 73a3 strb r3, [r4, #14]
|
|
1000111a: 2b00 cmp r3, #0
|
|
1000111c: d100 bne.n 10001120 <ph_new_node+0x1e>
|
|
1000111e: 73e3 strb r3, [r4, #15]
|
|
10001120: 2300 movs r3, #0
|
|
10001122: 7083 strb r3, [r0, #2]
|
|
10001124: 7043 strb r3, [r0, #1]
|
|
10001126: 7003 strb r3, [r0, #0]
|
|
10001128: e7f0 b.n 1000110c <ph_new_node+0xa>
|
|
...
|
|
|
|
1000112c <ph_add_child_node>:
|
|
1000112c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
1000112e: 0006 movs r6, r0
|
|
10001130: 000c movs r4, r1
|
|
10001132: 0015 movs r5, r2
|
|
10001134: f7ff ffbe bl 100010b4 <ph_get_node>
|
|
10001138: 0007 movs r7, r0
|
|
1000113a: 2c00 cmp r4, #0
|
|
1000113c: d00d beq.n 1000115a <ph_add_child_node+0x2e>
|
|
1000113e: 2d00 cmp r5, #0
|
|
10001140: d011 beq.n 10001166 <ph_add_child_node+0x3a>
|
|
10001142: 42ac cmp r4, r5
|
|
10001144: d015 beq.n 10001172 <ph_add_child_node+0x46>
|
|
10001146: 0029 movs r1, r5
|
|
10001148: 0030 movs r0, r6
|
|
1000114a: f7ff ffb3 bl 100010b4 <ph_get_node>
|
|
1000114e: 7084 strb r4, [r0, #2]
|
|
10001150: 783b ldrb r3, [r7, #0]
|
|
10001152: 2b00 cmp r3, #0
|
|
10001154: d113 bne.n 1000117e <ph_add_child_node+0x52>
|
|
10001156: 703d strb r5, [r7, #0]
|
|
10001158: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
1000115a: 4b0a ldr r3, [pc, #40] @ (10001184 <ph_add_child_node+0x58>)
|
|
1000115c: 4a0a ldr r2, [pc, #40] @ (10001188 <ph_add_child_node+0x5c>)
|
|
1000115e: 480b ldr r0, [pc, #44] @ (1000118c <ph_add_child_node+0x60>)
|
|
10001160: 216f movs r1, #111 @ 0x6f
|
|
10001162: f001 f929 bl 100023b8 <__assert_func>
|
|
10001166: 4b0a ldr r3, [pc, #40] @ (10001190 <ph_add_child_node+0x64>)
|
|
10001168: 4a07 ldr r2, [pc, #28] @ (10001188 <ph_add_child_node+0x5c>)
|
|
1000116a: 4808 ldr r0, [pc, #32] @ (1000118c <ph_add_child_node+0x60>)
|
|
1000116c: 2170 movs r1, #112 @ 0x70
|
|
1000116e: f001 f923 bl 100023b8 <__assert_func>
|
|
10001172: 4b08 ldr r3, [pc, #32] @ (10001194 <ph_add_child_node+0x68>)
|
|
10001174: 4a04 ldr r2, [pc, #16] @ (10001188 <ph_add_child_node+0x5c>)
|
|
10001176: 4805 ldr r0, [pc, #20] @ (1000118c <ph_add_child_node+0x60>)
|
|
10001178: 2171 movs r1, #113 @ 0x71
|
|
1000117a: f001 f91d bl 100023b8 <__assert_func>
|
|
1000117e: 7043 strb r3, [r0, #1]
|
|
10001180: 703d strb r5, [r7, #0]
|
|
10001182: e7e9 b.n 10001158 <ph_add_child_node+0x2c>
|
|
10001184: 10005d5c .word 0x10005d5c
|
|
10001188: 10005f40 .word 0x10005f40
|
|
1000118c: 10005d08 .word 0x10005d08
|
|
10001190: 10005d68 .word 0x10005d68
|
|
10001194: 10005d74 .word 0x10005d74
|
|
|
|
10001198 <ph_merge_nodes>:
|
|
10001198: b570 push {r4, r5, r6, lr}
|
|
1000119a: 0006 movs r6, r0
|
|
1000119c: 000d movs r5, r1
|
|
1000119e: 0014 movs r4, r2
|
|
100011a0: 2900 cmp r1, #0
|
|
100011a2: d014 beq.n 100011ce <ph_merge_nodes+0x36>
|
|
100011a4: 2a00 cmp r2, #0
|
|
100011a6: d014 beq.n 100011d2 <ph_merge_nodes+0x3a>
|
|
100011a8: 6843 ldr r3, [r0, #4]
|
|
100011aa: 6880 ldr r0, [r0, #8]
|
|
100011ac: 4798 blx r3
|
|
100011ae: 2800 cmp r0, #0
|
|
100011b0: d006 beq.n 100011c0 <ph_merge_nodes+0x28>
|
|
100011b2: 0022 movs r2, r4
|
|
100011b4: 0029 movs r1, r5
|
|
100011b6: 0030 movs r0, r6
|
|
100011b8: f7ff ffb8 bl 1000112c <ph_add_child_node>
|
|
100011bc: 0028 movs r0, r5
|
|
100011be: e007 b.n 100011d0 <ph_merge_nodes+0x38>
|
|
100011c0: 002a movs r2, r5
|
|
100011c2: 0021 movs r1, r4
|
|
100011c4: 0030 movs r0, r6
|
|
100011c6: f7ff ffb1 bl 1000112c <ph_add_child_node>
|
|
100011ca: 0020 movs r0, r4
|
|
100011cc: e000 b.n 100011d0 <ph_merge_nodes+0x38>
|
|
100011ce: 0010 movs r0, r2
|
|
100011d0: bd70 pop {r4, r5, r6, pc}
|
|
100011d2: 0008 movs r0, r1
|
|
100011d4: e7fc b.n 100011d0 <ph_merge_nodes+0x38>
|
|
...
|
|
|
|
100011d8 <ph_insert_node>:
|
|
100011d8: b570 push {r4, r5, r6, lr}
|
|
100011da: 0004 movs r4, r0
|
|
100011dc: 1e0d subs r5, r1, #0
|
|
100011de: d00c beq.n 100011fa <ph_insert_node+0x22>
|
|
100011e0: f7ff ff68 bl 100010b4 <ph_get_node>
|
|
100011e4: 2300 movs r3, #0
|
|
100011e6: 7083 strb r3, [r0, #2]
|
|
100011e8: 7043 strb r3, [r0, #1]
|
|
100011ea: 7003 strb r3, [r0, #0]
|
|
100011ec: 7b61 ldrb r1, [r4, #13]
|
|
100011ee: 002a movs r2, r5
|
|
100011f0: 0020 movs r0, r4
|
|
100011f2: f7ff ffd1 bl 10001198 <ph_merge_nodes>
|
|
100011f6: 7360 strb r0, [r4, #13]
|
|
100011f8: bd70 pop {r4, r5, r6, pc}
|
|
100011fa: 4b03 ldr r3, [pc, #12] @ (10001208 <ph_insert_node+0x30>)
|
|
100011fc: 4a03 ldr r2, [pc, #12] @ (1000120c <ph_insert_node+0x34>)
|
|
100011fe: 4804 ldr r0, [pc, #16] @ (10001210 <ph_insert_node+0x38>)
|
|
10001200: 21a5 movs r1, #165 @ 0xa5
|
|
10001202: f001 f8d9 bl 100023b8 <__assert_func>
|
|
10001206: 46c0 nop @ (mov r8, r8)
|
|
10001208: 10005d8c .word 0x10005d8c
|
|
1000120c: 10005f54 .word 0x10005f54
|
|
10001210: 10005d08 .word 0x10005d08
|
|
|
|
10001214 <ph_free_node>:
|
|
10001214: b570 push {r4, r5, r6, lr}
|
|
10001216: 0004 movs r4, r0
|
|
10001218: 1e0d subs r5, r1, #0
|
|
1000121a: d00f beq.n 1000123c <ph_free_node+0x28>
|
|
1000121c: f7ff ff62 bl 100010e4 <ph_contains_node>
|
|
10001220: 2800 cmp r0, #0
|
|
10001222: d10b bne.n 1000123c <ph_free_node+0x28>
|
|
10001224: 7be1 ldrb r1, [r4, #15]
|
|
10001226: 2900 cmp r1, #0
|
|
10001228: d10e bne.n 10001248 <ph_free_node+0x34>
|
|
1000122a: 7ba3 ldrb r3, [r4, #14]
|
|
1000122c: 2b00 cmp r3, #0
|
|
1000122e: d103 bne.n 10001238 <ph_free_node+0x24>
|
|
10001230: 7be3 ldrb r3, [r4, #15]
|
|
10001232: 2b00 cmp r3, #0
|
|
10001234: d10d bne.n 10001252 <ph_free_node+0x3e>
|
|
10001236: 73a5 strb r5, [r4, #14]
|
|
10001238: 73e5 strb r5, [r4, #15]
|
|
1000123a: bd70 pop {r4, r5, r6, pc}
|
|
1000123c: 4b08 ldr r3, [pc, #32] @ (10001260 <ph_free_node+0x4c>)
|
|
1000123e: 4a09 ldr r2, [pc, #36] @ (10001264 <ph_free_node+0x50>)
|
|
10001240: 4809 ldr r0, [pc, #36] @ (10001268 <ph_free_node+0x54>)
|
|
10001242: 21f6 movs r1, #246 @ 0xf6
|
|
10001244: f001 f8b8 bl 100023b8 <__assert_func>
|
|
10001248: 0020 movs r0, r4
|
|
1000124a: f7ff ff33 bl 100010b4 <ph_get_node>
|
|
1000124e: 7045 strb r5, [r0, #1]
|
|
10001250: e7eb b.n 1000122a <ph_free_node+0x16>
|
|
10001252: 4b06 ldr r3, [pc, #24] @ (1000126c <ph_free_node+0x58>)
|
|
10001254: 4a03 ldr r2, [pc, #12] @ (10001264 <ph_free_node+0x50>)
|
|
10001256: 4804 ldr r0, [pc, #16] @ (10001268 <ph_free_node+0x54>)
|
|
10001258: 21fb movs r1, #251 @ 0xfb
|
|
1000125a: f001 f8ad bl 100023b8 <__assert_func>
|
|
1000125e: 46c0 nop @ (mov r8, r8)
|
|
10001260: 10005d90 .word 0x10005d90
|
|
10001264: 10005f30 .word 0x10005f30
|
|
10001268: 10005d08 .word 0x10005d08
|
|
1000126c: 10005db4 .word 0x10005db4
|
|
|
|
10001270 <get_entry_id_high>:
|
|
10001270: b510 push {r4, lr}
|
|
10001272: 2900 cmp r1, #0
|
|
10001274: d007 beq.n 10001286 <get_entry_id_high+0x16>
|
|
10001276: 6803 ldr r3, [r0, #0]
|
|
10001278: 7b1b ldrb r3, [r3, #12]
|
|
1000127a: 428b cmp r3, r1
|
|
1000127c: d303 bcc.n 10001286 <get_entry_id_high+0x16>
|
|
1000127e: 68c0 ldr r0, [r0, #12]
|
|
10001280: 3901 subs r1, #1
|
|
10001282: 1840 adds r0, r0, r1
|
|
10001284: bd10 pop {r4, pc}
|
|
10001286: 4b03 ldr r3, [pc, #12] @ (10001294 <get_entry_id_high+0x24>)
|
|
10001288: 4a03 ldr r2, [pc, #12] @ (10001298 <get_entry_id_high+0x28>)
|
|
1000128a: 4804 ldr r0, [pc, #16] @ (1000129c <get_entry_id_high+0x2c>)
|
|
1000128c: 2141 movs r1, #65 @ 0x41
|
|
1000128e: f001 f893 bl 100023b8 <__assert_func>
|
|
10001292: 46c0 nop @ (mov r8, r8)
|
|
10001294: 10005c84 .word 0x10005c84
|
|
10001298: 10005f1c .word 0x10005f1c
|
|
1000129c: 10005ca8 .word 0x10005ca8
|
|
|
|
100012a0 <alarm_pool_post_alloc_init>:
|
|
100012a0: b570 push {r4, r5, r6, lr}
|
|
100012a2: 0005 movs r5, r0
|
|
100012a4: 000c movs r4, r1
|
|
100012a6: 0008 movs r0, r1
|
|
100012a8: f000 fc92 bl 10001bd0 <hardware_alarm_cancel>
|
|
100012ac: 4909 ldr r1, [pc, #36] @ (100012d4 <alarm_pool_post_alloc_init+0x34>)
|
|
100012ae: 0020 movs r0, r4
|
|
100012b0: f000 fbd2 bl 10001a58 <hardware_alarm_set_callback>
|
|
100012b4: f7ff fc48 bl 10000b48 <next_striped_spin_lock_num>
|
|
100012b8: 4b07 ldr r3, [pc, #28] @ (100012d8 <alarm_pool_post_alloc_init+0x38>)
|
|
100012ba: 469c mov ip, r3
|
|
100012bc: 4460 add r0, ip
|
|
100012be: 0080 lsls r0, r0, #2
|
|
100012c0: 6068 str r0, [r5, #4]
|
|
100012c2: 752c strb r4, [r5, #20]
|
|
100012c4: 23d0 movs r3, #208 @ 0xd0
|
|
100012c6: 061b lsls r3, r3, #24
|
|
100012c8: 781b ldrb r3, [r3, #0]
|
|
100012ca: 756b strb r3, [r5, #21]
|
|
100012cc: 4b03 ldr r3, [pc, #12] @ (100012dc <alarm_pool_post_alloc_init+0x3c>)
|
|
100012ce: 00a4 lsls r4, r4, #2
|
|
100012d0: 50e5 str r5, [r4, r3]
|
|
100012d2: bd70 pop {r4, r5, r6, pc}
|
|
100012d4: 100013ed .word 0x100013ed
|
|
100012d8: 34000040 .word 0x34000040
|
|
100012dc: 20000b58 .word 0x20000b58
|
|
|
|
100012e0 <sleep_until_callback>:
|
|
100012e0: 4b0a ldr r3, [pc, #40] @ (1000130c <sleep_until_callback+0x2c>)
|
|
100012e2: 681a ldr r2, [r3, #0]
|
|
100012e4: f3ef 8110 mrs r1, PRIMASK
|
|
100012e8: b672 cpsid i
|
|
100012ea: 6813 ldr r3, [r2, #0]
|
|
100012ec: 2b00 cmp r3, #0
|
|
100012ee: d0fc beq.n 100012ea <sleep_until_callback+0xa>
|
|
100012f0: f3bf 8f5f dmb sy
|
|
100012f4: 4b05 ldr r3, [pc, #20] @ (1000130c <sleep_until_callback+0x2c>)
|
|
100012f6: 681b ldr r3, [r3, #0]
|
|
100012f8: f3bf 8f5f dmb sy
|
|
100012fc: 2200 movs r2, #0
|
|
100012fe: 601a str r2, [r3, #0]
|
|
10001300: f381 8810 msr PRIMASK, r1
|
|
10001304: bf40 sev
|
|
10001306: 2000 movs r0, #0
|
|
10001308: 2100 movs r1, #0
|
|
1000130a: 4770 bx lr
|
|
1000130c: 20000d6c .word 0x20000d6c
|
|
|
|
10001310 <get_absolute_time>:
|
|
10001310: b510 push {r4, lr}
|
|
10001312: b082 sub sp, #8
|
|
10001314: 0004 movs r4, r0
|
|
10001316: f000 fb7f bl 10001a18 <time_us_64>
|
|
1000131a: 0002 movs r2, r0
|
|
1000131c: 000b movs r3, r1
|
|
1000131e: 4668 mov r0, sp
|
|
10001320: f7ff fe9c bl 1000105c <update_us_since_boot>
|
|
10001324: 9a00 ldr r2, [sp, #0]
|
|
10001326: 9b01 ldr r3, [sp, #4]
|
|
10001328: 6022 str r2, [r4, #0]
|
|
1000132a: 6063 str r3, [r4, #4]
|
|
1000132c: 0020 movs r0, r4
|
|
1000132e: b002 add sp, #8
|
|
10001330: bd10 pop {r4, pc}
|
|
|
|
10001332 <make_timeout_time_us>:
|
|
10001332: b570 push {r4, r5, r6, lr}
|
|
10001334: b084 sub sp, #16
|
|
10001336: 0004 movs r4, r0
|
|
10001338: 0016 movs r6, r2
|
|
1000133a: 001d movs r5, r3
|
|
1000133c: a802 add r0, sp, #8
|
|
1000133e: f7ff ffe7 bl 10001310 <get_absolute_time>
|
|
10001342: 9a02 ldr r2, [sp, #8]
|
|
10001344: 9b03 ldr r3, [sp, #12]
|
|
10001346: 9600 str r6, [sp, #0]
|
|
10001348: 9501 str r5, [sp, #4]
|
|
1000134a: 0020 movs r0, r4
|
|
1000134c: f7ff fe98 bl 10001080 <delayed_by_us>
|
|
10001350: 0020 movs r0, r4
|
|
10001352: b004 add sp, #16
|
|
10001354: bd70 pop {r4, r5, r6, pc}
|
|
...
|
|
|
|
10001358 <add_alarm_under_lock>:
|
|
10001358: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000135a: b083 sub sp, #12
|
|
1000135c: 0007 movs r7, r0
|
|
1000135e: 9201 str r2, [sp, #4]
|
|
10001360: 001d movs r5, r3
|
|
10001362: ab0a add r3, sp, #40 @ 0x28
|
|
10001364: 781c ldrb r4, [r3, #0]
|
|
10001366: ab0b add r3, sp, #44 @ 0x2c
|
|
10001368: 781e ldrb r6, [r3, #0]
|
|
1000136a: 2c00 cmp r4, #0
|
|
1000136c: d00b beq.n 10001386 <add_alarm_under_lock+0x2e>
|
|
1000136e: 6800 ldr r0, [r0, #0]
|
|
10001370: 0021 movs r1, r4
|
|
10001372: f7ff feb7 bl 100010e4 <ph_contains_node>
|
|
10001376: 2800 cmp r0, #0
|
|
10001378: d009 beq.n 1000138e <add_alarm_under_lock+0x36>
|
|
1000137a: 4b19 ldr r3, [pc, #100] @ (100013e0 <add_alarm_under_lock+0x88>)
|
|
1000137c: 4a19 ldr r2, [pc, #100] @ (100013e4 <add_alarm_under_lock+0x8c>)
|
|
1000137e: 481a ldr r0, [pc, #104] @ (100013e8 <add_alarm_under_lock+0x90>)
|
|
10001380: 2167 movs r1, #103 @ 0x67
|
|
10001382: f001 f819 bl 100023b8 <__assert_func>
|
|
10001386: 6800 ldr r0, [r0, #0]
|
|
10001388: f7ff febb bl 10001102 <ph_new_node>
|
|
1000138c: 0004 movs r4, r0
|
|
1000138e: 2c00 cmp r4, #0
|
|
10001390: d102 bne.n 10001398 <add_alarm_under_lock+0x40>
|
|
10001392: 0020 movs r0, r4
|
|
10001394: b003 add sp, #12
|
|
10001396: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001398: 0021 movs r1, r4
|
|
1000139a: 0038 movs r0, r7
|
|
1000139c: f7ff fe2a bl 10000ff4 <get_entry>
|
|
100013a0: 9b01 ldr r3, [sp, #4]
|
|
100013a2: 6003 str r3, [r0, #0]
|
|
100013a4: 6045 str r5, [r0, #4]
|
|
100013a6: 9b08 ldr r3, [sp, #32]
|
|
100013a8: 6083 str r3, [r0, #8]
|
|
100013aa: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
100013ac: 60c3 str r3, [r0, #12]
|
|
100013ae: 6838 ldr r0, [r7, #0]
|
|
100013b0: 0021 movs r1, r4
|
|
100013b2: f7ff ff11 bl 100011d8 <ph_insert_node>
|
|
100013b6: 42a0 cmp r0, r4
|
|
100013b8: d1eb bne.n 10001392 <add_alarm_under_lock+0x3a>
|
|
100013ba: 7d38 ldrb r0, [r7, #20]
|
|
100013bc: 9a01 ldr r2, [sp, #4]
|
|
100013be: 002b movs r3, r5
|
|
100013c0: f000 fb92 bl 10001ae8 <hardware_alarm_set_target>
|
|
100013c4: 1e05 subs r5, r0, #0
|
|
100013c6: d001 beq.n 100013cc <add_alarm_under_lock+0x74>
|
|
100013c8: 2e00 cmp r6, #0
|
|
100013ca: d004 beq.n 100013d6 <add_alarm_under_lock+0x7e>
|
|
100013cc: 9b0c ldr r3, [sp, #48] @ 0x30
|
|
100013ce: 2b00 cmp r3, #0
|
|
100013d0: d0df beq.n 10001392 <add_alarm_under_lock+0x3a>
|
|
100013d2: 701d strb r5, [r3, #0]
|
|
100013d4: e7dd b.n 10001392 <add_alarm_under_lock+0x3a>
|
|
100013d6: 6838 ldr r0, [r7, #0]
|
|
100013d8: 0021 movs r1, r4
|
|
100013da: f000 fd3f bl 10001e5c <ph_remove_and_free_node>
|
|
100013de: e7f5 b.n 100013cc <add_alarm_under_lock+0x74>
|
|
100013e0: 10005dc8 .word 0x10005dc8
|
|
100013e4: 10005f70 .word 0x10005f70
|
|
100013e8: 10005ca8 .word 0x10005ca8
|
|
|
|
100013ec <alarm_pool_alarm_callback>:
|
|
100013ec: b5f0 push {r4, r5, r6, r7, lr}
|
|
100013ee: 46de mov lr, fp
|
|
100013f0: 4657 mov r7, sl
|
|
100013f2: 464e mov r6, r9
|
|
100013f4: 4645 mov r5, r8
|
|
100013f6: b5e0 push {r5, r6, r7, lr}
|
|
100013f8: b08f sub sp, #60 @ 0x3c
|
|
100013fa: 900b str r0, [sp, #44] @ 0x2c
|
|
100013fc: 2100 movs r1, #0
|
|
100013fe: 4b78 ldr r3, [pc, #480] @ (100015e0 <alarm_pool_alarm_callback+0x1f4>)
|
|
10001400: 0082 lsls r2, r0, #2
|
|
10001402: 58d4 ldr r4, [r2, r3]
|
|
10001404: 4689 mov r9, r1
|
|
10001406: e082 b.n 1000150e <alarm_pool_alarm_callback+0x122>
|
|
10001408: 0029 movs r1, r5
|
|
1000140a: 0020 movs r0, r4
|
|
1000140c: f7ff fdf2 bl 10000ff4 <get_entry>
|
|
10001410: 4680 mov r8, r0
|
|
10001412: 6802 ldr r2, [r0, #0]
|
|
10001414: 6843 ldr r3, [r0, #4]
|
|
10001416: 1b92 subs r2, r2, r6
|
|
10001418: 41bb sbcs r3, r7
|
|
1000141a: 2b00 cmp r3, #0
|
|
1000141c: dd09 ble.n 10001432 <alarm_pool_alarm_callback+0x46>
|
|
1000141e: 4643 mov r3, r8
|
|
10001420: 681a ldr r2, [r3, #0]
|
|
10001422: 685b ldr r3, [r3, #4]
|
|
10001424: 980b ldr r0, [sp, #44] @ 0x2c
|
|
10001426: f000 fb5f bl 10001ae8 <hardware_alarm_set_target>
|
|
1000142a: 2300 movs r3, #0
|
|
1000142c: 4698 mov r8, r3
|
|
1000142e: 2600 movs r6, #0
|
|
10001430: e089 b.n 10001546 <alarm_pool_alarm_callback+0x15a>
|
|
10001432: 2b00 cmp r3, #0
|
|
10001434: d101 bne.n 1000143a <alarm_pool_alarm_callback+0x4e>
|
|
10001436: 2a00 cmp r2, #0
|
|
10001438: d1f1 bne.n 1000141e <alarm_pool_alarm_callback+0x32>
|
|
1000143a: 2100 movs r1, #0
|
|
1000143c: 4658 mov r0, fp
|
|
1000143e: f000 fd03 bl 10001e48 <ph_remove_head>
|
|
10001442: 0007 movs r7, r0
|
|
10001444: 42a8 cmp r0, r5
|
|
10001446: d115 bne.n 10001474 <alarm_pool_alarm_callback+0x88>
|
|
10001448: 4643 mov r3, r8
|
|
1000144a: 681a ldr r2, [r3, #0]
|
|
1000144c: 685b ldr r3, [r3, #4]
|
|
1000144e: 9208 str r2, [sp, #32]
|
|
10001450: 9309 str r3, [sp, #36] @ 0x24
|
|
10001452: 4643 mov r3, r8
|
|
10001454: 689e ldr r6, [r3, #8]
|
|
10001456: 68db ldr r3, [r3, #12]
|
|
10001458: 4698 mov r8, r3
|
|
1000145a: 2e00 cmp r6, #0
|
|
1000145c: d010 beq.n 10001480 <alarm_pool_alarm_callback+0x94>
|
|
1000145e: 0029 movs r1, r5
|
|
10001460: 0020 movs r0, r4
|
|
10001462: f7ff ff05 bl 10001270 <get_entry_id_high>
|
|
10001466: 7803 ldrb r3, [r0, #0]
|
|
10001468: 4699 mov r9, r3
|
|
1000146a: 021b lsls r3, r3, #8
|
|
1000146c: 431f orrs r7, r3
|
|
1000146e: 6127 str r7, [r4, #16]
|
|
10001470: 2000 movs r0, #0
|
|
10001472: e068 b.n 10001546 <alarm_pool_alarm_callback+0x15a>
|
|
10001474: 4b5b ldr r3, [pc, #364] @ (100015e4 <alarm_pool_alarm_callback+0x1f8>)
|
|
10001476: 4a5c ldr r2, [pc, #368] @ (100015e8 <alarm_pool_alarm_callback+0x1fc>)
|
|
10001478: 485c ldr r0, [pc, #368] @ (100015ec <alarm_pool_alarm_callback+0x200>)
|
|
1000147a: 218e movs r1, #142 @ 0x8e
|
|
1000147c: f000 ff9c bl 100023b8 <__assert_func>
|
|
10001480: 4b5b ldr r3, [pc, #364] @ (100015f0 <alarm_pool_alarm_callback+0x204>)
|
|
10001482: 4a59 ldr r2, [pc, #356] @ (100015e8 <alarm_pool_alarm_callback+0x1fc>)
|
|
10001484: 4859 ldr r0, [pc, #356] @ (100015ec <alarm_pool_alarm_callback+0x200>)
|
|
10001486: 2192 movs r1, #146 @ 0x92
|
|
10001488: f000 ff96 bl 100023b8 <__assert_func>
|
|
1000148c: 6923 ldr r3, [r4, #16]
|
|
1000148e: 2b00 cmp r3, #0
|
|
10001490: d077 beq.n 10001582 <alarm_pool_alarm_callback+0x196>
|
|
10001492: 42bb cmp r3, r7
|
|
10001494: d119 bne.n 100014ca <alarm_pool_alarm_callback+0xde>
|
|
10001496: 9806 ldr r0, [sp, #24]
|
|
10001498: 9907 ldr r1, [sp, #28]
|
|
1000149a: 2300 movs r3, #0
|
|
1000149c: 4242 negs r2, r0
|
|
1000149e: 418b sbcs r3, r1
|
|
100014a0: 9200 str r2, [sp, #0]
|
|
100014a2: 9301 str r3, [sp, #4]
|
|
100014a4: 9a08 ldr r2, [sp, #32]
|
|
100014a6: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
100014a8: a80c add r0, sp, #48 @ 0x30
|
|
100014aa: f7ff fde9 bl 10001080 <delayed_by_us>
|
|
100014ae: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
100014b0: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
100014b2: 2100 movs r1, #0
|
|
100014b4: 9104 str r1, [sp, #16]
|
|
100014b6: 3101 adds r1, #1
|
|
100014b8: 9103 str r1, [sp, #12]
|
|
100014ba: 9502 str r5, [sp, #8]
|
|
100014bc: 4641 mov r1, r8
|
|
100014be: 9101 str r1, [sp, #4]
|
|
100014c0: 9600 str r6, [sp, #0]
|
|
100014c2: 0020 movs r0, r4
|
|
100014c4: f7ff ff48 bl 10001358 <add_alarm_under_lock>
|
|
100014c8: e016 b.n 100014f8 <alarm_pool_alarm_callback+0x10c>
|
|
100014ca: 4b4a ldr r3, [pc, #296] @ (100015f4 <alarm_pool_alarm_callback+0x208>)
|
|
100014cc: 4a46 ldr r2, [pc, #280] @ (100015e8 <alarm_pool_alarm_callback+0x1fc>)
|
|
100014ce: 4847 ldr r0, [pc, #284] @ (100015ec <alarm_pool_alarm_callback+0x200>)
|
|
100014d0: 21a1 movs r1, #161 @ 0xa1
|
|
100014d2: f000 ff71 bl 100023b8 <__assert_func>
|
|
100014d6: 9a06 ldr r2, [sp, #24]
|
|
100014d8: 9b07 ldr r3, [sp, #28]
|
|
100014da: 2b00 cmp r3, #0
|
|
100014dc: d101 bne.n 100014e2 <alarm_pool_alarm_callback+0xf6>
|
|
100014de: 2a00 cmp r2, #0
|
|
100014e0: d152 bne.n 10001588 <alarm_pool_alarm_callback+0x19c>
|
|
100014e2: 6820 ldr r0, [r4, #0]
|
|
100014e4: 0029 movs r1, r5
|
|
100014e6: f7ff fe95 bl 10001214 <ph_free_node>
|
|
100014ea: 0029 movs r1, r5
|
|
100014ec: 0020 movs r0, r4
|
|
100014ee: f7ff febf bl 10001270 <get_entry_id_high>
|
|
100014f2: 7803 ldrb r3, [r0, #0]
|
|
100014f4: 3301 adds r3, #1
|
|
100014f6: 7003 strb r3, [r0, #0]
|
|
100014f8: 2300 movs r3, #0
|
|
100014fa: 6123 str r3, [r4, #16]
|
|
100014fc: 6862 ldr r2, [r4, #4]
|
|
100014fe: f3bf 8f5f dmb sy
|
|
10001502: 6013 str r3, [r2, #0]
|
|
10001504: f38a 8810 msr PRIMASK, sl
|
|
10001508: 2001 movs r0, #1
|
|
1000150a: 2800 cmp r0, #0
|
|
1000150c: d061 beq.n 100015d2 <alarm_pool_alarm_callback+0x1e6>
|
|
1000150e: a80c add r0, sp, #48 @ 0x30
|
|
10001510: f7ff fefe bl 10001310 <get_absolute_time>
|
|
10001514: 9e0c ldr r6, [sp, #48] @ 0x30
|
|
10001516: 9f0d ldr r7, [sp, #52] @ 0x34
|
|
10001518: 2200 movs r2, #0
|
|
1000151a: 2300 movs r3, #0
|
|
1000151c: 9208 str r2, [sp, #32]
|
|
1000151e: 9309 str r3, [sp, #36] @ 0x24
|
|
10001520: 6862 ldr r2, [r4, #4]
|
|
10001522: f3ef 8a10 mrs sl, PRIMASK
|
|
10001526: b672 cpsid i
|
|
10001528: 6813 ldr r3, [r2, #0]
|
|
1000152a: 2b00 cmp r3, #0
|
|
1000152c: d0fc beq.n 10001528 <alarm_pool_alarm_callback+0x13c>
|
|
1000152e: f3bf 8f5f dmb sy
|
|
10001532: 6823 ldr r3, [r4, #0]
|
|
10001534: 469b mov fp, r3
|
|
10001536: 7b5d ldrb r5, [r3, #13]
|
|
10001538: 2d00 cmp r5, #0
|
|
1000153a: d000 beq.n 1000153e <alarm_pool_alarm_callback+0x152>
|
|
1000153c: e764 b.n 10001408 <alarm_pool_alarm_callback+0x1c>
|
|
1000153e: 2300 movs r3, #0
|
|
10001540: 4698 mov r8, r3
|
|
10001542: 2600 movs r6, #0
|
|
10001544: 2000 movs r0, #0
|
|
10001546: 6863 ldr r3, [r4, #4]
|
|
10001548: f3bf 8f5f dmb sy
|
|
1000154c: 2200 movs r2, #0
|
|
1000154e: 601a str r2, [r3, #0]
|
|
10001550: f38a 8810 msr PRIMASK, sl
|
|
10001554: 2e00 cmp r6, #0
|
|
10001556: d0d8 beq.n 1000150a <alarm_pool_alarm_callback+0x11e>
|
|
10001558: 464b mov r3, r9
|
|
1000155a: 021f lsls r7, r3, #8
|
|
1000155c: 432f orrs r7, r5
|
|
1000155e: 4641 mov r1, r8
|
|
10001560: 0038 movs r0, r7
|
|
10001562: 47b0 blx r6
|
|
10001564: 9006 str r0, [sp, #24]
|
|
10001566: 9107 str r1, [sp, #28]
|
|
10001568: 6862 ldr r2, [r4, #4]
|
|
1000156a: f3ef 8a10 mrs sl, PRIMASK
|
|
1000156e: b672 cpsid i
|
|
10001570: 6813 ldr r3, [r2, #0]
|
|
10001572: 2b00 cmp r3, #0
|
|
10001574: d0fc beq.n 10001570 <alarm_pool_alarm_callback+0x184>
|
|
10001576: f3bf 8f5f dmb sy
|
|
1000157a: 9b07 ldr r3, [sp, #28]
|
|
1000157c: 2b00 cmp r3, #0
|
|
1000157e: da00 bge.n 10001582 <alarm_pool_alarm_callback+0x196>
|
|
10001580: e784 b.n 1000148c <alarm_pool_alarm_callback+0xa0>
|
|
10001582: 9b07 ldr r3, [sp, #28]
|
|
10001584: 2b00 cmp r3, #0
|
|
10001586: dda6 ble.n 100014d6 <alarm_pool_alarm_callback+0xea>
|
|
10001588: 6923 ldr r3, [r4, #16]
|
|
1000158a: 2b00 cmp r3, #0
|
|
1000158c: d0a9 beq.n 100014e2 <alarm_pool_alarm_callback+0xf6>
|
|
1000158e: 42bb cmp r3, r7
|
|
10001590: d119 bne.n 100015c6 <alarm_pool_alarm_callback+0x1da>
|
|
10001592: a80c add r0, sp, #48 @ 0x30
|
|
10001594: f7ff febc bl 10001310 <get_absolute_time>
|
|
10001598: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
1000159a: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000159c: 9806 ldr r0, [sp, #24]
|
|
1000159e: 9907 ldr r1, [sp, #28]
|
|
100015a0: 9000 str r0, [sp, #0]
|
|
100015a2: 9101 str r1, [sp, #4]
|
|
100015a4: a80c add r0, sp, #48 @ 0x30
|
|
100015a6: f7ff fd6b bl 10001080 <delayed_by_us>
|
|
100015aa: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
100015ac: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
100015ae: 2100 movs r1, #0
|
|
100015b0: 9104 str r1, [sp, #16]
|
|
100015b2: 3101 adds r1, #1
|
|
100015b4: 9103 str r1, [sp, #12]
|
|
100015b6: 9502 str r5, [sp, #8]
|
|
100015b8: 4641 mov r1, r8
|
|
100015ba: 9101 str r1, [sp, #4]
|
|
100015bc: 9600 str r6, [sp, #0]
|
|
100015be: 0020 movs r0, r4
|
|
100015c0: f7ff feca bl 10001358 <add_alarm_under_lock>
|
|
100015c4: e798 b.n 100014f8 <alarm_pool_alarm_callback+0x10c>
|
|
100015c6: 4b0b ldr r3, [pc, #44] @ (100015f4 <alarm_pool_alarm_callback+0x208>)
|
|
100015c8: 4a07 ldr r2, [pc, #28] @ (100015e8 <alarm_pool_alarm_callback+0x1fc>)
|
|
100015ca: 4808 ldr r0, [pc, #32] @ (100015ec <alarm_pool_alarm_callback+0x200>)
|
|
100015cc: 21a4 movs r1, #164 @ 0xa4
|
|
100015ce: f000 fef3 bl 100023b8 <__assert_func>
|
|
100015d2: b00f add sp, #60 @ 0x3c
|
|
100015d4: bcf0 pop {r4, r5, r6, r7}
|
|
100015d6: 46bb mov fp, r7
|
|
100015d8: 46b2 mov sl, r6
|
|
100015da: 46a9 mov r9, r5
|
|
100015dc: 46a0 mov r8, r4
|
|
100015de: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100015e0: 20000b58 .word 0x20000b58
|
|
100015e4: 10005df0 .word 0x10005df0
|
|
100015e8: 10005fa0 .word 0x10005fa0
|
|
100015ec: 10005ca8 .word 0x10005ca8
|
|
100015f0: 10005e08 .word 0x10005e08
|
|
100015f4: 10005e14 .word 0x10005e14
|
|
|
|
100015f8 <alarm_pool_init_default>:
|
|
100015f8: b510 push {r4, lr}
|
|
100015fa: 4b0c ldr r3, [pc, #48] @ (1000162c <alarm_pool_init_default+0x34>)
|
|
100015fc: 685b ldr r3, [r3, #4]
|
|
100015fe: 2b00 cmp r3, #0
|
|
10001600: d004 beq.n 1000160c <alarm_pool_init_default+0x14>
|
|
10001602: 480b ldr r0, [pc, #44] @ (10001630 <alarm_pool_init_default+0x38>)
|
|
10001604: 210a movs r1, #10
|
|
10001606: f7ff fcbd bl 10000f84 <lock_init>
|
|
1000160a: bd10 pop {r4, pc}
|
|
1000160c: 4c07 ldr r4, [pc, #28] @ (1000162c <alarm_pool_init_default+0x34>)
|
|
1000160e: 4a09 ldr r2, [pc, #36] @ (10001634 <alarm_pool_init_default+0x3c>)
|
|
10001610: 6820 ldr r0, [r4, #0]
|
|
10001612: 0023 movs r3, r4
|
|
10001614: 2110 movs r1, #16
|
|
10001616: f000 fb82 bl 10001d1e <ph_post_alloc_init>
|
|
1000161a: 2003 movs r0, #3
|
|
1000161c: f000 f9f0 bl 10001a00 <hardware_alarm_claim>
|
|
10001620: 2103 movs r1, #3
|
|
10001622: 0020 movs r0, r4
|
|
10001624: f7ff fe3c bl 100012a0 <alarm_pool_post_alloc_init>
|
|
10001628: e7eb b.n 10001602 <alarm_pool_init_default+0xa>
|
|
1000162a: 46c0 nop @ (mov r8, r8)
|
|
1000162c: 20000284 .word 0x20000284
|
|
10001630: 20000d6c .word 0x20000d6c
|
|
10001634: 1000102d .word 0x1000102d
|
|
|
|
10001638 <alarm_pool_get_default>:
|
|
10001638: b510 push {r4, lr}
|
|
1000163a: 4b06 ldr r3, [pc, #24] @ (10001654 <alarm_pool_get_default+0x1c>)
|
|
1000163c: 685b ldr r3, [r3, #4]
|
|
1000163e: 2b00 cmp r3, #0
|
|
10001640: d001 beq.n 10001646 <alarm_pool_get_default+0xe>
|
|
10001642: 4804 ldr r0, [pc, #16] @ (10001654 <alarm_pool_get_default+0x1c>)
|
|
10001644: bd10 pop {r4, pc}
|
|
10001646: 4b04 ldr r3, [pc, #16] @ (10001658 <alarm_pool_get_default+0x20>)
|
|
10001648: 4a04 ldr r2, [pc, #16] @ (1000165c <alarm_pool_get_default+0x24>)
|
|
1000164a: 4805 ldr r0, [pc, #20] @ (10001660 <alarm_pool_get_default+0x28>)
|
|
1000164c: 215e movs r1, #94 @ 0x5e
|
|
1000164e: f000 feb3 bl 100023b8 <__assert_func>
|
|
10001652: 46c0 nop @ (mov r8, r8)
|
|
10001654: 20000284 .word 0x20000284
|
|
10001658: 10005e50 .word 0x10005e50
|
|
1000165c: 10005f04 .word 0x10005f04
|
|
10001660: 10005ca8 .word 0x10005ca8
|
|
|
|
10001664 <alarm_pool_add_alarm_at>:
|
|
10001664: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001666: 46de mov lr, fp
|
|
10001668: 4657 mov r7, sl
|
|
1000166a: 464e mov r6, r9
|
|
1000166c: 4645 mov r5, r8
|
|
1000166e: b5e0 push {r5, r6, r7, lr}
|
|
10001670: b08d sub sp, #52 @ 0x34
|
|
10001672: 0006 movs r6, r0
|
|
10001674: 4690 mov r8, r2
|
|
10001676: 001f movs r7, r3
|
|
10001678: 9b16 ldr r3, [sp, #88] @ 0x58
|
|
1000167a: 469a mov sl, r3
|
|
1000167c: 9b17 ldr r3, [sp, #92] @ 0x5c
|
|
1000167e: 4699 mov r9, r3
|
|
10001680: ab18 add r3, sp, #96 @ 0x60
|
|
10001682: 781b ldrb r3, [r3, #0]
|
|
10001684: 9307 str r3, [sp, #28]
|
|
10001686: 2327 movs r3, #39 @ 0x27
|
|
10001688: aa02 add r2, sp, #8
|
|
1000168a: 4694 mov ip, r2
|
|
1000168c: 4463 add r3, ip
|
|
1000168e: 2200 movs r2, #0
|
|
10001690: 701a strb r2, [r3, #0]
|
|
10001692: e021 b.n 100016d8 <alarm_pool_add_alarm_at+0x74>
|
|
10001694: 0001 movs r1, r0
|
|
10001696: 0030 movs r0, r6
|
|
10001698: f7ff fdea bl 10001270 <get_entry_id_high>
|
|
1000169c: 7800 ldrb r0, [r0, #0]
|
|
1000169e: e03c b.n 1000171a <alarm_pool_add_alarm_at+0xb6>
|
|
100016a0: 9806 ldr r0, [sp, #24]
|
|
100016a2: 2b00 cmp r3, #0
|
|
100016a4: d05c beq.n 10001760 <alarm_pool_add_alarm_at+0xfc>
|
|
100016a6: 9b07 ldr r3, [sp, #28]
|
|
100016a8: 2b00 cmp r3, #0
|
|
100016aa: d059 beq.n 10001760 <alarm_pool_add_alarm_at+0xfc>
|
|
100016ac: 4649 mov r1, r9
|
|
100016ae: 47d0 blx sl
|
|
100016b0: 0004 movs r4, r0
|
|
100016b2: 000d movs r5, r1
|
|
100016b4: 0003 movs r3, r0
|
|
100016b6: 430b orrs r3, r1
|
|
100016b8: d059 beq.n 1000176e <alarm_pool_add_alarm_at+0x10a>
|
|
100016ba: 2900 cmp r1, #0
|
|
100016bc: db40 blt.n 10001740 <alarm_pool_add_alarm_at+0xdc>
|
|
100016be: a808 add r0, sp, #32
|
|
100016c0: f7ff fe26 bl 10001310 <get_absolute_time>
|
|
100016c4: 9a08 ldr r2, [sp, #32]
|
|
100016c6: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
100016c8: 9400 str r4, [sp, #0]
|
|
100016ca: 9501 str r5, [sp, #4]
|
|
100016cc: a808 add r0, sp, #32
|
|
100016ce: f7ff fcd7 bl 10001080 <delayed_by_us>
|
|
100016d2: 9b08 ldr r3, [sp, #32]
|
|
100016d4: 4698 mov r8, r3
|
|
100016d6: 9f09 ldr r7, [sp, #36] @ 0x24
|
|
100016d8: 6872 ldr r2, [r6, #4]
|
|
100016da: f3ef 8b10 mrs fp, PRIMASK
|
|
100016de: b672 cpsid i
|
|
100016e0: 6813 ldr r3, [r2, #0]
|
|
100016e2: 4259 negs r1, r3
|
|
100016e4: 414b adcs r3, r1
|
|
100016e6: b2d9 uxtb r1, r3
|
|
100016e8: 9106 str r1, [sp, #24]
|
|
100016ea: 2b00 cmp r3, #0
|
|
100016ec: d1f8 bne.n 100016e0 <alarm_pool_add_alarm_at+0x7c>
|
|
100016ee: f3bf 8f5f dmb sy
|
|
100016f2: 3327 adds r3, #39 @ 0x27
|
|
100016f4: aa02 add r2, sp, #8
|
|
100016f6: 4694 mov ip, r2
|
|
100016f8: 4463 add r3, ip
|
|
100016fa: 9304 str r3, [sp, #16]
|
|
100016fc: 2300 movs r3, #0
|
|
100016fe: 9303 str r3, [sp, #12]
|
|
10001700: 9302 str r3, [sp, #8]
|
|
10001702: 464b mov r3, r9
|
|
10001704: 9301 str r3, [sp, #4]
|
|
10001706: 4653 mov r3, sl
|
|
10001708: 9300 str r3, [sp, #0]
|
|
1000170a: 4642 mov r2, r8
|
|
1000170c: 003b movs r3, r7
|
|
1000170e: 0030 movs r0, r6
|
|
10001710: f7ff fe22 bl 10001358 <add_alarm_under_lock>
|
|
10001714: 0004 movs r4, r0
|
|
10001716: 1e05 subs r5, r0, #0
|
|
10001718: d1bc bne.n 10001694 <alarm_pool_add_alarm_at+0x30>
|
|
1000171a: 6873 ldr r3, [r6, #4]
|
|
1000171c: f3bf 8f5f dmb sy
|
|
10001720: 2100 movs r1, #0
|
|
10001722: 6019 str r1, [r3, #0]
|
|
10001724: f38b 8810 msr PRIMASK, fp
|
|
10001728: 2d00 cmp r5, #0
|
|
1000172a: d017 beq.n 1000175c <alarm_pool_add_alarm_at+0xf8>
|
|
1000172c: 2327 movs r3, #39 @ 0x27
|
|
1000172e: aa02 add r2, sp, #8
|
|
10001730: 4694 mov ip, r2
|
|
10001732: 4463 add r3, ip
|
|
10001734: 781b ldrb r3, [r3, #0]
|
|
10001736: 2b00 cmp r3, #0
|
|
10001738: d1b2 bne.n 100016a0 <alarm_pool_add_alarm_at+0x3c>
|
|
1000173a: 0200 lsls r0, r0, #8
|
|
1000173c: 4320 orrs r0, r4
|
|
1000173e: e7b0 b.n 100016a2 <alarm_pool_add_alarm_at+0x3e>
|
|
10001740: 2300 movs r3, #0
|
|
10001742: 4262 negs r2, r4
|
|
10001744: 41ab sbcs r3, r5
|
|
10001746: 9200 str r2, [sp, #0]
|
|
10001748: 9301 str r3, [sp, #4]
|
|
1000174a: 4642 mov r2, r8
|
|
1000174c: 003b movs r3, r7
|
|
1000174e: a808 add r0, sp, #32
|
|
10001750: f7ff fc96 bl 10001080 <delayed_by_us>
|
|
10001754: 9b08 ldr r3, [sp, #32]
|
|
10001756: 4698 mov r8, r3
|
|
10001758: 9f09 ldr r7, [sp, #36] @ 0x24
|
|
1000175a: e7bd b.n 100016d8 <alarm_pool_add_alarm_at+0x74>
|
|
1000175c: 2001 movs r0, #1
|
|
1000175e: 4240 negs r0, r0
|
|
10001760: b00d add sp, #52 @ 0x34
|
|
10001762: bcf0 pop {r4, r5, r6, r7}
|
|
10001764: 46bb mov fp, r7
|
|
10001766: 46b2 mov sl, r6
|
|
10001768: 46a9 mov r9, r5
|
|
1000176a: 46a0 mov r8, r4
|
|
1000176c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
1000176e: 9806 ldr r0, [sp, #24]
|
|
10001770: e7f6 b.n 10001760 <alarm_pool_add_alarm_at+0xfc>
|
|
|
|
10001772 <add_alarm_at>:
|
|
10001772: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001774: 46c6 mov lr, r8
|
|
10001776: b500 push {lr}
|
|
10001778: b084 sub sp, #16
|
|
1000177a: 0005 movs r5, r0
|
|
1000177c: 4688 mov r8, r1
|
|
1000177e: 0016 movs r6, r2
|
|
10001780: 001f movs r7, r3
|
|
10001782: ab0a add r3, sp, #40 @ 0x28
|
|
10001784: 781c ldrb r4, [r3, #0]
|
|
10001786: f7ff ff57 bl 10001638 <alarm_pool_get_default>
|
|
1000178a: 9402 str r4, [sp, #8]
|
|
1000178c: 9701 str r7, [sp, #4]
|
|
1000178e: 9600 str r6, [sp, #0]
|
|
10001790: 002a movs r2, r5
|
|
10001792: 4643 mov r3, r8
|
|
10001794: f7ff ff66 bl 10001664 <alarm_pool_add_alarm_at>
|
|
10001798: b004 add sp, #16
|
|
1000179a: bc80 pop {r7}
|
|
1000179c: 46b8 mov r8, r7
|
|
1000179e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100017a0 <alarm_pool_cancel_alarm>:
|
|
100017a0: b5f0 push {r4, r5, r6, r7, lr}
|
|
100017a2: 46c6 mov lr, r8
|
|
100017a4: b500 push {lr}
|
|
100017a6: 0004 movs r4, r0
|
|
100017a8: 000d movs r5, r1
|
|
100017aa: 6842 ldr r2, [r0, #4]
|
|
100017ac: f3ef 8710 mrs r7, PRIMASK
|
|
100017b0: b672 cpsid i
|
|
100017b2: 6813 ldr r3, [r2, #0]
|
|
100017b4: 2b00 cmp r3, #0
|
|
100017b6: d0fc beq.n 100017b2 <alarm_pool_cancel_alarm+0x12>
|
|
100017b8: f3bf 8f5f dmb sy
|
|
100017bc: b2ee uxtb r6, r5
|
|
100017be: 6823 ldr r3, [r4, #0]
|
|
100017c0: 4698 mov r8, r3
|
|
100017c2: 0031 movs r1, r6
|
|
100017c4: 0018 movs r0, r3
|
|
100017c6: f7ff fc8d bl 100010e4 <ph_contains_node>
|
|
100017ca: 2800 cmp r0, #0
|
|
100017cc: d02a beq.n 10001824 <alarm_pool_cancel_alarm+0x84>
|
|
100017ce: 6923 ldr r3, [r4, #16]
|
|
100017d0: 42ab cmp r3, r5
|
|
100017d2: d013 beq.n 100017fc <alarm_pool_cancel_alarm+0x5c>
|
|
100017d4: 0a2d lsrs r5, r5, #8
|
|
100017d6: b2ed uxtb r5, r5
|
|
100017d8: 0031 movs r1, r6
|
|
100017da: 0020 movs r0, r4
|
|
100017dc: f7ff fd48 bl 10001270 <get_entry_id_high>
|
|
100017e0: 7803 ldrb r3, [r0, #0]
|
|
100017e2: 42ab cmp r3, r5
|
|
100017e4: d011 beq.n 1000180a <alarm_pool_cancel_alarm+0x6a>
|
|
100017e6: 2000 movs r0, #0
|
|
100017e8: 6863 ldr r3, [r4, #4]
|
|
100017ea: f3bf 8f5f dmb sy
|
|
100017ee: 2200 movs r2, #0
|
|
100017f0: 601a str r2, [r3, #0]
|
|
100017f2: f387 8810 msr PRIMASK, r7
|
|
100017f6: bc80 pop {r7}
|
|
100017f8: 46b8 mov r8, r7
|
|
100017fa: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100017fc: 4b0c ldr r3, [pc, #48] @ (10001830 <alarm_pool_cancel_alarm+0x90>)
|
|
100017fe: 4a0d ldr r2, [pc, #52] @ (10001834 <alarm_pool_cancel_alarm+0x94>)
|
|
10001800: 2195 movs r1, #149 @ 0x95
|
|
10001802: 480d ldr r0, [pc, #52] @ (10001838 <alarm_pool_cancel_alarm+0x98>)
|
|
10001804: 0049 lsls r1, r1, #1
|
|
10001806: f000 fdd7 bl 100023b8 <__assert_func>
|
|
1000180a: 0031 movs r1, r6
|
|
1000180c: 4640 mov r0, r8
|
|
1000180e: f000 fb25 bl 10001e5c <ph_remove_and_free_node>
|
|
10001812: 2800 cmp r0, #0
|
|
10001814: d1e8 bne.n 100017e8 <alarm_pool_cancel_alarm+0x48>
|
|
10001816: 4b09 ldr r3, [pc, #36] @ (1000183c <alarm_pool_cancel_alarm+0x9c>)
|
|
10001818: 4a06 ldr r2, [pc, #24] @ (10001834 <alarm_pool_cancel_alarm+0x94>)
|
|
1000181a: 2132 movs r1, #50 @ 0x32
|
|
1000181c: 4806 ldr r0, [pc, #24] @ (10001838 <alarm_pool_cancel_alarm+0x98>)
|
|
1000181e: 31ff adds r1, #255 @ 0xff
|
|
10001820: f000 fdca bl 100023b8 <__assert_func>
|
|
10001824: 6923 ldr r3, [r4, #16]
|
|
10001826: 42ab cmp r3, r5
|
|
10001828: d1de bne.n 100017e8 <alarm_pool_cancel_alarm+0x48>
|
|
1000182a: 2300 movs r3, #0
|
|
1000182c: 6123 str r3, [r4, #16]
|
|
1000182e: e7db b.n 100017e8 <alarm_pool_cancel_alarm+0x48>
|
|
10001830: 10005e74 .word 0x10005e74
|
|
10001834: 10005eec .word 0x10005eec
|
|
10001838: 10005ca8 .word 0x10005ca8
|
|
1000183c: 10005e98 .word 0x10005e98
|
|
|
|
10001840 <cancel_alarm>:
|
|
10001840: b510 push {r4, lr}
|
|
10001842: 0004 movs r4, r0
|
|
10001844: f7ff fef8 bl 10001638 <alarm_pool_get_default>
|
|
10001848: 0021 movs r1, r4
|
|
1000184a: f7ff ffa9 bl 100017a0 <alarm_pool_cancel_alarm>
|
|
1000184e: bd10 pop {r4, pc}
|
|
|
|
10001850 <sleep_until>:
|
|
10001850: b530 push {r4, r5, lr}
|
|
10001852: b087 sub sp, #28
|
|
10001854: 0004 movs r4, r0
|
|
10001856: 000d movs r5, r1
|
|
10001858: f3ef 8305 mrs r3, IPSR
|
|
1000185c: 2b00 cmp r3, #0
|
|
1000185e: d120 bne.n 100018a2 <sleep_until+0x52>
|
|
10001860: 2206 movs r2, #6
|
|
10001862: 4252 negs r2, r2
|
|
10001864: 17d3 asrs r3, r2, #31
|
|
10001866: 1912 adds r2, r2, r4
|
|
10001868: 416b adcs r3, r5
|
|
1000186a: 428b cmp r3, r1
|
|
1000186c: d802 bhi.n 10001874 <sleep_until+0x24>
|
|
1000186e: d103 bne.n 10001878 <sleep_until+0x28>
|
|
10001870: 4282 cmp r2, r0
|
|
10001872: d901 bls.n 10001878 <sleep_until+0x28>
|
|
10001874: 2200 movs r2, #0
|
|
10001876: 2300 movs r3, #0
|
|
10001878: a804 add r0, sp, #16
|
|
1000187a: f7ff fbef bl 1000105c <update_us_since_boot>
|
|
1000187e: a802 add r0, sp, #8
|
|
10001880: f7ff fd46 bl 10001310 <get_absolute_time>
|
|
10001884: 9802 ldr r0, [sp, #8]
|
|
10001886: 9903 ldr r1, [sp, #12]
|
|
10001888: 9a04 ldr r2, [sp, #16]
|
|
1000188a: 9b05 ldr r3, [sp, #20]
|
|
1000188c: 1a12 subs r2, r2, r0
|
|
1000188e: 418b sbcs r3, r1
|
|
10001890: 2b00 cmp r3, #0
|
|
10001892: dc0b bgt.n 100018ac <sleep_until+0x5c>
|
|
10001894: d008 beq.n 100018a8 <sleep_until+0x58>
|
|
10001896: 0020 movs r0, r4
|
|
10001898: 0029 movs r1, r5
|
|
1000189a: f000 f8c9 bl 10001a30 <busy_wait_until>
|
|
1000189e: b007 add sp, #28
|
|
100018a0: bd30 pop {r4, r5, pc}
|
|
100018a2: 4814 ldr r0, [pc, #80] @ (100018f4 <sleep_until+0xa4>)
|
|
100018a4: f000 fe20 bl 100024e8 <panic>
|
|
100018a8: 2a00 cmp r2, #0
|
|
100018aa: d0f4 beq.n 10001896 <sleep_until+0x46>
|
|
100018ac: 4a12 ldr r2, [pc, #72] @ (100018f8 <sleep_until+0xa8>)
|
|
100018ae: 9804 ldr r0, [sp, #16]
|
|
100018b0: 9905 ldr r1, [sp, #20]
|
|
100018b2: 2300 movs r3, #0
|
|
100018b4: 9300 str r3, [sp, #0]
|
|
100018b6: f7ff ff5c bl 10001772 <add_alarm_at>
|
|
100018ba: 2800 cmp r0, #0
|
|
100018bc: da13 bge.n 100018e6 <sleep_until+0x96>
|
|
100018be: e7ea b.n 10001896 <sleep_until+0x46>
|
|
100018c0: 4b0e ldr r3, [pc, #56] @ (100018fc <sleep_until+0xac>)
|
|
100018c2: 681a ldr r2, [r3, #0]
|
|
100018c4: f3ef 8110 mrs r1, PRIMASK
|
|
100018c8: b672 cpsid i
|
|
100018ca: 6813 ldr r3, [r2, #0]
|
|
100018cc: 2b00 cmp r3, #0
|
|
100018ce: d0fc beq.n 100018ca <sleep_until+0x7a>
|
|
100018d0: f3bf 8f5f dmb sy
|
|
100018d4: 4b09 ldr r3, [pc, #36] @ (100018fc <sleep_until+0xac>)
|
|
100018d6: 681b ldr r3, [r3, #0]
|
|
100018d8: f3bf 8f5f dmb sy
|
|
100018dc: 2200 movs r2, #0
|
|
100018de: 601a str r2, [r3, #0]
|
|
100018e0: f381 8810 msr PRIMASK, r1
|
|
100018e4: bf20 wfe
|
|
100018e6: 9804 ldr r0, [sp, #16]
|
|
100018e8: 9905 ldr r1, [sp, #20]
|
|
100018ea: f7ff fb6f bl 10000fcc <time_reached>
|
|
100018ee: 2800 cmp r0, #0
|
|
100018f0: d0e6 beq.n 100018c0 <sleep_until+0x70>
|
|
100018f2: e7d0 b.n 10001896 <sleep_until+0x46>
|
|
100018f4: 10005e9c .word 0x10005e9c
|
|
100018f8: 100012e1 .word 0x100012e1
|
|
100018fc: 20000d6c .word 0x20000d6c
|
|
|
|
10001900 <sleep_us>:
|
|
10001900: b500 push {lr}
|
|
10001902: b083 sub sp, #12
|
|
10001904: 0002 movs r2, r0
|
|
10001906: 000b movs r3, r1
|
|
10001908: 4668 mov r0, sp
|
|
1000190a: f7ff fd12 bl 10001332 <make_timeout_time_us>
|
|
1000190e: 9800 ldr r0, [sp, #0]
|
|
10001910: 9901 ldr r1, [sp, #4]
|
|
10001912: f7ff ff9d bl 10001850 <sleep_until>
|
|
10001916: b003 add sp, #12
|
|
10001918: bd00 pop {pc}
|
|
|
|
1000191a <sleep_ms>:
|
|
1000191a: b510 push {r4, lr}
|
|
1000191c: 22fa movs r2, #250 @ 0xfa
|
|
1000191e: 0092 lsls r2, r2, #2
|
|
10001920: 2300 movs r3, #0
|
|
10001922: 2100 movs r1, #0
|
|
10001924: f002 fd6e bl 10004404 <__wrap___aeabi_lmul>
|
|
10001928: f7ff ffea bl 10001900 <sleep_us>
|
|
1000192c: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10001930 <best_effort_wfe_or_timeout>:
|
|
10001930: b530 push {r4, r5, lr}
|
|
10001932: b083 sub sp, #12
|
|
10001934: 0005 movs r5, r0
|
|
10001936: 000c movs r4, r1
|
|
10001938: f3ef 8305 mrs r3, IPSR
|
|
1000193c: 2b00 cmp r3, #0
|
|
1000193e: d10f bne.n 10001960 <best_effort_wfe_or_timeout+0x30>
|
|
10001940: 4a0b ldr r2, [pc, #44] @ (10001970 <best_effort_wfe_or_timeout+0x40>)
|
|
10001942: 2300 movs r3, #0
|
|
10001944: 9300 str r3, [sp, #0]
|
|
10001946: f7ff ff14 bl 10001772 <add_alarm_at>
|
|
1000194a: 2800 cmp r0, #0
|
|
1000194c: dd0b ble.n 10001966 <best_effort_wfe_or_timeout+0x36>
|
|
1000194e: bf20 wfe
|
|
10001950: f7ff ff76 bl 10001840 <cancel_alarm>
|
|
10001954: 0028 movs r0, r5
|
|
10001956: 0021 movs r1, r4
|
|
10001958: f7ff fb38 bl 10000fcc <time_reached>
|
|
1000195c: b003 add sp, #12
|
|
1000195e: bd30 pop {r4, r5, pc}
|
|
10001960: f7ff fb34 bl 10000fcc <time_reached>
|
|
10001964: e7fa b.n 1000195c <best_effort_wfe_or_timeout+0x2c>
|
|
10001966: 0028 movs r0, r5
|
|
10001968: 0021 movs r1, r4
|
|
1000196a: f7ff fb2f bl 10000fcc <time_reached>
|
|
1000196e: e7f5 b.n 1000195c <best_effort_wfe_or_timeout+0x2c>
|
|
10001970: 100012e1 .word 0x100012e1
|
|
|
|
10001974 <hardware_alarm_irq_handler>:
|
|
10001974: b570 push {r4, r5, r6, lr}
|
|
10001976: f3ef 8005 mrs r0, IPSR
|
|
1000197a: 3810 subs r0, #16
|
|
1000197c: f3ef 8c10 mrs ip, PRIMASK
|
|
10001980: b672 cpsid i
|
|
10001982: 4b19 ldr r3, [pc, #100] @ (100019e8 <hardware_alarm_irq_handler+0x74>)
|
|
10001984: 681b ldr r3, [r3, #0]
|
|
10001986: 2b00 cmp r3, #0
|
|
10001988: d0fb beq.n 10001982 <hardware_alarm_irq_handler+0xe>
|
|
1000198a: f3bf 8f5f dmb sy
|
|
1000198e: 2201 movs r2, #1
|
|
10001990: 0013 movs r3, r2
|
|
10001992: 4083 lsls r3, r0
|
|
10001994: 4915 ldr r1, [pc, #84] @ (100019ec <hardware_alarm_irq_handler+0x78>)
|
|
10001996: 634b str r3, [r1, #52] @ 0x34
|
|
10001998: 4915 ldr r1, [pc, #84] @ (100019f0 <hardware_alarm_irq_handler+0x7c>)
|
|
1000199a: 600b str r3, [r1, #0]
|
|
1000199c: 4915 ldr r1, [pc, #84] @ (100019f4 <hardware_alarm_irq_handler+0x80>)
|
|
1000199e: 7809 ldrb r1, [r1, #0]
|
|
100019a0: 000c movs r4, r1
|
|
100019a2: 40c4 lsrs r4, r0
|
|
100019a4: 4222 tst r2, r4
|
|
100019a6: d013 beq.n 100019d0 <hardware_alarm_irq_handler+0x5c>
|
|
100019a8: 4a10 ldr r2, [pc, #64] @ (100019ec <hardware_alarm_irq_handler+0x78>)
|
|
100019aa: 6a54 ldr r4, [r2, #36] @ 0x24
|
|
100019ac: 4a12 ldr r2, [pc, #72] @ (100019f8 <hardware_alarm_irq_handler+0x84>)
|
|
100019ae: 0085 lsls r5, r0, #2
|
|
100019b0: 58aa ldr r2, [r5, r2]
|
|
100019b2: 4294 cmp r4, r2
|
|
100019b4: d305 bcc.n 100019c2 <hardware_alarm_irq_handler+0x4e>
|
|
100019b6: 4a11 ldr r2, [pc, #68] @ (100019fc <hardware_alarm_irq_handler+0x88>)
|
|
100019b8: 58aa ldr r2, [r5, r2]
|
|
100019ba: 4c0e ldr r4, [pc, #56] @ (100019f4 <hardware_alarm_irq_handler+0x80>)
|
|
100019bc: 4399 bics r1, r3
|
|
100019be: 7021 strb r1, [r4, #0]
|
|
100019c0: e007 b.n 100019d2 <hardware_alarm_irq_handler+0x5e>
|
|
100019c2: 4a0a ldr r2, [pc, #40] @ (100019ec <hardware_alarm_irq_handler+0x78>)
|
|
100019c4: 1d03 adds r3, r0, #4
|
|
100019c6: 009b lsls r3, r3, #2
|
|
100019c8: 5899 ldr r1, [r3, r2]
|
|
100019ca: 5099 str r1, [r3, r2]
|
|
100019cc: 2200 movs r2, #0
|
|
100019ce: e000 b.n 100019d2 <hardware_alarm_irq_handler+0x5e>
|
|
100019d0: 2200 movs r2, #0
|
|
100019d2: f3bf 8f5f dmb sy
|
|
100019d6: 4b04 ldr r3, [pc, #16] @ (100019e8 <hardware_alarm_irq_handler+0x74>)
|
|
100019d8: 2100 movs r1, #0
|
|
100019da: 6019 str r1, [r3, #0]
|
|
100019dc: f38c 8810 msr PRIMASK, ip
|
|
100019e0: 2a00 cmp r2, #0
|
|
100019e2: d000 beq.n 100019e6 <hardware_alarm_irq_handler+0x72>
|
|
100019e4: 4790 blx r2
|
|
100019e6: bd70 pop {r4, r5, r6, pc}
|
|
100019e8: d0000128 .word 0xd0000128
|
|
100019ec: 40054000 .word 0x40054000
|
|
100019f0: 4005703c .word 0x4005703c
|
|
100019f4: 20000db0 .word 0x20000db0
|
|
100019f8: 20000d70 .word 0x20000d70
|
|
100019fc: 20000ac4 .word 0x20000ac4
|
|
|
|
10001a00 <hardware_alarm_claim>:
|
|
10001a00: b510 push {r4, lr}
|
|
10001a02: 0001 movs r1, r0
|
|
10001a04: 4a02 ldr r2, [pc, #8] @ (10001a10 <hardware_alarm_claim+0x10>)
|
|
10001a06: 4b03 ldr r3, [pc, #12] @ (10001a14 <hardware_alarm_claim+0x14>)
|
|
10001a08: 0018 movs r0, r3
|
|
10001a0a: f7ff f84b bl 10000aa4 <hw_claim_or_assert>
|
|
10001a0e: bd10 pop {r4, pc}
|
|
10001a10: 10005fc8 .word 0x10005fc8
|
|
10001a14: 20000dae .word 0x20000dae
|
|
|
|
10001a18 <time_us_64>:
|
|
10001a18: 4b04 ldr r3, [pc, #16] @ (10001a2c <time_us_64+0x14>)
|
|
10001a1a: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001a1c: 4a03 ldr r2, [pc, #12] @ (10001a2c <time_us_64+0x14>)
|
|
10001a1e: 6a90 ldr r0, [r2, #40] @ 0x28
|
|
10001a20: 0019 movs r1, r3
|
|
10001a22: 6a53 ldr r3, [r2, #36] @ 0x24
|
|
10001a24: 4299 cmp r1, r3
|
|
10001a26: d1f9 bne.n 10001a1c <time_us_64+0x4>
|
|
10001a28: 4770 bx lr
|
|
10001a2a: 46c0 nop @ (mov r8, r8)
|
|
10001a2c: 40054000 .word 0x40054000
|
|
|
|
10001a30 <busy_wait_until>:
|
|
10001a30: 4b08 ldr r3, [pc, #32] @ (10001a54 <busy_wait_until+0x24>)
|
|
10001a32: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001a34: e001 b.n 10001a3a <busy_wait_until+0xa>
|
|
10001a36: 4b07 ldr r3, [pc, #28] @ (10001a54 <busy_wait_until+0x24>)
|
|
10001a38: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001a3a: 428b cmp r3, r1
|
|
10001a3c: d3fb bcc.n 10001a36 <busy_wait_until+0x6>
|
|
10001a3e: e001 b.n 10001a44 <busy_wait_until+0x14>
|
|
10001a40: 4b04 ldr r3, [pc, #16] @ (10001a54 <busy_wait_until+0x24>)
|
|
10001a42: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001a44: 428b cmp r3, r1
|
|
10001a46: d103 bne.n 10001a50 <busy_wait_until+0x20>
|
|
10001a48: 4b02 ldr r3, [pc, #8] @ (10001a54 <busy_wait_until+0x24>)
|
|
10001a4a: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
10001a4c: 4283 cmp r3, r0
|
|
10001a4e: d3f7 bcc.n 10001a40 <busy_wait_until+0x10>
|
|
10001a50: 4770 bx lr
|
|
10001a52: 46c0 nop @ (mov r8, r8)
|
|
10001a54: 40054000 .word 0x40054000
|
|
|
|
10001a58 <hardware_alarm_set_callback>:
|
|
10001a58: b570 push {r4, r5, r6, lr}
|
|
10001a5a: 0004 movs r4, r0
|
|
10001a5c: 000e movs r6, r1
|
|
10001a5e: f3ef 8510 mrs r5, PRIMASK
|
|
10001a62: b672 cpsid i
|
|
10001a64: 4b1b ldr r3, [pc, #108] @ (10001ad4 <hardware_alarm_set_callback+0x7c>)
|
|
10001a66: 681b ldr r3, [r3, #0]
|
|
10001a68: 2b00 cmp r3, #0
|
|
10001a6a: d0fb beq.n 10001a64 <hardware_alarm_set_callback+0xc>
|
|
10001a6c: f3bf 8f5f dmb sy
|
|
10001a70: 2e00 cmp r6, #0
|
|
10001a72: d01c beq.n 10001aae <hardware_alarm_set_callback+0x56>
|
|
10001a74: 0020 movs r0, r4
|
|
10001a76: f7ff f909 bl 10000c8c <irq_get_vtable_handler>
|
|
10001a7a: 4b17 ldr r3, [pc, #92] @ (10001ad8 <hardware_alarm_set_callback+0x80>)
|
|
10001a7c: 4283 cmp r3, r0
|
|
10001a7e: d00b beq.n 10001a98 <hardware_alarm_set_callback+0x40>
|
|
10001a80: 0019 movs r1, r3
|
|
10001a82: 0020 movs r0, r4
|
|
10001a84: f7ff f90a bl 10000c9c <irq_set_exclusive_handler>
|
|
10001a88: 2101 movs r1, #1
|
|
10001a8a: 0020 movs r0, r4
|
|
10001a8c: f7ff f8f6 bl 10000c7c <irq_set_enabled>
|
|
10001a90: 2301 movs r3, #1
|
|
10001a92: 40a3 lsls r3, r4
|
|
10001a94: 4a11 ldr r2, [pc, #68] @ (10001adc <hardware_alarm_set_callback+0x84>)
|
|
10001a96: 6013 str r3, [r2, #0]
|
|
10001a98: 4b11 ldr r3, [pc, #68] @ (10001ae0 <hardware_alarm_set_callback+0x88>)
|
|
10001a9a: 00a4 lsls r4, r4, #2
|
|
10001a9c: 50e6 str r6, [r4, r3]
|
|
10001a9e: f3bf 8f5f dmb sy
|
|
10001aa2: 4b0c ldr r3, [pc, #48] @ (10001ad4 <hardware_alarm_set_callback+0x7c>)
|
|
10001aa4: 2200 movs r2, #0
|
|
10001aa6: 601a str r2, [r3, #0]
|
|
10001aa8: f385 8810 msr PRIMASK, r5
|
|
10001aac: bd70 pop {r4, r5, r6, pc}
|
|
10001aae: 4b0c ldr r3, [pc, #48] @ (10001ae0 <hardware_alarm_set_callback+0x88>)
|
|
10001ab0: 00a2 lsls r2, r4, #2
|
|
10001ab2: 2100 movs r1, #0
|
|
10001ab4: 50d1 str r1, [r2, r3]
|
|
10001ab6: 2201 movs r2, #1
|
|
10001ab8: 40a2 lsls r2, r4
|
|
10001aba: 490a ldr r1, [pc, #40] @ (10001ae4 <hardware_alarm_set_callback+0x8c>)
|
|
10001abc: 780b ldrb r3, [r1, #0]
|
|
10001abe: 4393 bics r3, r2
|
|
10001ac0: 700b strb r3, [r1, #0]
|
|
10001ac2: 4905 ldr r1, [pc, #20] @ (10001ad8 <hardware_alarm_set_callback+0x80>)
|
|
10001ac4: 0020 movs r0, r4
|
|
10001ac6: f7ff f913 bl 10000cf0 <irq_remove_handler>
|
|
10001aca: 2100 movs r1, #0
|
|
10001acc: 0020 movs r0, r4
|
|
10001ace: f7ff f8d5 bl 10000c7c <irq_set_enabled>
|
|
10001ad2: e7e4 b.n 10001a9e <hardware_alarm_set_callback+0x46>
|
|
10001ad4: d0000128 .word 0xd0000128
|
|
10001ad8: 10001975 .word 0x10001975
|
|
10001adc: 40056038 .word 0x40056038
|
|
10001ae0: 20000ac4 .word 0x20000ac4
|
|
10001ae4: 20000db0 .word 0x20000db0
|
|
|
|
10001ae8 <hardware_alarm_set_target>:
|
|
10001ae8: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001aea: 46de mov lr, fp
|
|
10001aec: b500 push {lr}
|
|
10001aee: b084 sub sp, #16
|
|
10001af0: 0004 movs r4, r0
|
|
10001af2: 0015 movs r5, r2
|
|
10001af4: 9201 str r2, [sp, #4]
|
|
10001af6: 001e movs r6, r3
|
|
10001af8: 9302 str r3, [sp, #8]
|
|
10001afa: f7ff ff8d bl 10001a18 <time_us_64>
|
|
10001afe: 9503 str r5, [sp, #12]
|
|
10001b00: 428e cmp r6, r1
|
|
10001b02: d802 bhi.n 10001b0a <hardware_alarm_set_target+0x22>
|
|
10001b04: d14e bne.n 10001ba4 <hardware_alarm_set_target+0xbc>
|
|
10001b06: 4285 cmp r5, r0
|
|
10001b08: d94c bls.n 10001ba4 <hardware_alarm_set_target+0xbc>
|
|
10001b0a: f3ef 8b10 mrs fp, PRIMASK
|
|
10001b0e: b672 cpsid i
|
|
10001b10: 4b27 ldr r3, [pc, #156] @ (10001bb0 <hardware_alarm_set_target+0xc8>)
|
|
10001b12: 681b ldr r3, [r3, #0]
|
|
10001b14: 2b00 cmp r3, #0
|
|
10001b16: d0fb beq.n 10001b10 <hardware_alarm_set_target+0x28>
|
|
10001b18: f3bf 8f5f dmb sy
|
|
10001b1c: 4a25 ldr r2, [pc, #148] @ (10001bb4 <hardware_alarm_set_target+0xcc>)
|
|
10001b1e: 7817 ldrb r7, [r2, #0]
|
|
10001b20: 2501 movs r5, #1
|
|
10001b22: 40a5 lsls r5, r4
|
|
10001b24: b2eb uxtb r3, r5
|
|
10001b26: 433b orrs r3, r7
|
|
10001b28: 7013 strb r3, [r2, #0]
|
|
10001b2a: 4b23 ldr r3, [pc, #140] @ (10001bb8 <hardware_alarm_set_target+0xd0>)
|
|
10001b2c: 635d str r5, [r3, #52] @ 0x34
|
|
10001b2e: 1d22 adds r2, r4, #4
|
|
10001b30: 0092 lsls r2, r2, #2
|
|
10001b32: 9901 ldr r1, [sp, #4]
|
|
10001b34: 50d1 str r1, [r2, r3]
|
|
10001b36: 4a21 ldr r2, [pc, #132] @ (10001bbc <hardware_alarm_set_target+0xd4>)
|
|
10001b38: 00a1 lsls r1, r4, #2
|
|
10001b3a: 9802 ldr r0, [sp, #8]
|
|
10001b3c: 5088 str r0, [r1, r2]
|
|
10001b3e: 6a1b ldr r3, [r3, #32]
|
|
10001b40: 422b tst r3, r5
|
|
10001b42: d112 bne.n 10001b6a <hardware_alarm_set_target+0x82>
|
|
10001b44: 4b1c ldr r3, [pc, #112] @ (10001bb8 <hardware_alarm_set_target+0xd0>)
|
|
10001b46: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
10001b48: 422b tst r3, r5
|
|
10001b4a: d008 beq.n 10001b5e <hardware_alarm_set_target+0x76>
|
|
10001b4c: 2000 movs r0, #0
|
|
10001b4e: f3bf 8f5f dmb sy
|
|
10001b52: 4b17 ldr r3, [pc, #92] @ (10001bb0 <hardware_alarm_set_target+0xc8>)
|
|
10001b54: 2200 movs r2, #0
|
|
10001b56: 601a str r2, [r3, #0]
|
|
10001b58: f38b 8810 msr PRIMASK, fp
|
|
10001b5c: e023 b.n 10001ba6 <hardware_alarm_set_target+0xbe>
|
|
10001b5e: 4b18 ldr r3, [pc, #96] @ (10001bc0 <hardware_alarm_set_target+0xd8>)
|
|
10001b60: 4a18 ldr r2, [pc, #96] @ (10001bc4 <hardware_alarm_set_target+0xdc>)
|
|
10001b62: 4819 ldr r0, [pc, #100] @ (10001bc8 <hardware_alarm_set_target+0xe0>)
|
|
10001b64: 21c5 movs r1, #197 @ 0xc5
|
|
10001b66: f000 fc27 bl 100023b8 <__assert_func>
|
|
10001b6a: f7ff ff55 bl 10001a18 <time_us_64>
|
|
10001b6e: 428e cmp r6, r1
|
|
10001b70: d814 bhi.n 10001b9c <hardware_alarm_set_target+0xb4>
|
|
10001b72: d102 bne.n 10001b7a <hardware_alarm_set_target+0x92>
|
|
10001b74: 9b03 ldr r3, [sp, #12]
|
|
10001b76: 4283 cmp r3, r0
|
|
10001b78: d810 bhi.n 10001b9c <hardware_alarm_set_target+0xb4>
|
|
10001b7a: 4b0e ldr r3, [pc, #56] @ (10001bb4 <hardware_alarm_set_target+0xcc>)
|
|
10001b7c: 781b ldrb r3, [r3, #0]
|
|
10001b7e: 42bb cmp r3, r7
|
|
10001b80: d00e beq.n 10001ba0 <hardware_alarm_set_target+0xb8>
|
|
10001b82: 4b0d ldr r3, [pc, #52] @ (10001bb8 <hardware_alarm_set_target+0xd0>)
|
|
10001b84: 621d str r5, [r3, #32]
|
|
10001b86: 635d str r5, [r3, #52] @ 0x34
|
|
10001b88: 221f movs r2, #31
|
|
10001b8a: 4022 ands r2, r4
|
|
10001b8c: 2301 movs r3, #1
|
|
10001b8e: 4093 lsls r3, r2
|
|
10001b90: 4a0e ldr r2, [pc, #56] @ (10001bcc <hardware_alarm_set_target+0xe4>)
|
|
10001b92: 6013 str r3, [r2, #0]
|
|
10001b94: 4b07 ldr r3, [pc, #28] @ (10001bb4 <hardware_alarm_set_target+0xcc>)
|
|
10001b96: 701f strb r7, [r3, #0]
|
|
10001b98: 2001 movs r0, #1
|
|
10001b9a: e7d8 b.n 10001b4e <hardware_alarm_set_target+0x66>
|
|
10001b9c: 2000 movs r0, #0
|
|
10001b9e: e7d6 b.n 10001b4e <hardware_alarm_set_target+0x66>
|
|
10001ba0: 2001 movs r0, #1
|
|
10001ba2: e7d4 b.n 10001b4e <hardware_alarm_set_target+0x66>
|
|
10001ba4: 2001 movs r0, #1
|
|
10001ba6: b004 add sp, #16
|
|
10001ba8: bc80 pop {r7}
|
|
10001baa: 46bb mov fp, r7
|
|
10001bac: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001bae: 46c0 nop @ (mov r8, r8)
|
|
10001bb0: d0000128 .word 0xd0000128
|
|
10001bb4: 20000db0 .word 0x20000db0
|
|
10001bb8: 40054000 .word 0x40054000
|
|
10001bbc: 20000d70 .word 0x20000d70
|
|
10001bc0: 10005fec .word 0x10005fec
|
|
10001bc4: 1000605c .word 0x1000605c
|
|
10001bc8: 10006010 .word 0x10006010
|
|
10001bcc: e000e280 .word 0xe000e280
|
|
|
|
10001bd0 <hardware_alarm_cancel>:
|
|
10001bd0: f3ef 8c10 mrs ip, PRIMASK
|
|
10001bd4: b672 cpsid i
|
|
10001bd6: 4b0b ldr r3, [pc, #44] @ (10001c04 <hardware_alarm_cancel+0x34>)
|
|
10001bd8: 681b ldr r3, [r3, #0]
|
|
10001bda: 2b00 cmp r3, #0
|
|
10001bdc: d0fb beq.n 10001bd6 <hardware_alarm_cancel+0x6>
|
|
10001bde: f3bf 8f5f dmb sy
|
|
10001be2: 2301 movs r3, #1
|
|
10001be4: 4083 lsls r3, r0
|
|
10001be6: 4a08 ldr r2, [pc, #32] @ (10001c08 <hardware_alarm_cancel+0x38>)
|
|
10001be8: 6213 str r3, [r2, #32]
|
|
10001bea: 4908 ldr r1, [pc, #32] @ (10001c0c <hardware_alarm_cancel+0x3c>)
|
|
10001bec: 780a ldrb r2, [r1, #0]
|
|
10001bee: 439a bics r2, r3
|
|
10001bf0: 700a strb r2, [r1, #0]
|
|
10001bf2: f3bf 8f5f dmb sy
|
|
10001bf6: 4b03 ldr r3, [pc, #12] @ (10001c04 <hardware_alarm_cancel+0x34>)
|
|
10001bf8: 2200 movs r2, #0
|
|
10001bfa: 601a str r2, [r3, #0]
|
|
10001bfc: f38c 8810 msr PRIMASK, ip
|
|
10001c00: 4770 bx lr
|
|
10001c02: 46c0 nop @ (mov r8, r8)
|
|
10001c04: d0000128 .word 0xd0000128
|
|
10001c08: 40054000 .word 0x40054000
|
|
10001c0c: 20000db0 .word 0x20000db0
|
|
|
|
10001c10 <ph_get_node>:
|
|
10001c10: b510 push {r4, lr}
|
|
10001c12: 2900 cmp r1, #0
|
|
10001c14: d008 beq.n 10001c28 <ph_get_node+0x18>
|
|
10001c16: 7b03 ldrb r3, [r0, #12]
|
|
10001c18: 428b cmp r3, r1
|
|
10001c1a: d305 bcc.n 10001c28 <ph_get_node+0x18>
|
|
10001c1c: 6800 ldr r0, [r0, #0]
|
|
10001c1e: 004b lsls r3, r1, #1
|
|
10001c20: 185b adds r3, r3, r1
|
|
10001c22: 3b03 subs r3, #3
|
|
10001c24: 18c0 adds r0, r0, r3
|
|
10001c26: bd10 pop {r4, pc}
|
|
10001c28: 4b02 ldr r3, [pc, #8] @ (10001c34 <ph_get_node+0x24>)
|
|
10001c2a: 4a03 ldr r2, [pc, #12] @ (10001c38 <ph_get_node+0x28>)
|
|
10001c2c: 4803 ldr r0, [pc, #12] @ (10001c3c <ph_get_node+0x2c>)
|
|
10001c2e: 2168 movs r1, #104 @ 0x68
|
|
10001c30: f000 fbc2 bl 100023b8 <__assert_func>
|
|
10001c34: 10005cec .word 0x10005cec
|
|
10001c38: 10006170 .word 0x10006170
|
|
10001c3c: 10005d08 .word 0x10005d08
|
|
|
|
10001c40 <ph_add_child_node>:
|
|
10001c40: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10001c42: 0006 movs r6, r0
|
|
10001c44: 000c movs r4, r1
|
|
10001c46: 0015 movs r5, r2
|
|
10001c48: f7ff ffe2 bl 10001c10 <ph_get_node>
|
|
10001c4c: 0007 movs r7, r0
|
|
10001c4e: 2c00 cmp r4, #0
|
|
10001c50: d00d beq.n 10001c6e <ph_add_child_node+0x2e>
|
|
10001c52: 2d00 cmp r5, #0
|
|
10001c54: d011 beq.n 10001c7a <ph_add_child_node+0x3a>
|
|
10001c56: 42ac cmp r4, r5
|
|
10001c58: d015 beq.n 10001c86 <ph_add_child_node+0x46>
|
|
10001c5a: 0029 movs r1, r5
|
|
10001c5c: 0030 movs r0, r6
|
|
10001c5e: f7ff ffd7 bl 10001c10 <ph_get_node>
|
|
10001c62: 7084 strb r4, [r0, #2]
|
|
10001c64: 783b ldrb r3, [r7, #0]
|
|
10001c66: 2b00 cmp r3, #0
|
|
10001c68: d113 bne.n 10001c92 <ph_add_child_node+0x52>
|
|
10001c6a: 703d strb r5, [r7, #0]
|
|
10001c6c: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10001c6e: 4b0a ldr r3, [pc, #40] @ (10001c98 <ph_add_child_node+0x58>)
|
|
10001c70: 4a0a ldr r2, [pc, #40] @ (10001c9c <ph_add_child_node+0x5c>)
|
|
10001c72: 480b ldr r0, [pc, #44] @ (10001ca0 <ph_add_child_node+0x60>)
|
|
10001c74: 216f movs r1, #111 @ 0x6f
|
|
10001c76: f000 fb9f bl 100023b8 <__assert_func>
|
|
10001c7a: 4b0a ldr r3, [pc, #40] @ (10001ca4 <ph_add_child_node+0x64>)
|
|
10001c7c: 4a07 ldr r2, [pc, #28] @ (10001c9c <ph_add_child_node+0x5c>)
|
|
10001c7e: 4808 ldr r0, [pc, #32] @ (10001ca0 <ph_add_child_node+0x60>)
|
|
10001c80: 2170 movs r1, #112 @ 0x70
|
|
10001c82: f000 fb99 bl 100023b8 <__assert_func>
|
|
10001c86: 4b08 ldr r3, [pc, #32] @ (10001ca8 <ph_add_child_node+0x68>)
|
|
10001c88: 4a04 ldr r2, [pc, #16] @ (10001c9c <ph_add_child_node+0x5c>)
|
|
10001c8a: 4805 ldr r0, [pc, #20] @ (10001ca0 <ph_add_child_node+0x60>)
|
|
10001c8c: 2171 movs r1, #113 @ 0x71
|
|
10001c8e: f000 fb93 bl 100023b8 <__assert_func>
|
|
10001c92: 7043 strb r3, [r0, #1]
|
|
10001c94: 703d strb r5, [r7, #0]
|
|
10001c96: e7e9 b.n 10001c6c <ph_add_child_node+0x2c>
|
|
10001c98: 10005d5c .word 0x10005d5c
|
|
10001c9c: 1000615c .word 0x1000615c
|
|
10001ca0: 10005d08 .word 0x10005d08
|
|
10001ca4: 10005d68 .word 0x10005d68
|
|
10001ca8: 10005d74 .word 0x10005d74
|
|
|
|
10001cac <ph_merge_nodes>:
|
|
10001cac: b570 push {r4, r5, r6, lr}
|
|
10001cae: 0006 movs r6, r0
|
|
10001cb0: 000d movs r5, r1
|
|
10001cb2: 0014 movs r4, r2
|
|
10001cb4: 2900 cmp r1, #0
|
|
10001cb6: d014 beq.n 10001ce2 <ph_merge_nodes+0x36>
|
|
10001cb8: 2a00 cmp r2, #0
|
|
10001cba: d014 beq.n 10001ce6 <ph_merge_nodes+0x3a>
|
|
10001cbc: 6843 ldr r3, [r0, #4]
|
|
10001cbe: 6880 ldr r0, [r0, #8]
|
|
10001cc0: 4798 blx r3
|
|
10001cc2: 2800 cmp r0, #0
|
|
10001cc4: d006 beq.n 10001cd4 <ph_merge_nodes+0x28>
|
|
10001cc6: 0022 movs r2, r4
|
|
10001cc8: 0029 movs r1, r5
|
|
10001cca: 0030 movs r0, r6
|
|
10001ccc: f7ff ffb8 bl 10001c40 <ph_add_child_node>
|
|
10001cd0: 0028 movs r0, r5
|
|
10001cd2: e007 b.n 10001ce4 <ph_merge_nodes+0x38>
|
|
10001cd4: 002a movs r2, r5
|
|
10001cd6: 0021 movs r1, r4
|
|
10001cd8: 0030 movs r0, r6
|
|
10001cda: f7ff ffb1 bl 10001c40 <ph_add_child_node>
|
|
10001cde: 0020 movs r0, r4
|
|
10001ce0: e000 b.n 10001ce4 <ph_merge_nodes+0x38>
|
|
10001ce2: 0010 movs r0, r2
|
|
10001ce4: bd70 pop {r4, r5, r6, pc}
|
|
10001ce6: 0008 movs r0, r1
|
|
10001ce8: e7fc b.n 10001ce4 <ph_merge_nodes+0x38>
|
|
|
|
10001cea <ph_clear>:
|
|
10001cea: b570 push {r4, r5, r6, lr}
|
|
10001cec: 0005 movs r5, r0
|
|
10001cee: 2300 movs r3, #0
|
|
10001cf0: 7343 strb r3, [r0, #13]
|
|
10001cf2: 3301 adds r3, #1
|
|
10001cf4: 7383 strb r3, [r0, #14]
|
|
10001cf6: 7b03 ldrb r3, [r0, #12]
|
|
10001cf8: 73c3 strb r3, [r0, #15]
|
|
10001cfa: 2401 movs r4, #1
|
|
10001cfc: e006 b.n 10001d0c <ph_clear+0x22>
|
|
10001cfe: 0021 movs r1, r4
|
|
10001d00: 0028 movs r0, r5
|
|
10001d02: f7ff ff85 bl 10001c10 <ph_get_node>
|
|
10001d06: 3401 adds r4, #1
|
|
10001d08: b2e4 uxtb r4, r4
|
|
10001d0a: 7044 strb r4, [r0, #1]
|
|
10001d0c: 7b29 ldrb r1, [r5, #12]
|
|
10001d0e: 42a1 cmp r1, r4
|
|
10001d10: d8f5 bhi.n 10001cfe <ph_clear+0x14>
|
|
10001d12: 0028 movs r0, r5
|
|
10001d14: f7ff ff7c bl 10001c10 <ph_get_node>
|
|
10001d18: 2300 movs r3, #0
|
|
10001d1a: 7043 strb r3, [r0, #1]
|
|
10001d1c: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10001d1e <ph_post_alloc_init>:
|
|
10001d1e: b510 push {r4, lr}
|
|
10001d20: 7301 strb r1, [r0, #12]
|
|
10001d22: 6042 str r2, [r0, #4]
|
|
10001d24: 6083 str r3, [r0, #8]
|
|
10001d26: f7ff ffe0 bl 10001cea <ph_clear>
|
|
10001d2a: bd10 pop {r4, pc}
|
|
|
|
10001d2c <ph_merge_two_pass>:
|
|
10001d2c: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001d2e: 46c6 mov lr, r8
|
|
10001d30: b500 push {lr}
|
|
10001d32: 0005 movs r5, r0
|
|
10001d34: 1e0c subs r4, r1, #0
|
|
10001d36: d103 bne.n 10001d40 <ph_merge_two_pass+0x14>
|
|
10001d38: 0020 movs r0, r4
|
|
10001d3a: bc80 pop {r7}
|
|
10001d3c: 46b8 mov r8, r7
|
|
10001d3e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001d40: f7ff ff66 bl 10001c10 <ph_get_node>
|
|
10001d44: 7846 ldrb r6, [r0, #1]
|
|
10001d46: 2e00 cmp r6, #0
|
|
10001d48: d0f6 beq.n 10001d38 <ph_merge_two_pass+0xc>
|
|
10001d4a: 0031 movs r1, r6
|
|
10001d4c: 0028 movs r0, r5
|
|
10001d4e: f7ff ff5f bl 10001c10 <ph_get_node>
|
|
10001d52: 7847 ldrb r7, [r0, #1]
|
|
10001d54: 2300 movs r3, #0
|
|
10001d56: 4698 mov r8, r3
|
|
10001d58: 7043 strb r3, [r0, #1]
|
|
10001d5a: 0021 movs r1, r4
|
|
10001d5c: 0028 movs r0, r5
|
|
10001d5e: f7ff ff57 bl 10001c10 <ph_get_node>
|
|
10001d62: 4643 mov r3, r8
|
|
10001d64: 7043 strb r3, [r0, #1]
|
|
10001d66: 0032 movs r2, r6
|
|
10001d68: 0021 movs r1, r4
|
|
10001d6a: 0028 movs r0, r5
|
|
10001d6c: f7ff ff9e bl 10001cac <ph_merge_nodes>
|
|
10001d70: 0004 movs r4, r0
|
|
10001d72: 0039 movs r1, r7
|
|
10001d74: 0028 movs r0, r5
|
|
10001d76: f7ff ffd9 bl 10001d2c <ph_merge_two_pass>
|
|
10001d7a: 0002 movs r2, r0
|
|
10001d7c: 0021 movs r1, r4
|
|
10001d7e: 0028 movs r0, r5
|
|
10001d80: f7ff ff94 bl 10001cac <ph_merge_nodes>
|
|
10001d84: 0004 movs r4, r0
|
|
10001d86: e7d7 b.n 10001d38 <ph_merge_two_pass+0xc>
|
|
|
|
10001d88 <ph_remove_any_head>:
|
|
10001d88: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001d8a: 46c6 mov lr, r8
|
|
10001d8c: b500 push {lr}
|
|
10001d8e: 0004 movs r4, r0
|
|
10001d90: 000d movs r5, r1
|
|
10001d92: 0017 movs r7, r2
|
|
10001d94: 2900 cmp r1, #0
|
|
10001d96: d027 beq.n 10001de8 <ph_remove_any_head+0x60>
|
|
10001d98: f7ff ff3a bl 10001c10 <ph_get_node>
|
|
10001d9c: 7843 ldrb r3, [r0, #1]
|
|
10001d9e: 2b00 cmp r3, #0
|
|
10001da0: d128 bne.n 10001df4 <ph_remove_any_head+0x6c>
|
|
10001da2: 7883 ldrb r3, [r0, #2]
|
|
10001da4: 2b00 cmp r3, #0
|
|
10001da6: d12b bne.n 10001e00 <ph_remove_any_head+0x78>
|
|
10001da8: 7801 ldrb r1, [r0, #0]
|
|
10001daa: 0020 movs r0, r4
|
|
10001dac: f7ff ffbe bl 10001d2c <ph_merge_two_pass>
|
|
10001db0: 0006 movs r6, r0
|
|
10001db2: 4680 mov r8, r0
|
|
10001db4: 2f00 cmp r7, #0
|
|
10001db6: d00a beq.n 10001dce <ph_remove_any_head+0x46>
|
|
10001db8: 7be1 ldrb r1, [r4, #15]
|
|
10001dba: 2900 cmp r1, #0
|
|
10001dbc: d126 bne.n 10001e0c <ph_remove_any_head+0x84>
|
|
10001dbe: 7ba3 ldrb r3, [r4, #14]
|
|
10001dc0: 2b00 cmp r3, #0
|
|
10001dc2: d103 bne.n 10001dcc <ph_remove_any_head+0x44>
|
|
10001dc4: 7be3 ldrb r3, [r4, #15]
|
|
10001dc6: 2b00 cmp r3, #0
|
|
10001dc8: d125 bne.n 10001e16 <ph_remove_any_head+0x8e>
|
|
10001dca: 73a5 strb r5, [r4, #14]
|
|
10001dcc: 73e5 strb r5, [r4, #15]
|
|
10001dce: 4643 mov r3, r8
|
|
10001dd0: 2b00 cmp r3, #0
|
|
10001dd2: d126 bne.n 10001e22 <ph_remove_any_head+0x9a>
|
|
10001dd4: 0029 movs r1, r5
|
|
10001dd6: 0020 movs r0, r4
|
|
10001dd8: f7ff ff1a bl 10001c10 <ph_get_node>
|
|
10001ddc: 2300 movs r3, #0
|
|
10001dde: 7043 strb r3, [r0, #1]
|
|
10001de0: 0030 movs r0, r6
|
|
10001de2: bc80 pop {r7}
|
|
10001de4: 46b8 mov r8, r7
|
|
10001de6: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001de8: 4b11 ldr r3, [pc, #68] @ (10001e30 <ph_remove_any_head+0xa8>)
|
|
10001dea: 4a12 ldr r2, [pc, #72] @ (10001e34 <ph_remove_any_head+0xac>)
|
|
10001dec: 4812 ldr r0, [pc, #72] @ (10001e38 <ph_remove_any_head+0xb0>)
|
|
10001dee: 2138 movs r1, #56 @ 0x38
|
|
10001df0: f000 fae2 bl 100023b8 <__assert_func>
|
|
10001df4: 4b11 ldr r3, [pc, #68] @ (10001e3c <ph_remove_any_head+0xb4>)
|
|
10001df6: 4a0f ldr r2, [pc, #60] @ (10001e34 <ph_remove_any_head+0xac>)
|
|
10001df8: 480f ldr r0, [pc, #60] @ (10001e38 <ph_remove_any_head+0xb0>)
|
|
10001dfa: 213a movs r1, #58 @ 0x3a
|
|
10001dfc: f000 fadc bl 100023b8 <__assert_func>
|
|
10001e00: 4b0f ldr r3, [pc, #60] @ (10001e40 <ph_remove_any_head+0xb8>)
|
|
10001e02: 4a0c ldr r2, [pc, #48] @ (10001e34 <ph_remove_any_head+0xac>)
|
|
10001e04: 480c ldr r0, [pc, #48] @ (10001e38 <ph_remove_any_head+0xb0>)
|
|
10001e06: 213b movs r1, #59 @ 0x3b
|
|
10001e08: f000 fad6 bl 100023b8 <__assert_func>
|
|
10001e0c: 0020 movs r0, r4
|
|
10001e0e: f7ff feff bl 10001c10 <ph_get_node>
|
|
10001e12: 7045 strb r5, [r0, #1]
|
|
10001e14: e7d3 b.n 10001dbe <ph_remove_any_head+0x36>
|
|
10001e16: 4b0b ldr r3, [pc, #44] @ (10001e44 <ph_remove_any_head+0xbc>)
|
|
10001e18: 4a06 ldr r2, [pc, #24] @ (10001e34 <ph_remove_any_head+0xac>)
|
|
10001e1a: 4807 ldr r0, [pc, #28] @ (10001e38 <ph_remove_any_head+0xb0>)
|
|
10001e1c: 2142 movs r1, #66 @ 0x42
|
|
10001e1e: f000 facb bl 100023b8 <__assert_func>
|
|
10001e22: 0031 movs r1, r6
|
|
10001e24: 0020 movs r0, r4
|
|
10001e26: f7ff fef3 bl 10001c10 <ph_get_node>
|
|
10001e2a: 2300 movs r3, #0
|
|
10001e2c: 7083 strb r3, [r0, #2]
|
|
10001e2e: e7d1 b.n 10001dd4 <ph_remove_any_head+0x4c>
|
|
10001e30: 10006078 .word 0x10006078
|
|
10001e34: 10006148 .word 0x10006148
|
|
10001e38: 10006080 .word 0x10006080
|
|
10001e3c: 100060c4 .word 0x100060c4
|
|
10001e40: 100060ec .word 0x100060ec
|
|
10001e44: 10005db4 .word 0x10005db4
|
|
|
|
10001e48 <ph_remove_head>:
|
|
10001e48: b570 push {r4, r5, r6, lr}
|
|
10001e4a: 0004 movs r4, r0
|
|
10001e4c: 000a movs r2, r1
|
|
10001e4e: 7b45 ldrb r5, [r0, #13]
|
|
10001e50: 0029 movs r1, r5
|
|
10001e52: f7ff ff99 bl 10001d88 <ph_remove_any_head>
|
|
10001e56: 7360 strb r0, [r4, #13]
|
|
10001e58: 0028 movs r0, r5
|
|
10001e5a: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10001e5c <ph_remove_and_free_node>:
|
|
10001e5c: b570 push {r4, r5, r6, lr}
|
|
10001e5e: 0006 movs r6, r0
|
|
10001e60: 1e0c subs r4, r1, #0
|
|
10001e62: d040 beq.n 10001ee6 <ph_remove_and_free_node+0x8a>
|
|
10001e64: 7b43 ldrb r3, [r0, #13]
|
|
10001e66: 428b cmp r3, r1
|
|
10001e68: d007 beq.n 10001e7a <ph_remove_and_free_node+0x1e>
|
|
10001e6a: f7ff fed1 bl 10001c10 <ph_get_node>
|
|
10001e6e: 0005 movs r5, r0
|
|
10001e70: 7881 ldrb r1, [r0, #2]
|
|
10001e72: 2900 cmp r1, #0
|
|
10001e74: d106 bne.n 10001e84 <ph_remove_and_free_node+0x28>
|
|
10001e76: 2000 movs r0, #0
|
|
10001e78: e036 b.n 10001ee8 <ph_remove_and_free_node+0x8c>
|
|
10001e7a: 2101 movs r1, #1
|
|
10001e7c: f7ff ffe4 bl 10001e48 <ph_remove_head>
|
|
10001e80: 2001 movs r0, #1
|
|
10001e82: e031 b.n 10001ee8 <ph_remove_and_free_node+0x8c>
|
|
10001e84: 0030 movs r0, r6
|
|
10001e86: f7ff fec3 bl 10001c10 <ph_get_node>
|
|
10001e8a: 7801 ldrb r1, [r0, #0]
|
|
10001e8c: 42a1 cmp r1, r4
|
|
10001e8e: d00d beq.n 10001eac <ph_remove_and_free_node+0x50>
|
|
10001e90: 0030 movs r0, r6
|
|
10001e92: f7ff febd bl 10001c10 <ph_get_node>
|
|
10001e96: 7841 ldrb r1, [r0, #1]
|
|
10001e98: 42a1 cmp r1, r4
|
|
10001e9a: d00a beq.n 10001eb2 <ph_remove_and_free_node+0x56>
|
|
10001e9c: 2900 cmp r1, #0
|
|
10001e9e: d1f7 bne.n 10001e90 <ph_remove_and_free_node+0x34>
|
|
10001ea0: 4b12 ldr r3, [pc, #72] @ (10001eec <ph_remove_and_free_node+0x90>)
|
|
10001ea2: 4a13 ldr r2, [pc, #76] @ (10001ef0 <ph_remove_and_free_node+0x94>)
|
|
10001ea4: 4813 ldr r0, [pc, #76] @ (10001ef4 <ph_remove_and_free_node+0x98>)
|
|
10001ea6: 316b adds r1, #107 @ 0x6b
|
|
10001ea8: f000 fa86 bl 100023b8 <__assert_func>
|
|
10001eac: 786b ldrb r3, [r5, #1]
|
|
10001eae: 7003 strb r3, [r0, #0]
|
|
10001eb0: e001 b.n 10001eb6 <ph_remove_and_free_node+0x5a>
|
|
10001eb2: 786b ldrb r3, [r5, #1]
|
|
10001eb4: 7043 strb r3, [r0, #1]
|
|
10001eb6: 2300 movs r3, #0
|
|
10001eb8: 70ab strb r3, [r5, #2]
|
|
10001eba: 706b strb r3, [r5, #1]
|
|
10001ebc: 2201 movs r2, #1
|
|
10001ebe: 0021 movs r1, r4
|
|
10001ec0: 0030 movs r0, r6
|
|
10001ec2: f7ff ff61 bl 10001d88 <ph_remove_any_head>
|
|
10001ec6: 0002 movs r2, r0
|
|
10001ec8: 7b71 ldrb r1, [r6, #13]
|
|
10001eca: 4281 cmp r1, r0
|
|
10001ecc: d005 beq.n 10001eda <ph_remove_and_free_node+0x7e>
|
|
10001ece: 0030 movs r0, r6
|
|
10001ed0: f7ff feec bl 10001cac <ph_merge_nodes>
|
|
10001ed4: 7370 strb r0, [r6, #13]
|
|
10001ed6: 2001 movs r0, #1
|
|
10001ed8: e006 b.n 10001ee8 <ph_remove_and_free_node+0x8c>
|
|
10001eda: 4b07 ldr r3, [pc, #28] @ (10001ef8 <ph_remove_and_free_node+0x9c>)
|
|
10001edc: 4a04 ldr r2, [pc, #16] @ (10001ef0 <ph_remove_and_free_node+0x94>)
|
|
10001ede: 4805 ldr r0, [pc, #20] @ (10001ef4 <ph_remove_and_free_node+0x98>)
|
|
10001ee0: 2171 movs r1, #113 @ 0x71
|
|
10001ee2: f000 fa69 bl 100023b8 <__assert_func>
|
|
10001ee6: 2000 movs r0, #0
|
|
10001ee8: bd70 pop {r4, r5, r6, pc}
|
|
10001eea: 46c0 nop @ (mov r8, r8)
|
|
10001eec: 10005b40 .word 0x10005b40
|
|
10001ef0: 10006130 .word 0x10006130
|
|
10001ef4: 10006080 .word 0x10006080
|
|
10001ef8: 10006110 .word 0x10006110
|
|
|
|
10001efc <uart_set_baudrate>:
|
|
10001efc: b570 push {r4, r5, r6, lr}
|
|
10001efe: 0004 movs r4, r0
|
|
10001f00: 000d movs r5, r1
|
|
10001f02: 2006 movs r0, #6
|
|
10001f04: f000 f97e bl 10002204 <clock_get_hz>
|
|
10001f08: 00c0 lsls r0, r0, #3
|
|
10001f0a: 0029 movs r1, r5
|
|
10001f0c: f001 fc3c bl 10003788 <__wrap___aeabi_uidiv>
|
|
10001f10: 09c6 lsrs r6, r0, #7
|
|
10001f12: d008 beq.n 10001f26 <uart_set_baudrate+0x2a>
|
|
10001f14: 4b0e ldr r3, [pc, #56] @ (10001f50 <uart_set_baudrate+0x54>)
|
|
10001f16: 429e cmp r6, r3
|
|
10001f18: d817 bhi.n 10001f4a <uart_set_baudrate+0x4e>
|
|
10001f1a: 237f movs r3, #127 @ 0x7f
|
|
10001f1c: 4003 ands r3, r0
|
|
10001f1e: 3301 adds r3, #1
|
|
10001f20: 0035 movs r5, r6
|
|
10001f22: 085e lsrs r6, r3, #1
|
|
10001f24: e000 b.n 10001f28 <uart_set_baudrate+0x2c>
|
|
10001f26: 2501 movs r5, #1
|
|
10001f28: 6265 str r5, [r4, #36] @ 0x24
|
|
10001f2a: 62a6 str r6, [r4, #40] @ 0x28
|
|
10001f2c: 342c adds r4, #44 @ 0x2c
|
|
10001f2e: 2380 movs r3, #128 @ 0x80
|
|
10001f30: 019b lsls r3, r3, #6
|
|
10001f32: 4323 orrs r3, r4
|
|
10001f34: 2200 movs r2, #0
|
|
10001f36: 601a str r2, [r3, #0]
|
|
10001f38: 2006 movs r0, #6
|
|
10001f3a: f000 f963 bl 10002204 <clock_get_hz>
|
|
10001f3e: 0080 lsls r0, r0, #2
|
|
10001f40: 01a9 lsls r1, r5, #6
|
|
10001f42: 1989 adds r1, r1, r6
|
|
10001f44: f001 fc20 bl 10003788 <__wrap___aeabi_uidiv>
|
|
10001f48: bd70 pop {r4, r5, r6, pc}
|
|
10001f4a: 2600 movs r6, #0
|
|
10001f4c: 4d01 ldr r5, [pc, #4] @ (10001f54 <uart_set_baudrate+0x58>)
|
|
10001f4e: e7eb b.n 10001f28 <uart_set_baudrate+0x2c>
|
|
10001f50: 0000fffe .word 0x0000fffe
|
|
10001f54: 0000ffff .word 0x0000ffff
|
|
|
|
10001f58 <uart_set_translate_crlf>:
|
|
10001f58: 2900 cmp r1, #0
|
|
10001f5a: d009 beq.n 10001f70 <uart_set_translate_crlf+0x18>
|
|
10001f5c: 220a movs r2, #10
|
|
10001f5e: 4b06 ldr r3, [pc, #24] @ (10001f78 <uart_set_translate_crlf+0x20>)
|
|
10001f60: 469c mov ip, r3
|
|
10001f62: 4460 add r0, ip
|
|
10001f64: 4243 negs r3, r0
|
|
10001f66: 4158 adcs r0, r3
|
|
10001f68: 4b04 ldr r3, [pc, #16] @ (10001f7c <uart_set_translate_crlf+0x24>)
|
|
10001f6a: 0040 lsls r0, r0, #1
|
|
10001f6c: 52c2 strh r2, [r0, r3]
|
|
10001f6e: 4770 bx lr
|
|
10001f70: 2280 movs r2, #128 @ 0x80
|
|
10001f72: 0052 lsls r2, r2, #1
|
|
10001f74: e7f3 b.n 10001f5e <uart_set_translate_crlf+0x6>
|
|
10001f76: 46c0 nop @ (mov r8, r8)
|
|
10001f78: bffc8000 .word 0xbffc8000
|
|
10001f7c: 20000da4 .word 0x20000da4
|
|
|
|
10001f80 <uart_init>:
|
|
10001f80: b570 push {r4, r5, r6, lr}
|
|
10001f82: 0005 movs r5, r0
|
|
10001f84: 000c movs r4, r1
|
|
10001f86: 2006 movs r0, #6
|
|
10001f88: f000 f93c bl 10002204 <clock_get_hz>
|
|
10001f8c: 2800 cmp r0, #0
|
|
10001f8e: d029 beq.n 10001fe4 <uart_init+0x64>
|
|
10001f90: 4b16 ldr r3, [pc, #88] @ (10001fec <uart_init+0x6c>)
|
|
10001f92: 429d cmp r5, r3
|
|
10001f94: d027 beq.n 10001fe6 <uart_init+0x66>
|
|
10001f96: 2280 movs r2, #128 @ 0x80
|
|
10001f98: 03d2 lsls r2, r2, #15
|
|
10001f9a: 4b15 ldr r3, [pc, #84] @ (10001ff0 <uart_init+0x70>)
|
|
10001f9c: 601a str r2, [r3, #0]
|
|
10001f9e: 4b15 ldr r3, [pc, #84] @ (10001ff4 <uart_init+0x74>)
|
|
10001fa0: 601a str r2, [r3, #0]
|
|
10001fa2: 4b15 ldr r3, [pc, #84] @ (10001ff8 <uart_init+0x78>)
|
|
10001fa4: 689b ldr r3, [r3, #8]
|
|
10001fa6: 0011 movs r1, r2
|
|
10001fa8: 4399 bics r1, r3
|
|
10001faa: d1fa bne.n 10001fa2 <uart_init+0x22>
|
|
10001fac: 2100 movs r1, #0
|
|
10001fae: 0028 movs r0, r5
|
|
10001fb0: f7ff ffd2 bl 10001f58 <uart_set_translate_crlf>
|
|
10001fb4: 0021 movs r1, r4
|
|
10001fb6: 0028 movs r0, r5
|
|
10001fb8: f7ff ffa0 bl 10001efc <uart_set_baudrate>
|
|
10001fbc: 0029 movs r1, r5
|
|
10001fbe: 312c adds r1, #44 @ 0x2c
|
|
10001fc0: 6aeb ldr r3, [r5, #44] @ 0x2c
|
|
10001fc2: 2260 movs r2, #96 @ 0x60
|
|
10001fc4: 4053 eors r3, r2
|
|
10001fc6: 320e adds r2, #14
|
|
10001fc8: 401a ands r2, r3
|
|
10001fca: 2380 movs r3, #128 @ 0x80
|
|
10001fcc: 015b lsls r3, r3, #5
|
|
10001fce: 430b orrs r3, r1
|
|
10001fd0: 601a str r2, [r3, #0]
|
|
10001fd2: 4b0a ldr r3, [pc, #40] @ (10001ffc <uart_init+0x7c>)
|
|
10001fd4: 632b str r3, [r5, #48] @ 0x30
|
|
10001fd6: 2380 movs r3, #128 @ 0x80
|
|
10001fd8: 019b lsls r3, r3, #6
|
|
10001fda: 430b orrs r3, r1
|
|
10001fdc: 2210 movs r2, #16
|
|
10001fde: 601a str r2, [r3, #0]
|
|
10001fe0: 2303 movs r3, #3
|
|
10001fe2: 64ab str r3, [r5, #72] @ 0x48
|
|
10001fe4: bd70 pop {r4, r5, r6, pc}
|
|
10001fe6: 2280 movs r2, #128 @ 0x80
|
|
10001fe8: 0412 lsls r2, r2, #16
|
|
10001fea: e7d6 b.n 10001f9a <uart_init+0x1a>
|
|
10001fec: 40038000 .word 0x40038000
|
|
10001ff0: 4000e000 .word 0x4000e000
|
|
10001ff4: 4000f000 .word 0x4000f000
|
|
10001ff8: 4000c000 .word 0x4000c000
|
|
10001ffc: 00000301 .word 0x00000301
|
|
|
|
10002000 <clock_configure>:
|
|
10002000: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10002002: 46de mov lr, fp
|
|
10002004: 4657 mov r7, sl
|
|
10002006: 464e mov r6, r9
|
|
10002008: 4645 mov r5, r8
|
|
1000200a: b5e0 push {r5, r6, r7, lr}
|
|
1000200c: 0006 movs r6, r0
|
|
1000200e: 000f movs r7, r1
|
|
10002010: 0015 movs r5, r2
|
|
10002012: 9a0a ldr r2, [sp, #40] @ 0x28
|
|
10002014: 4293 cmp r3, r2
|
|
10002016: d34e bcc.n 100020b6 <clock_configure+0xb6>
|
|
10002018: 0e1a lsrs r2, r3, #24
|
|
1000201a: 4692 mov sl, r2
|
|
1000201c: 021b lsls r3, r3, #8
|
|
1000201e: 4698 mov r8, r3
|
|
10002020: 9a0a ldr r2, [sp, #40] @ 0x28
|
|
10002022: 2300 movs r3, #0
|
|
10002024: 4640 mov r0, r8
|
|
10002026: 4651 mov r1, sl
|
|
10002028: f001 fbec bl 10003804 <__wrap___aeabi_uldivmod>
|
|
1000202c: 4681 mov r9, r0
|
|
1000202e: 0074 lsls r4, r6, #1
|
|
10002030: 19a4 adds r4, r4, r6
|
|
10002032: 00a4 lsls r4, r4, #2
|
|
10002034: 4b2e ldr r3, [pc, #184] @ (100020f0 <clock_configure+0xf0>)
|
|
10002036: 469c mov ip, r3
|
|
10002038: 4464 add r4, ip
|
|
1000203a: 6863 ldr r3, [r4, #4]
|
|
1000203c: 4283 cmp r3, r0
|
|
1000203e: d200 bcs.n 10002042 <clock_configure+0x42>
|
|
10002040: 6060 str r0, [r4, #4]
|
|
10002042: 1f33 subs r3, r6, #4
|
|
10002044: b2db uxtb r3, r3
|
|
10002046: 469b mov fp, r3
|
|
10002048: 2b01 cmp r3, #1
|
|
1000204a: d93a bls.n 100020c2 <clock_configure+0xc2>
|
|
1000204c: 23c0 movs r3, #192 @ 0xc0
|
|
1000204e: 019b lsls r3, r3, #6
|
|
10002050: 4323 orrs r3, r4
|
|
10002052: 2280 movs r2, #128 @ 0x80
|
|
10002054: 0112 lsls r2, r2, #4
|
|
10002056: 601a str r2, [r3, #0]
|
|
10002058: 4b26 ldr r3, [pc, #152] @ (100020f4 <clock_configure+0xf4>)
|
|
1000205a: 00b2 lsls r2, r6, #2
|
|
1000205c: 58d1 ldr r1, [r2, r3]
|
|
1000205e: 2900 cmp r1, #0
|
|
10002060: d005 beq.n 1000206e <clock_configure+0x6e>
|
|
10002062: 6958 ldr r0, [r3, #20]
|
|
10002064: f001 fb90 bl 10003788 <__wrap___aeabi_uidiv>
|
|
10002068: 3001 adds r0, #1
|
|
1000206a: 3801 subs r0, #1
|
|
1000206c: d1fd bne.n 1000206a <clock_configure+0x6a>
|
|
1000206e: 016d lsls r5, r5, #5
|
|
10002070: 6823 ldr r3, [r4, #0]
|
|
10002072: 405d eors r5, r3
|
|
10002074: 22e0 movs r2, #224 @ 0xe0
|
|
10002076: 402a ands r2, r5
|
|
10002078: 2380 movs r3, #128 @ 0x80
|
|
1000207a: 015b lsls r3, r3, #5
|
|
1000207c: 4323 orrs r3, r4
|
|
1000207e: 601a str r2, [r3, #0]
|
|
10002080: 465a mov r2, fp
|
|
10002082: 2a01 cmp r2, #1
|
|
10002084: d928 bls.n 100020d8 <clock_configure+0xd8>
|
|
10002086: 2380 movs r3, #128 @ 0x80
|
|
10002088: 019b lsls r3, r3, #6
|
|
1000208a: 4323 orrs r3, r4
|
|
1000208c: 2280 movs r2, #128 @ 0x80
|
|
1000208e: 0112 lsls r2, r2, #4
|
|
10002090: 601a str r2, [r3, #0]
|
|
10002092: 464b mov r3, r9
|
|
10002094: 6063 str r3, [r4, #4]
|
|
10002096: 464a mov r2, r9
|
|
10002098: 2300 movs r3, #0
|
|
1000209a: 4640 mov r0, r8
|
|
1000209c: 4651 mov r1, sl
|
|
1000209e: f001 fbb1 bl 10003804 <__wrap___aeabi_uldivmod>
|
|
100020a2: 4b14 ldr r3, [pc, #80] @ (100020f4 <clock_configure+0xf4>)
|
|
100020a4: 00b6 lsls r6, r6, #2
|
|
100020a6: 5198 str r0, [r3, r6]
|
|
100020a8: 2001 movs r0, #1
|
|
100020aa: bcf0 pop {r4, r5, r6, r7}
|
|
100020ac: 46bb mov fp, r7
|
|
100020ae: 46b2 mov sl, r6
|
|
100020b0: 46a9 mov r9, r5
|
|
100020b2: 46a0 mov r8, r4
|
|
100020b4: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
100020b6: 4b10 ldr r3, [pc, #64] @ (100020f8 <clock_configure+0xf8>)
|
|
100020b8: 4a10 ldr r2, [pc, #64] @ (100020fc <clock_configure+0xfc>)
|
|
100020ba: 4811 ldr r0, [pc, #68] @ (10002100 <clock_configure+0x100>)
|
|
100020bc: 212d movs r1, #45 @ 0x2d
|
|
100020be: f000 f97b bl 100023b8 <__assert_func>
|
|
100020c2: 2f01 cmp r7, #1
|
|
100020c4: d1c2 bne.n 1000204c <clock_configure+0x4c>
|
|
100020c6: 23c0 movs r3, #192 @ 0xc0
|
|
100020c8: 019b lsls r3, r3, #6
|
|
100020ca: 4323 orrs r3, r4
|
|
100020cc: 2203 movs r2, #3
|
|
100020ce: 601a str r2, [r3, #0]
|
|
100020d0: 68a3 ldr r3, [r4, #8]
|
|
100020d2: 07db lsls r3, r3, #31
|
|
100020d4: d5fc bpl.n 100020d0 <clock_configure+0xd0>
|
|
100020d6: e7ca b.n 1000206e <clock_configure+0x6e>
|
|
100020d8: 6821 ldr r1, [r4, #0]
|
|
100020da: 4079 eors r1, r7
|
|
100020dc: 2203 movs r2, #3
|
|
100020de: 400a ands r2, r1
|
|
100020e0: 601a str r2, [r3, #0]
|
|
100020e2: 68a3 ldr r3, [r4, #8]
|
|
100020e4: 2501 movs r5, #1
|
|
100020e6: 40bd lsls r5, r7
|
|
100020e8: 421d tst r5, r3
|
|
100020ea: d0fa beq.n 100020e2 <clock_configure+0xe2>
|
|
100020ec: e7cb b.n 10002086 <clock_configure+0x86>
|
|
100020ee: 46c0 nop @ (mov r8, r8)
|
|
100020f0: 40008000 .word 0x40008000
|
|
100020f4: 20000adc .word 0x20000adc
|
|
100020f8: 1000617c .word 0x1000617c
|
|
100020fc: 100061e0 .word 0x100061e0
|
|
10002100: 10006190 .word 0x10006190
|
|
|
|
10002104 <clocks_init>:
|
|
10002104: b530 push {r4, r5, lr}
|
|
10002106: b083 sub sp, #12
|
|
10002108: 200c movs r0, #12
|
|
1000210a: f000 f917 bl 1000233c <watchdog_start_tick>
|
|
1000210e: f7fe fca9 bl 10000a64 <running_on_fpga>
|
|
10002112: 2800 cmp r0, #0
|
|
10002114: d00d beq.n 10002132 <clocks_init+0x2e>
|
|
10002116: 2300 movs r3, #0
|
|
10002118: e004 b.n 10002124 <clocks_init+0x20>
|
|
1000211a: 4a2e ldr r2, [pc, #184] @ (100021d4 <clocks_init+0xd0>)
|
|
1000211c: 0099 lsls r1, r3, #2
|
|
1000211e: 482e ldr r0, [pc, #184] @ (100021d8 <clocks_init+0xd4>)
|
|
10002120: 5088 str r0, [r1, r2]
|
|
10002122: 3301 adds r3, #1
|
|
10002124: 2b09 cmp r3, #9
|
|
10002126: d9f8 bls.n 1000211a <clocks_init+0x16>
|
|
10002128: 4b2a ldr r3, [pc, #168] @ (100021d4 <clocks_init+0xd0>)
|
|
1000212a: 4a2c ldr r2, [pc, #176] @ (100021dc <clocks_init+0xd8>)
|
|
1000212c: 625a str r2, [r3, #36] @ 0x24
|
|
1000212e: b003 add sp, #12
|
|
10002130: bd30 pop {r4, r5, pc}
|
|
10002132: 4b2b ldr r3, [pc, #172] @ (100021e0 <clocks_init+0xdc>)
|
|
10002134: 2200 movs r2, #0
|
|
10002136: 679a str r2, [r3, #120] @ 0x78
|
|
10002138: f000 f908 bl 1000234c <xosc_init>
|
|
1000213c: 4b29 ldr r3, [pc, #164] @ (100021e4 <clocks_init+0xe0>)
|
|
1000213e: 2201 movs r2, #1
|
|
10002140: 601a str r2, [r3, #0]
|
|
10002142: 4b27 ldr r3, [pc, #156] @ (100021e0 <clocks_init+0xdc>)
|
|
10002144: 6c5b ldr r3, [r3, #68] @ 0x44
|
|
10002146: 2b01 cmp r3, #1
|
|
10002148: d1fb bne.n 10002142 <clocks_init+0x3e>
|
|
1000214a: 4b27 ldr r3, [pc, #156] @ (100021e8 <clocks_init+0xe4>)
|
|
1000214c: 2203 movs r2, #3
|
|
1000214e: 601a str r2, [r3, #0]
|
|
10002150: 4b23 ldr r3, [pc, #140] @ (100021e0 <clocks_init+0xdc>)
|
|
10002152: 6b9b ldr r3, [r3, #56] @ 0x38
|
|
10002154: 2b01 cmp r3, #1
|
|
10002156: d1fb bne.n 10002150 <clocks_init+0x4c>
|
|
10002158: 3301 adds r3, #1
|
|
1000215a: 9300 str r3, [sp, #0]
|
|
1000215c: 3304 adds r3, #4
|
|
1000215e: 4a23 ldr r2, [pc, #140] @ (100021ec <clocks_init+0xe8>)
|
|
10002160: 2101 movs r1, #1
|
|
10002162: 4823 ldr r0, [pc, #140] @ (100021f0 <clocks_init+0xec>)
|
|
10002164: f000 f854 bl 10002210 <pll_init>
|
|
10002168: 2305 movs r3, #5
|
|
1000216a: 9300 str r3, [sp, #0]
|
|
1000216c: 4a21 ldr r2, [pc, #132] @ (100021f4 <clocks_init+0xf0>)
|
|
1000216e: 2101 movs r1, #1
|
|
10002170: 4821 ldr r0, [pc, #132] @ (100021f8 <clocks_init+0xf4>)
|
|
10002172: f000 f84d bl 10002210 <pll_init>
|
|
10002176: 4b21 ldr r3, [pc, #132] @ (100021fc <clocks_init+0xf8>)
|
|
10002178: 9300 str r3, [sp, #0]
|
|
1000217a: 2200 movs r2, #0
|
|
1000217c: 2102 movs r1, #2
|
|
1000217e: 2004 movs r0, #4
|
|
10002180: f7ff ff3e bl 10002000 <clock_configure>
|
|
10002184: 4d1e ldr r5, [pc, #120] @ (10002200 <clocks_init+0xfc>)
|
|
10002186: 9500 str r5, [sp, #0]
|
|
10002188: 002b movs r3, r5
|
|
1000218a: 2200 movs r2, #0
|
|
1000218c: 2101 movs r1, #1
|
|
1000218e: 2005 movs r0, #5
|
|
10002190: f7ff ff36 bl 10002000 <clock_configure>
|
|
10002194: 4c10 ldr r4, [pc, #64] @ (100021d8 <clocks_init+0xd4>)
|
|
10002196: 9400 str r4, [sp, #0]
|
|
10002198: 0023 movs r3, r4
|
|
1000219a: 2200 movs r2, #0
|
|
1000219c: 2100 movs r1, #0
|
|
1000219e: 2007 movs r0, #7
|
|
100021a0: f7ff ff2e bl 10002000 <clock_configure>
|
|
100021a4: 9400 str r4, [sp, #0]
|
|
100021a6: 0023 movs r3, r4
|
|
100021a8: 2200 movs r2, #0
|
|
100021aa: 2100 movs r1, #0
|
|
100021ac: 2008 movs r0, #8
|
|
100021ae: f7ff ff27 bl 10002000 <clock_configure>
|
|
100021b2: 4b0a ldr r3, [pc, #40] @ (100021dc <clocks_init+0xd8>)
|
|
100021b4: 9300 str r3, [sp, #0]
|
|
100021b6: 0023 movs r3, r4
|
|
100021b8: 2200 movs r2, #0
|
|
100021ba: 2100 movs r1, #0
|
|
100021bc: 2009 movs r0, #9
|
|
100021be: f7ff ff1f bl 10002000 <clock_configure>
|
|
100021c2: 9500 str r5, [sp, #0]
|
|
100021c4: 002b movs r3, r5
|
|
100021c6: 2200 movs r2, #0
|
|
100021c8: 2100 movs r1, #0
|
|
100021ca: 2006 movs r0, #6
|
|
100021cc: f7ff ff18 bl 10002000 <clock_configure>
|
|
100021d0: e7ad b.n 1000212e <clocks_init+0x2a>
|
|
100021d2: 46c0 nop @ (mov r8, r8)
|
|
100021d4: 20000adc .word 0x20000adc
|
|
100021d8: 02dc6c00 .word 0x02dc6c00
|
|
100021dc: 0000b71b .word 0x0000b71b
|
|
100021e0: 40008000 .word 0x40008000
|
|
100021e4: 4000b03c .word 0x4000b03c
|
|
100021e8: 4000b030 .word 0x4000b030
|
|
100021ec: 59682f00 .word 0x59682f00
|
|
100021f0: 40028000 .word 0x40028000
|
|
100021f4: 47868c00 .word 0x47868c00
|
|
100021f8: 4002c000 .word 0x4002c000
|
|
100021fc: 00b71b00 .word 0x00b71b00
|
|
10002200: 07735940 .word 0x07735940
|
|
|
|
10002204 <clock_get_hz>:
|
|
10002204: 4b01 ldr r3, [pc, #4] @ (1000220c <clock_get_hz+0x8>)
|
|
10002206: 0080 lsls r0, r0, #2
|
|
10002208: 58c0 ldr r0, [r0, r3]
|
|
1000220a: 4770 bx lr
|
|
1000220c: 20000adc .word 0x20000adc
|
|
|
|
10002210 <pll_init>:
|
|
10002210: b5f0 push {r4, r5, r6, r7, lr}
|
|
10002212: 46c6 mov lr, r8
|
|
10002214: b500 push {lr}
|
|
10002216: 0004 movs r4, r0
|
|
10002218: 000d movs r5, r1
|
|
1000221a: 0017 movs r7, r2
|
|
1000221c: 4698 mov r8, r3
|
|
1000221e: 200c movs r0, #12
|
|
10002220: f001 fab2 bl 10003788 <__wrap___aeabi_uidiv>
|
|
10002224: 0006 movs r6, r0
|
|
10002226: 4b39 ldr r3, [pc, #228] @ (1000230c <pll_init+0xfc>)
|
|
10002228: 18fa adds r2, r7, r3
|
|
1000222a: 4b39 ldr r3, [pc, #228] @ (10002310 <pll_init+0x100>)
|
|
1000222c: 429a cmp r2, r3
|
|
1000222e: d841 bhi.n 100022b4 <pll_init+0xa4>
|
|
10002230: 0143 lsls r3, r0, #5
|
|
10002232: 1a1b subs r3, r3, r0
|
|
10002234: 0199 lsls r1, r3, #6
|
|
10002236: 1ac9 subs r1, r1, r3
|
|
10002238: 00c9 lsls r1, r1, #3
|
|
1000223a: 1809 adds r1, r1, r0
|
|
1000223c: 0189 lsls r1, r1, #6
|
|
1000223e: 0038 movs r0, r7
|
|
10002240: f001 faa2 bl 10003788 <__wrap___aeabi_uidiv>
|
|
10002244: 0002 movs r2, r0
|
|
10002246: 3a10 subs r2, #16
|
|
10002248: 2398 movs r3, #152 @ 0x98
|
|
1000224a: 005b lsls r3, r3, #1
|
|
1000224c: 429a cmp r2, r3
|
|
1000224e: d837 bhi.n 100022c0 <pll_init+0xb0>
|
|
10002250: 4643 mov r3, r8
|
|
10002252: 3b01 subs r3, #1
|
|
10002254: 2b06 cmp r3, #6
|
|
10002256: d839 bhi.n 100022cc <pll_init+0xbc>
|
|
10002258: 9b06 ldr r3, [sp, #24]
|
|
1000225a: 3b01 subs r3, #1
|
|
1000225c: 2b06 cmp r3, #6
|
|
1000225e: d835 bhi.n 100022cc <pll_init+0xbc>
|
|
10002260: 093f lsrs r7, r7, #4
|
|
10002262: 42b7 cmp r7, r6
|
|
10002264: d338 bcc.n 100022d8 <pll_init+0xc8>
|
|
10002266: 4643 mov r3, r8
|
|
10002268: 041e lsls r6, r3, #16
|
|
1000226a: 9b06 ldr r3, [sp, #24]
|
|
1000226c: 031b lsls r3, r3, #12
|
|
1000226e: 431e orrs r6, r3
|
|
10002270: 6823 ldr r3, [r4, #0]
|
|
10002272: 2b00 cmp r3, #0
|
|
10002274: db36 blt.n 100022e4 <pll_init+0xd4>
|
|
10002276: 4b27 ldr r3, [pc, #156] @ (10002314 <pll_init+0x104>)
|
|
10002278: 429c cmp r4, r3
|
|
1000227a: d044 beq.n 10002306 <pll_init+0xf6>
|
|
1000227c: 2380 movs r3, #128 @ 0x80
|
|
1000227e: 015b lsls r3, r3, #5
|
|
10002280: 4a25 ldr r2, [pc, #148] @ (10002318 <pll_init+0x108>)
|
|
10002282: 6013 str r3, [r2, #0]
|
|
10002284: 4a25 ldr r2, [pc, #148] @ (1000231c <pll_init+0x10c>)
|
|
10002286: 6013 str r3, [r2, #0]
|
|
10002288: 4a25 ldr r2, [pc, #148] @ (10002320 <pll_init+0x110>)
|
|
1000228a: 6892 ldr r2, [r2, #8]
|
|
1000228c: 0019 movs r1, r3
|
|
1000228e: 4391 bics r1, r2
|
|
10002290: d1fa bne.n 10002288 <pll_init+0x78>
|
|
10002292: 6025 str r5, [r4, #0]
|
|
10002294: 60a0 str r0, [r4, #8]
|
|
10002296: 1d22 adds r2, r4, #4
|
|
10002298: 23c0 movs r3, #192 @ 0xc0
|
|
1000229a: 019b lsls r3, r3, #6
|
|
1000229c: 4313 orrs r3, r2
|
|
1000229e: 2221 movs r2, #33 @ 0x21
|
|
100022a0: 601a str r2, [r3, #0]
|
|
100022a2: 6822 ldr r2, [r4, #0]
|
|
100022a4: 2a00 cmp r2, #0
|
|
100022a6: dafc bge.n 100022a2 <pll_init+0x92>
|
|
100022a8: 60e6 str r6, [r4, #12]
|
|
100022aa: 2208 movs r2, #8
|
|
100022ac: 601a str r2, [r3, #0]
|
|
100022ae: bc80 pop {r7}
|
|
100022b0: 46b8 mov r8, r7
|
|
100022b2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100022b4: 4b1b ldr r3, [pc, #108] @ (10002324 <pll_init+0x114>)
|
|
100022b6: 4a1c ldr r2, [pc, #112] @ (10002328 <pll_init+0x118>)
|
|
100022b8: 481c ldr r0, [pc, #112] @ (1000232c <pll_init+0x11c>)
|
|
100022ba: 2111 movs r1, #17
|
|
100022bc: f000 f87c bl 100023b8 <__assert_func>
|
|
100022c0: 4b1b ldr r3, [pc, #108] @ (10002330 <pll_init+0x120>)
|
|
100022c2: 4a19 ldr r2, [pc, #100] @ (10002328 <pll_init+0x118>)
|
|
100022c4: 4819 ldr r0, [pc, #100] @ (1000232c <pll_init+0x11c>)
|
|
100022c6: 2119 movs r1, #25
|
|
100022c8: f000 f876 bl 100023b8 <__assert_func>
|
|
100022cc: 4b19 ldr r3, [pc, #100] @ (10002334 <pll_init+0x124>)
|
|
100022ce: 4a16 ldr r2, [pc, #88] @ (10002328 <pll_init+0x118>)
|
|
100022d0: 4816 ldr r0, [pc, #88] @ (1000232c <pll_init+0x11c>)
|
|
100022d2: 211c movs r1, #28
|
|
100022d4: f000 f870 bl 100023b8 <__assert_func>
|
|
100022d8: 4b17 ldr r3, [pc, #92] @ (10002338 <pll_init+0x128>)
|
|
100022da: 4a13 ldr r2, [pc, #76] @ (10002328 <pll_init+0x118>)
|
|
100022dc: 4813 ldr r0, [pc, #76] @ (1000232c <pll_init+0x11c>)
|
|
100022de: 2123 movs r1, #35 @ 0x23
|
|
100022e0: f000 f86a bl 100023b8 <__assert_func>
|
|
100022e4: 6822 ldr r2, [r4, #0]
|
|
100022e6: 233f movs r3, #63 @ 0x3f
|
|
100022e8: 4013 ands r3, r2
|
|
100022ea: 42ab cmp r3, r5
|
|
100022ec: d1c3 bne.n 10002276 <pll_init+0x66>
|
|
100022ee: 68a3 ldr r3, [r4, #8]
|
|
100022f0: 051b lsls r3, r3, #20
|
|
100022f2: 0d1b lsrs r3, r3, #20
|
|
100022f4: 4283 cmp r3, r0
|
|
100022f6: d1be bne.n 10002276 <pll_init+0x66>
|
|
100022f8: 68e3 ldr r3, [r4, #12]
|
|
100022fa: 22ee movs r2, #238 @ 0xee
|
|
100022fc: 02d2 lsls r2, r2, #11
|
|
100022fe: 4013 ands r3, r2
|
|
10002300: 42b3 cmp r3, r6
|
|
10002302: d1b8 bne.n 10002276 <pll_init+0x66>
|
|
10002304: e7d3 b.n 100022ae <pll_init+0x9e>
|
|
10002306: 2380 movs r3, #128 @ 0x80
|
|
10002308: 019b lsls r3, r3, #6
|
|
1000230a: e7b9 b.n 10002280 <pll_init+0x70>
|
|
1000230c: d34be880 .word 0xd34be880
|
|
10002310: 32a9f880 .word 0x32a9f880
|
|
10002314: 4002c000 .word 0x4002c000
|
|
10002318: 4000e000 .word 0x4000e000
|
|
1000231c: 4000f000 .word 0x4000f000
|
|
10002320: 4000c000 .word 0x4000c000
|
|
10002324: 100061f0 .word 0x100061f0
|
|
10002328: 1000631c .word 0x1000631c
|
|
1000232c: 10006250 .word 0x10006250
|
|
10002330: 10006298 .word 0x10006298
|
|
10002334: 100062b4 .word 0x100062b4
|
|
10002338: 10006300 .word 0x10006300
|
|
|
|
1000233c <watchdog_start_tick>:
|
|
1000233c: 2380 movs r3, #128 @ 0x80
|
|
1000233e: 009b lsls r3, r3, #2
|
|
10002340: 4303 orrs r3, r0
|
|
10002342: 4a01 ldr r2, [pc, #4] @ (10002348 <watchdog_start_tick+0xc>)
|
|
10002344: 62d3 str r3, [r2, #44] @ 0x2c
|
|
10002346: 4770 bx lr
|
|
10002348: 40058000 .word 0x40058000
|
|
|
|
1000234c <xosc_init>:
|
|
1000234c: 4b06 ldr r3, [pc, #24] @ (10002368 <xosc_init+0x1c>)
|
|
1000234e: 22aa movs r2, #170 @ 0xaa
|
|
10002350: 0112 lsls r2, r2, #4
|
|
10002352: 601a str r2, [r3, #0]
|
|
10002354: 222f movs r2, #47 @ 0x2f
|
|
10002356: 60da str r2, [r3, #12]
|
|
10002358: 4b04 ldr r3, [pc, #16] @ (1000236c <xosc_init+0x20>)
|
|
1000235a: 4a05 ldr r2, [pc, #20] @ (10002370 <xosc_init+0x24>)
|
|
1000235c: 601a str r2, [r3, #0]
|
|
1000235e: 4b02 ldr r3, [pc, #8] @ (10002368 <xosc_init+0x1c>)
|
|
10002360: 685b ldr r3, [r3, #4]
|
|
10002362: 2b00 cmp r3, #0
|
|
10002364: dafb bge.n 1000235e <xosc_init+0x12>
|
|
10002366: 4770 bx lr
|
|
10002368: 40024000 .word 0x40024000
|
|
1000236c: 40026000 .word 0x40026000
|
|
10002370: 00fab000 .word 0x00fab000
|
|
|
|
10002374 <_exit>:
|
|
10002374: be00 bkpt 0x0000
|
|
10002376: e7fd b.n 10002374 <_exit>
|
|
|
|
10002378 <_sbrk>:
|
|
10002378: 0003 movs r3, r0
|
|
1000237a: 4a0a ldr r2, [pc, #40] @ (100023a4 <_sbrk+0x2c>)
|
|
1000237c: 6812 ldr r2, [r2, #0]
|
|
1000237e: 2a00 cmp r2, #0
|
|
10002380: d008 beq.n 10002394 <_sbrk+0x1c>
|
|
10002382: 4a08 ldr r2, [pc, #32] @ (100023a4 <_sbrk+0x2c>)
|
|
10002384: 6810 ldr r0, [r2, #0]
|
|
10002386: 18c3 adds r3, r0, r3
|
|
10002388: 4a07 ldr r2, [pc, #28] @ (100023a8 <_sbrk+0x30>)
|
|
1000238a: 429a cmp r2, r3
|
|
1000238c: d306 bcc.n 1000239c <_sbrk+0x24>
|
|
1000238e: 4a05 ldr r2, [pc, #20] @ (100023a4 <_sbrk+0x2c>)
|
|
10002390: 6013 str r3, [r2, #0]
|
|
10002392: 4770 bx lr
|
|
10002394: 4a03 ldr r2, [pc, #12] @ (100023a4 <_sbrk+0x2c>)
|
|
10002396: 4905 ldr r1, [pc, #20] @ (100023ac <_sbrk+0x34>)
|
|
10002398: 6011 str r1, [r2, #0]
|
|
1000239a: e7f2 b.n 10002382 <_sbrk+0xa>
|
|
1000239c: 2001 movs r0, #1
|
|
1000239e: 4240 negs r0, r0
|
|
100023a0: e7f7 b.n 10002392 <_sbrk+0x1a>
|
|
100023a2: 46c0 nop @ (mov r8, r8)
|
|
100023a4: 20000b54 .word 0x20000b54
|
|
100023a8: 20040000 .word 0x20040000
|
|
100023ac: 20000db4 .word 0x20000db4
|
|
|
|
100023b0 <exit>:
|
|
100023b0: b510 push {r4, lr}
|
|
100023b2: f7ff ffdf bl 10002374 <_exit>
|
|
...
|
|
|
|
100023b8 <__assert_func>:
|
|
100023b8: b530 push {r4, r5, lr}
|
|
100023ba: b083 sub sp, #12
|
|
100023bc: 000d movs r5, r1
|
|
100023be: 0019 movs r1, r3
|
|
100023c0: 2a00 cmp r2, #0
|
|
100023c2: d00b beq.n 100023dc <__assert_func+0x24>
|
|
100023c4: 4b07 ldr r3, [pc, #28] @ (100023e4 <__assert_func+0x2c>)
|
|
100023c6: 4c08 ldr r4, [pc, #32] @ (100023e8 <__assert_func+0x30>)
|
|
100023c8: 9201 str r2, [sp, #4]
|
|
100023ca: 9300 str r3, [sp, #0]
|
|
100023cc: 002b movs r3, r5
|
|
100023ce: 0002 movs r2, r0
|
|
100023d0: 0020 movs r0, r4
|
|
100023d2: f002 fae1 bl 10004998 <__wrap_printf>
|
|
100023d6: 2001 movs r0, #1
|
|
100023d8: f7ff ffcc bl 10002374 <_exit>
|
|
100023dc: 4b03 ldr r3, [pc, #12] @ (100023ec <__assert_func+0x34>)
|
|
100023de: 001a movs r2, r3
|
|
100023e0: e7f1 b.n 100023c6 <__assert_func+0xe>
|
|
100023e2: 46c0 nop @ (mov r8, r8)
|
|
100023e4: 10006328 .word 0x10006328
|
|
100023e8: 10006338 .word 0x10006338
|
|
100023ec: 10006334 .word 0x10006334
|
|
|
|
100023f0 <runtime_init>:
|
|
100023f0: b570 push {r4, r5, r6, lr}
|
|
100023f2: 4b2b ldr r3, [pc, #172] @ (100024a0 <runtime_init+0xb0>)
|
|
100023f4: 4a2b ldr r2, [pc, #172] @ (100024a4 <runtime_init+0xb4>)
|
|
100023f6: 601a str r2, [r3, #0]
|
|
100023f8: 4b2b ldr r3, [pc, #172] @ (100024a8 <runtime_init+0xb8>)
|
|
100023fa: 4a2c ldr r2, [pc, #176] @ (100024ac <runtime_init+0xbc>)
|
|
100023fc: 601a str r2, [r3, #0]
|
|
100023fe: 4b2c ldr r3, [pc, #176] @ (100024b0 <runtime_init+0xc0>)
|
|
10002400: 689a ldr r2, [r3, #8]
|
|
10002402: 4b2a ldr r3, [pc, #168] @ (100024ac <runtime_init+0xbc>)
|
|
10002404: 4393 bics r3, r2
|
|
10002406: d1fa bne.n 100023fe <runtime_init+0xe>
|
|
10002408: 4c2a ldr r4, [pc, #168] @ (100024b4 <runtime_init+0xc4>)
|
|
1000240a: e001 b.n 10002410 <runtime_init+0x20>
|
|
1000240c: cc08 ldmia r4!, {r3}
|
|
1000240e: 4798 blx r3
|
|
10002410: 4b29 ldr r3, [pc, #164] @ (100024b8 <runtime_init+0xc8>)
|
|
10002412: 429c cmp r4, r3
|
|
10002414: d3fa bcc.n 1000240c <runtime_init+0x1c>
|
|
10002416: f7ff fe75 bl 10002104 <clocks_init>
|
|
1000241a: 4b23 ldr r3, [pc, #140] @ (100024a8 <runtime_init+0xb8>)
|
|
1000241c: 4a27 ldr r2, [pc, #156] @ (100024bc <runtime_init+0xcc>)
|
|
1000241e: 601a str r2, [r3, #0]
|
|
10002420: 4b23 ldr r3, [pc, #140] @ (100024b0 <runtime_init+0xc0>)
|
|
10002422: 689b ldr r3, [r3, #8]
|
|
10002424: 43db mvns r3, r3
|
|
10002426: 01db lsls r3, r3, #7
|
|
10002428: d1fa bne.n 10002420 <runtime_init+0x30>
|
|
1000242a: 4b25 ldr r3, [pc, #148] @ (100024c0 <runtime_init+0xd0>)
|
|
1000242c: 2240 movs r2, #64 @ 0x40
|
|
1000242e: 679a str r2, [r3, #120] @ 0x78
|
|
10002430: 675a str r2, [r3, #116] @ 0x74
|
|
10002432: 671a str r2, [r3, #112] @ 0x70
|
|
10002434: 66da str r2, [r3, #108] @ 0x6c
|
|
10002436: 4c23 ldr r4, [pc, #140] @ (100024c4 <runtime_init+0xd4>)
|
|
10002438: e009 b.n 1000244e <runtime_init+0x5e>
|
|
1000243a: 4b23 ldr r3, [pc, #140] @ (100024c8 <runtime_init+0xd8>)
|
|
1000243c: 4a23 ldr r2, [pc, #140] @ (100024cc <runtime_init+0xdc>)
|
|
1000243e: 4824 ldr r0, [pc, #144] @ (100024d0 <runtime_init+0xe0>)
|
|
10002440: 2186 movs r1, #134 @ 0x86
|
|
10002442: f7ff ffb9 bl 100023b8 <__assert_func>
|
|
10002446: 0020 movs r0, r4
|
|
10002448: f7fe fda4 bl 10000f94 <mutex_init>
|
|
1000244c: 3408 adds r4, #8
|
|
1000244e: 4b21 ldr r3, [pc, #132] @ (100024d4 <runtime_init+0xe4>)
|
|
10002450: 429c cmp r4, r3
|
|
10002452: d209 bcs.n 10002468 <runtime_init+0x78>
|
|
10002454: 6823 ldr r3, [r4, #0]
|
|
10002456: 2b00 cmp r3, #0
|
|
10002458: d0f5 beq.n 10002446 <runtime_init+0x56>
|
|
1000245a: 2b01 cmp r3, #1
|
|
1000245c: d1ed bne.n 1000243a <runtime_init+0x4a>
|
|
1000245e: 0020 movs r0, r4
|
|
10002460: f7fe fda5 bl 10000fae <recursive_mutex_init>
|
|
10002464: 3408 adds r4, #8
|
|
10002466: e7f2 b.n 1000244e <runtime_init+0x5e>
|
|
10002468: 4d1b ldr r5, [pc, #108] @ (100024d8 <runtime_init+0xe8>)
|
|
1000246a: 68a9 ldr r1, [r5, #8]
|
|
1000246c: 4c1b ldr r4, [pc, #108] @ (100024dc <runtime_init+0xec>)
|
|
1000246e: 22c0 movs r2, #192 @ 0xc0
|
|
10002470: 0020 movs r0, r4
|
|
10002472: f002 f901 bl 10004678 <__wrap___aeabi_memcpy>
|
|
10002476: 60ac str r4, [r5, #8]
|
|
10002478: f3ef 8305 mrs r3, IPSR
|
|
1000247c: 2b00 cmp r3, #0
|
|
1000247e: d000 beq.n 10002482 <runtime_init+0x92>
|
|
10002480: be00 bkpt 0x0000
|
|
10002482: f7fe fb51 bl 10000b28 <spin_locks_reset>
|
|
10002486: f7fe fd6f bl 10000f68 <irq_init_priorities>
|
|
1000248a: f7ff f8b5 bl 100015f8 <alarm_pool_init_default>
|
|
1000248e: 4c14 ldr r4, [pc, #80] @ (100024e0 <runtime_init+0xf0>)
|
|
10002490: e001 b.n 10002496 <runtime_init+0xa6>
|
|
10002492: cc08 ldmia r4!, {r3}
|
|
10002494: 4798 blx r3
|
|
10002496: 4b13 ldr r3, [pc, #76] @ (100024e4 <runtime_init+0xf4>)
|
|
10002498: 429c cmp r4, r3
|
|
1000249a: d3fa bcc.n 10002492 <runtime_init+0xa2>
|
|
1000249c: bd70 pop {r4, r5, r6, pc}
|
|
1000249e: 46c0 nop @ (mov r8, r8)
|
|
100024a0: 4000e000 .word 0x4000e000
|
|
100024a4: fefbcdbf .word 0xfefbcdbf
|
|
100024a8: 4000f000 .word 0x4000f000
|
|
100024ac: 003c7ffe .word 0x003c7ffe
|
|
100024b0: 4000c000 .word 0x4000c000
|
|
100024b4: 20000828 .word 0x20000828
|
|
100024b8: 20000838 .word 0x20000838
|
|
100024bc: 01ffffff .word 0x01ffffff
|
|
100024c0: 4001f000 .word 0x4001f000
|
|
100024c4: 20000820 .word 0x20000820
|
|
100024c8: 10006368 .word 0x10006368
|
|
100024cc: 100063e8 .word 0x100063e8
|
|
100024d0: 10006388 .word 0x10006388
|
|
100024d4: 20000828 .word 0x20000828
|
|
100024d8: e000ed00 .word 0xe000ed00
|
|
100024dc: 20000000 .word 0x20000000
|
|
100024e0: 20000838 .word 0x20000838
|
|
100024e4: 2000083c .word 0x2000083c
|
|
|
|
100024e8 <panic>:
|
|
100024e8: b40f push {r0, r1, r2, r3}
|
|
100024ea: b500 push {lr}
|
|
100024ec: b083 sub sp, #12
|
|
100024ee: 4808 ldr r0, [pc, #32] @ (10002510 <panic+0x28>)
|
|
100024f0: f002 fa22 bl 10004938 <__wrap_puts>
|
|
100024f4: 9b04 ldr r3, [sp, #16]
|
|
100024f6: 2b00 cmp r3, #0
|
|
100024f8: d007 beq.n 1000250a <panic+0x22>
|
|
100024fa: a905 add r1, sp, #20
|
|
100024fc: 9101 str r1, [sp, #4]
|
|
100024fe: 0018 movs r0, r3
|
|
10002500: f002 fa2a bl 10004958 <__wrap_vprintf>
|
|
10002504: 4803 ldr r0, [pc, #12] @ (10002514 <panic+0x2c>)
|
|
10002506: f002 fa17 bl 10004938 <__wrap_puts>
|
|
1000250a: 2001 movs r0, #1
|
|
1000250c: f7ff ff32 bl 10002374 <_exit>
|
|
10002510: 100063d4 .word 0x100063d4
|
|
10002514: 100063e4 .word 0x100063e4
|
|
|
|
10002518 <_out_null>:
|
|
10002518: 4770 bx lr
|
|
|
|
1000251a <_out_fct>:
|
|
1000251a: b510 push {r4, lr}
|
|
1000251c: 2800 cmp r0, #0
|
|
1000251e: d002 beq.n 10002526 <_out_fct+0xc>
|
|
10002520: 680b ldr r3, [r1, #0]
|
|
10002522: 6849 ldr r1, [r1, #4]
|
|
10002524: 4798 blx r3
|
|
10002526: bd10 pop {r4, pc}
|
|
|
|
10002528 <_atoi>:
|
|
10002528: 0001 movs r1, r0
|
|
1000252a: 2000 movs r0, #0
|
|
1000252c: e007 b.n 1000253e <_atoi+0x16>
|
|
1000252e: 0083 lsls r3, r0, #2
|
|
10002530: 181b adds r3, r3, r0
|
|
10002532: 005b lsls r3, r3, #1
|
|
10002534: 1c50 adds r0, r2, #1
|
|
10002536: 6008 str r0, [r1, #0]
|
|
10002538: 7810 ldrb r0, [r2, #0]
|
|
1000253a: 18c0 adds r0, r0, r3
|
|
1000253c: 3830 subs r0, #48 @ 0x30
|
|
1000253e: 680a ldr r2, [r1, #0]
|
|
10002540: 7813 ldrb r3, [r2, #0]
|
|
10002542: 3b30 subs r3, #48 @ 0x30
|
|
10002544: b2db uxtb r3, r3
|
|
10002546: 2b09 cmp r3, #9
|
|
10002548: d9f1 bls.n 1000252e <_atoi+0x6>
|
|
1000254a: 4770 bx lr
|
|
|
|
1000254c <_out_rev>:
|
|
1000254c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000254e: 46de mov lr, fp
|
|
10002550: 4657 mov r7, sl
|
|
10002552: 464e mov r6, r9
|
|
10002554: 4645 mov r5, r8
|
|
10002556: b5e0 push {r5, r6, r7, lr}
|
|
10002558: b083 sub sp, #12
|
|
1000255a: 4693 mov fp, r2
|
|
1000255c: 001f movs r7, r3
|
|
1000255e: 9b0c ldr r3, [sp, #48] @ 0x30
|
|
10002560: 469a mov sl, r3
|
|
10002562: 9c0d ldr r4, [sp, #52] @ 0x34
|
|
10002564: 9b0e ldr r3, [sp, #56] @ 0x38
|
|
10002566: 4699 mov r9, r3
|
|
10002568: 9b0f ldr r3, [sp, #60] @ 0x3c
|
|
1000256a: 079b lsls r3, r3, #30
|
|
1000256c: d003 beq.n 10002576 <_out_rev+0x2a>
|
|
1000256e: 46b8 mov r8, r7
|
|
10002570: 000f movs r7, r1
|
|
10002572: 0006 movs r6, r0
|
|
10002574: e022 b.n 100025bc <_out_rev+0x70>
|
|
10002576: 9201 str r2, [sp, #4]
|
|
10002578: 46a3 mov fp, r4
|
|
1000257a: 4688 mov r8, r1
|
|
1000257c: 464e mov r6, r9
|
|
1000257e: 46b9 mov r9, r7
|
|
10002580: 0007 movs r7, r0
|
|
10002582: 42b4 cmp r4, r6
|
|
10002584: d207 bcs.n 10002596 <_out_rev+0x4a>
|
|
10002586: 1c55 adds r5, r2, #1
|
|
10002588: 464b mov r3, r9
|
|
1000258a: 4641 mov r1, r8
|
|
1000258c: 2020 movs r0, #32
|
|
1000258e: 47b8 blx r7
|
|
10002590: 3401 adds r4, #1
|
|
10002592: 002a movs r2, r5
|
|
10002594: e7f5 b.n 10002582 <_out_rev+0x36>
|
|
10002596: 003d movs r5, r7
|
|
10002598: 464f mov r7, r9
|
|
1000259a: 465c mov r4, fp
|
|
1000259c: 9b01 ldr r3, [sp, #4]
|
|
1000259e: 469b mov fp, r3
|
|
100025a0: 46b1 mov r9, r6
|
|
100025a2: 4646 mov r6, r8
|
|
100025a4: 46b8 mov r8, r7
|
|
100025a6: 0037 movs r7, r6
|
|
100025a8: 002e movs r6, r5
|
|
100025aa: e007 b.n 100025bc <_out_rev+0x70>
|
|
100025ac: 3c01 subs r4, #1
|
|
100025ae: 1c55 adds r5, r2, #1
|
|
100025b0: 4653 mov r3, sl
|
|
100025b2: 5d18 ldrb r0, [r3, r4]
|
|
100025b4: 4643 mov r3, r8
|
|
100025b6: 0039 movs r1, r7
|
|
100025b8: 47b0 blx r6
|
|
100025ba: 002a movs r2, r5
|
|
100025bc: 2c00 cmp r4, #0
|
|
100025be: d1f5 bne.n 100025ac <_out_rev+0x60>
|
|
100025c0: 0035 movs r5, r6
|
|
100025c2: 003e movs r6, r7
|
|
100025c4: 4647 mov r7, r8
|
|
100025c6: 9b0f ldr r3, [sp, #60] @ 0x3c
|
|
100025c8: 079b lsls r3, r3, #30
|
|
100025ca: d407 bmi.n 100025dc <_out_rev+0x90>
|
|
100025cc: 0010 movs r0, r2
|
|
100025ce: b003 add sp, #12
|
|
100025d0: bcf0 pop {r4, r5, r6, r7}
|
|
100025d2: 46bb mov fp, r7
|
|
100025d4: 46b2 mov sl, r6
|
|
100025d6: 46a9 mov r9, r5
|
|
100025d8: 46a0 mov r8, r4
|
|
100025da: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100025dc: 46b0 mov r8, r6
|
|
100025de: 464e mov r6, r9
|
|
100025e0: 46b9 mov r9, r7
|
|
100025e2: 002f movs r7, r5
|
|
100025e4: 465d mov r5, fp
|
|
100025e6: 1b53 subs r3, r2, r5
|
|
100025e8: 42b3 cmp r3, r6
|
|
100025ea: d2ef bcs.n 100025cc <_out_rev+0x80>
|
|
100025ec: 1c54 adds r4, r2, #1
|
|
100025ee: 464b mov r3, r9
|
|
100025f0: 4641 mov r1, r8
|
|
100025f2: 2020 movs r0, #32
|
|
100025f4: 47b8 blx r7
|
|
100025f6: 0022 movs r2, r4
|
|
100025f8: e7f5 b.n 100025e6 <_out_rev+0x9a>
|
|
|
|
100025fa <_ntoa_format>:
|
|
100025fa: b5f0 push {r4, r5, r6, r7, lr}
|
|
100025fc: 46ce mov lr, r9
|
|
100025fe: 4647 mov r7, r8
|
|
10002600: b580 push {r7, lr}
|
|
10002602: b085 sub sp, #20
|
|
10002604: 4694 mov ip, r2
|
|
10002606: 4698 mov r8, r3
|
|
10002608: 9d0c ldr r5, [sp, #48] @ 0x30
|
|
1000260a: 9c0d ldr r4, [sp, #52] @ 0x34
|
|
1000260c: ab0e add r3, sp, #56 @ 0x38
|
|
1000260e: 781b ldrb r3, [r3, #0]
|
|
10002610: 4699 mov r9, r3
|
|
10002612: 9a10 ldr r2, [sp, #64] @ 0x40
|
|
10002614: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10002616: 9e12 ldr r6, [sp, #72] @ 0x48
|
|
10002618: 07b7 lsls r7, r6, #30
|
|
1000261a: d41c bmi.n 10002656 <_ntoa_format+0x5c>
|
|
1000261c: 2b00 cmp r3, #0
|
|
1000261e: d00c beq.n 1000263a <_ntoa_format+0x40>
|
|
10002620: 07f7 lsls r7, r6, #31
|
|
10002622: d50a bpl.n 1000263a <_ntoa_format+0x40>
|
|
10002624: 464f mov r7, r9
|
|
10002626: 2f00 cmp r7, #0
|
|
10002628: d102 bne.n 10002630 <_ntoa_format+0x36>
|
|
1000262a: 370c adds r7, #12
|
|
1000262c: 4237 tst r7, r6
|
|
1000262e: d004 beq.n 1000263a <_ntoa_format+0x40>
|
|
10002630: 3b01 subs r3, #1
|
|
10002632: e002 b.n 1000263a <_ntoa_format+0x40>
|
|
10002634: 2730 movs r7, #48 @ 0x30
|
|
10002636: 552f strb r7, [r5, r4]
|
|
10002638: 3401 adds r4, #1
|
|
1000263a: 4294 cmp r4, r2
|
|
1000263c: d201 bcs.n 10002642 <_ntoa_format+0x48>
|
|
1000263e: 2c1f cmp r4, #31
|
|
10002640: d9f8 bls.n 10002634 <_ntoa_format+0x3a>
|
|
10002642: 07f7 lsls r7, r6, #31
|
|
10002644: d507 bpl.n 10002656 <_ntoa_format+0x5c>
|
|
10002646: 429c cmp r4, r3
|
|
10002648: d205 bcs.n 10002656 <_ntoa_format+0x5c>
|
|
1000264a: 2c1f cmp r4, #31
|
|
1000264c: d803 bhi.n 10002656 <_ntoa_format+0x5c>
|
|
1000264e: 2730 movs r7, #48 @ 0x30
|
|
10002650: 552f strb r7, [r5, r4]
|
|
10002652: 3401 adds r4, #1
|
|
10002654: e7f5 b.n 10002642 <_ntoa_format+0x48>
|
|
10002656: 06f7 lsls r7, r6, #27
|
|
10002658: d512 bpl.n 10002680 <_ntoa_format+0x86>
|
|
1000265a: 0577 lsls r7, r6, #21
|
|
1000265c: d405 bmi.n 1000266a <_ntoa_format+0x70>
|
|
1000265e: 2c00 cmp r4, #0
|
|
10002660: d003 beq.n 1000266a <_ntoa_format+0x70>
|
|
10002662: 4294 cmp r4, r2
|
|
10002664: d021 beq.n 100026aa <_ntoa_format+0xb0>
|
|
10002666: 429c cmp r4, r3
|
|
10002668: d01f beq.n 100026aa <_ntoa_format+0xb0>
|
|
1000266a: 9a0f ldr r2, [sp, #60] @ 0x3c
|
|
1000266c: 2a10 cmp r2, #16
|
|
1000266e: d032 beq.n 100026d6 <_ntoa_format+0xdc>
|
|
10002670: 9a0f ldr r2, [sp, #60] @ 0x3c
|
|
10002672: 2a02 cmp r2, #2
|
|
10002674: d037 beq.n 100026e6 <_ntoa_format+0xec>
|
|
10002676: 2c1f cmp r4, #31
|
|
10002678: d80a bhi.n 10002690 <_ntoa_format+0x96>
|
|
1000267a: 2230 movs r2, #48 @ 0x30
|
|
1000267c: 552a strb r2, [r5, r4]
|
|
1000267e: 3401 adds r4, #1
|
|
10002680: 2c1f cmp r4, #31
|
|
10002682: d805 bhi.n 10002690 <_ntoa_format+0x96>
|
|
10002684: 464a mov r2, r9
|
|
10002686: 2a00 cmp r2, #0
|
|
10002688: d033 beq.n 100026f2 <_ntoa_format+0xf8>
|
|
1000268a: 222d movs r2, #45 @ 0x2d
|
|
1000268c: 552a strb r2, [r5, r4]
|
|
1000268e: 3401 adds r4, #1
|
|
10002690: 9603 str r6, [sp, #12]
|
|
10002692: 9302 str r3, [sp, #8]
|
|
10002694: 9401 str r4, [sp, #4]
|
|
10002696: 9500 str r5, [sp, #0]
|
|
10002698: 4643 mov r3, r8
|
|
1000269a: 4662 mov r2, ip
|
|
1000269c: f7ff ff56 bl 1000254c <_out_rev>
|
|
100026a0: b005 add sp, #20
|
|
100026a2: bcc0 pop {r6, r7}
|
|
100026a4: 46b9 mov r9, r7
|
|
100026a6: 46b0 mov r8, r6
|
|
100026a8: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100026aa: 1e62 subs r2, r4, #1
|
|
100026ac: 2c01 cmp r4, #1
|
|
100026ae: d010 beq.n 100026d2 <_ntoa_format+0xd8>
|
|
100026b0: 9f0f ldr r7, [sp, #60] @ 0x3c
|
|
100026b2: 2f10 cmp r7, #16
|
|
100026b4: d00b beq.n 100026ce <_ntoa_format+0xd4>
|
|
100026b6: 0014 movs r4, r2
|
|
100026b8: 9a0f ldr r2, [sp, #60] @ 0x3c
|
|
100026ba: 2a10 cmp r2, #16
|
|
100026bc: d1d8 bne.n 10002670 <_ntoa_format+0x76>
|
|
100026be: 06b2 lsls r2, r6, #26
|
|
100026c0: d5d6 bpl.n 10002670 <_ntoa_format+0x76>
|
|
100026c2: 2c1f cmp r4, #31
|
|
100026c4: d8d4 bhi.n 10002670 <_ntoa_format+0x76>
|
|
100026c6: 2258 movs r2, #88 @ 0x58
|
|
100026c8: 552a strb r2, [r5, r4]
|
|
100026ca: 3401 adds r4, #1
|
|
100026cc: e7d3 b.n 10002676 <_ntoa_format+0x7c>
|
|
100026ce: 3c02 subs r4, #2
|
|
100026d0: e7cb b.n 1000266a <_ntoa_format+0x70>
|
|
100026d2: 0014 movs r4, r2
|
|
100026d4: e7c9 b.n 1000266a <_ntoa_format+0x70>
|
|
100026d6: 06b2 lsls r2, r6, #26
|
|
100026d8: d4ee bmi.n 100026b8 <_ntoa_format+0xbe>
|
|
100026da: 2c1f cmp r4, #31
|
|
100026dc: d8ec bhi.n 100026b8 <_ntoa_format+0xbe>
|
|
100026de: 2278 movs r2, #120 @ 0x78
|
|
100026e0: 552a strb r2, [r5, r4]
|
|
100026e2: 3401 adds r4, #1
|
|
100026e4: e7c7 b.n 10002676 <_ntoa_format+0x7c>
|
|
100026e6: 2c1f cmp r4, #31
|
|
100026e8: d8d2 bhi.n 10002690 <_ntoa_format+0x96>
|
|
100026ea: 3260 adds r2, #96 @ 0x60
|
|
100026ec: 552a strb r2, [r5, r4]
|
|
100026ee: 3401 adds r4, #1
|
|
100026f0: e7c1 b.n 10002676 <_ntoa_format+0x7c>
|
|
100026f2: 0772 lsls r2, r6, #29
|
|
100026f4: d503 bpl.n 100026fe <_ntoa_format+0x104>
|
|
100026f6: 222b movs r2, #43 @ 0x2b
|
|
100026f8: 552a strb r2, [r5, r4]
|
|
100026fa: 3401 adds r4, #1
|
|
100026fc: e7c8 b.n 10002690 <_ntoa_format+0x96>
|
|
100026fe: 0732 lsls r2, r6, #28
|
|
10002700: d5c6 bpl.n 10002690 <_ntoa_format+0x96>
|
|
10002702: 2220 movs r2, #32
|
|
10002704: 552a strb r2, [r5, r4]
|
|
10002706: 3401 adds r4, #1
|
|
10002708: e7c2 b.n 10002690 <_ntoa_format+0x96>
|
|
|
|
1000270a <_ntoa_long>:
|
|
1000270a: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000270c: 46de mov lr, fp
|
|
1000270e: 4657 mov r7, sl
|
|
10002710: 464e mov r6, r9
|
|
10002712: 4645 mov r5, r8
|
|
10002714: b5e0 push {r5, r6, r7, lr}
|
|
10002716: b093 sub sp, #76 @ 0x4c
|
|
10002718: 4681 mov r9, r0
|
|
1000271a: 468a mov sl, r1
|
|
1000271c: 9208 str r2, [sp, #32]
|
|
1000271e: 9309 str r3, [sp, #36] @ 0x24
|
|
10002720: ab1c add r3, sp, #112 @ 0x70
|
|
10002722: cb10 ldmia r3!, {r4}
|
|
10002724: 781b ldrb r3, [r3, #0]
|
|
10002726: 469b mov fp, r3
|
|
10002728: 9d1e ldr r5, [sp, #120] @ 0x78
|
|
1000272a: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
1000272c: 4698 mov r8, r3
|
|
1000272e: 2c00 cmp r4, #0
|
|
10002730: d103 bne.n 1000273a <_ntoa_long+0x30>
|
|
10002732: 2310 movs r3, #16
|
|
10002734: 4642 mov r2, r8
|
|
10002736: 439a bics r2, r3
|
|
10002738: 4690 mov r8, r2
|
|
1000273a: 2380 movs r3, #128 @ 0x80
|
|
1000273c: 00db lsls r3, r3, #3
|
|
1000273e: 4646 mov r6, r8
|
|
10002740: 401e ands r6, r3
|
|
10002742: 4642 mov r2, r8
|
|
10002744: 421a tst r2, r3
|
|
10002746: d012 beq.n 1000276e <_ntoa_long+0x64>
|
|
10002748: 2c00 cmp r4, #0
|
|
1000274a: d022 beq.n 10002792 <_ntoa_long+0x88>
|
|
1000274c: 2600 movs r6, #0
|
|
1000274e: e00e b.n 1000276e <_ntoa_long+0x64>
|
|
10002750: 3330 adds r3, #48 @ 0x30
|
|
10002752: b2d9 uxtb r1, r3
|
|
10002754: 1c77 adds r7, r6, #1
|
|
10002756: ab0a add r3, sp, #40 @ 0x28
|
|
10002758: 5599 strb r1, [r3, r6]
|
|
1000275a: 0029 movs r1, r5
|
|
1000275c: 0020 movs r0, r4
|
|
1000275e: f001 f813 bl 10003788 <__wrap___aeabi_uidiv>
|
|
10002762: 42ac cmp r4, r5
|
|
10002764: d316 bcc.n 10002794 <_ntoa_long+0x8a>
|
|
10002766: 2f1f cmp r7, #31
|
|
10002768: d814 bhi.n 10002794 <_ntoa_long+0x8a>
|
|
1000276a: 003e movs r6, r7
|
|
1000276c: 0004 movs r4, r0
|
|
1000276e: 0029 movs r1, r5
|
|
10002770: 0020 movs r0, r4
|
|
10002772: f001 f809 bl 10003788 <__wrap___aeabi_uidiv>
|
|
10002776: b2cb uxtb r3, r1
|
|
10002778: 2b09 cmp r3, #9
|
|
1000277a: d9e9 bls.n 10002750 <_ntoa_long+0x46>
|
|
1000277c: 4642 mov r2, r8
|
|
1000277e: 0692 lsls r2, r2, #26
|
|
10002780: d505 bpl.n 1000278e <_ntoa_long+0x84>
|
|
10002782: 2141 movs r1, #65 @ 0x41
|
|
10002784: 18c9 adds r1, r1, r3
|
|
10002786: b2c9 uxtb r1, r1
|
|
10002788: 390a subs r1, #10
|
|
1000278a: b2c9 uxtb r1, r1
|
|
1000278c: e7e2 b.n 10002754 <_ntoa_long+0x4a>
|
|
1000278e: 2161 movs r1, #97 @ 0x61
|
|
10002790: e7f8 b.n 10002784 <_ntoa_long+0x7a>
|
|
10002792: 0027 movs r7, r4
|
|
10002794: 4643 mov r3, r8
|
|
10002796: 9306 str r3, [sp, #24]
|
|
10002798: 9b20 ldr r3, [sp, #128] @ 0x80
|
|
1000279a: 9305 str r3, [sp, #20]
|
|
1000279c: 9b1f ldr r3, [sp, #124] @ 0x7c
|
|
1000279e: 9304 str r3, [sp, #16]
|
|
100027a0: 9503 str r5, [sp, #12]
|
|
100027a2: 465b mov r3, fp
|
|
100027a4: 9302 str r3, [sp, #8]
|
|
100027a6: 9701 str r7, [sp, #4]
|
|
100027a8: ab0a add r3, sp, #40 @ 0x28
|
|
100027aa: 9300 str r3, [sp, #0]
|
|
100027ac: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
100027ae: 9a08 ldr r2, [sp, #32]
|
|
100027b0: 4651 mov r1, sl
|
|
100027b2: 4648 mov r0, r9
|
|
100027b4: f7ff ff21 bl 100025fa <_ntoa_format>
|
|
100027b8: b013 add sp, #76 @ 0x4c
|
|
100027ba: bcf0 pop {r4, r5, r6, r7}
|
|
100027bc: 46bb mov fp, r7
|
|
100027be: 46b2 mov sl, r6
|
|
100027c0: 46a9 mov r9, r5
|
|
100027c2: 46a0 mov r8, r4
|
|
100027c4: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100027c6 <_ntoa_long_long>:
|
|
100027c6: b5f0 push {r4, r5, r6, r7, lr}
|
|
100027c8: 46de mov lr, fp
|
|
100027ca: 4657 mov r7, sl
|
|
100027cc: 464e mov r6, r9
|
|
100027ce: 4645 mov r5, r8
|
|
100027d0: b5e0 push {r5, r6, r7, lr}
|
|
100027d2: b097 sub sp, #92 @ 0x5c
|
|
100027d4: 900a str r0, [sp, #40] @ 0x28
|
|
100027d6: 910b str r1, [sp, #44] @ 0x2c
|
|
100027d8: 920c str r2, [sp, #48] @ 0x30
|
|
100027da: 469a mov sl, r3
|
|
100027dc: 9b20 ldr r3, [sp, #128] @ 0x80
|
|
100027de: 4699 mov r9, r3
|
|
100027e0: 9f21 ldr r7, [sp, #132] @ 0x84
|
|
100027e2: aa22 add r2, sp, #136 @ 0x88
|
|
100027e4: 7813 ldrb r3, [r2, #0]
|
|
100027e6: 469b mov fp, r3
|
|
100027e8: 9b24 ldr r3, [sp, #144] @ 0x90
|
|
100027ea: 9309 str r3, [sp, #36] @ 0x24
|
|
100027ec: 9c25 ldr r4, [sp, #148] @ 0x94
|
|
100027ee: 9b28 ldr r3, [sp, #160] @ 0xa0
|
|
100027f0: 4698 mov r8, r3
|
|
100027f2: 464a mov r2, r9
|
|
100027f4: 433a orrs r2, r7
|
|
100027f6: d102 bne.n 100027fe <_ntoa_long_long+0x38>
|
|
100027f8: 3210 adds r2, #16
|
|
100027fa: 4393 bics r3, r2
|
|
100027fc: 4698 mov r8, r3
|
|
100027fe: 2280 movs r2, #128 @ 0x80
|
|
10002800: 00d2 lsls r2, r2, #3
|
|
10002802: 4645 mov r5, r8
|
|
10002804: 4015 ands r5, r2
|
|
10002806: 4643 mov r3, r8
|
|
10002808: 4213 tst r3, r2
|
|
1000280a: d00a beq.n 10002822 <_ntoa_long_long+0x5c>
|
|
1000280c: 464a mov r2, r9
|
|
1000280e: 433a orrs r2, r7
|
|
10002810: d041 beq.n 10002896 <_ntoa_long_long+0xd0>
|
|
10002812: 2500 movs r5, #0
|
|
10002814: 002e movs r6, r5
|
|
10002816: 4653 mov r3, sl
|
|
10002818: 930d str r3, [sp, #52] @ 0x34
|
|
1000281a: 464d mov r5, r9
|
|
1000281c: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
1000281e: 469a mov sl, r3
|
|
10002820: e01b b.n 1000285a <_ntoa_long_long+0x94>
|
|
10002822: 002e movs r6, r5
|
|
10002824: 4653 mov r3, sl
|
|
10002826: 930d str r3, [sp, #52] @ 0x34
|
|
10002828: 464d mov r5, r9
|
|
1000282a: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
1000282c: 469a mov sl, r3
|
|
1000282e: e014 b.n 1000285a <_ntoa_long_long+0x94>
|
|
10002830: 3330 adds r3, #48 @ 0x30
|
|
10002832: b2da uxtb r2, r3
|
|
10002834: 1c73 adds r3, r6, #1
|
|
10002836: 4699 mov r9, r3
|
|
10002838: ab0e add r3, sp, #56 @ 0x38
|
|
1000283a: 559a strb r2, [r3, r6]
|
|
1000283c: 4652 mov r2, sl
|
|
1000283e: 0023 movs r3, r4
|
|
10002840: 0028 movs r0, r5
|
|
10002842: 0039 movs r1, r7
|
|
10002844: f000 ffde bl 10003804 <__wrap___aeabi_uldivmod>
|
|
10002848: 42bc cmp r4, r7
|
|
1000284a: d826 bhi.n 1000289a <_ntoa_long_long+0xd4>
|
|
1000284c: d019 beq.n 10002882 <_ntoa_long_long+0xbc>
|
|
1000284e: 464b mov r3, r9
|
|
10002850: 2b1f cmp r3, #31
|
|
10002852: d81c bhi.n 1000288e <_ntoa_long_long+0xc8>
|
|
10002854: 464e mov r6, r9
|
|
10002856: 0005 movs r5, r0
|
|
10002858: 000f movs r7, r1
|
|
1000285a: 4652 mov r2, sl
|
|
1000285c: 0023 movs r3, r4
|
|
1000285e: 0028 movs r0, r5
|
|
10002860: 0039 movs r1, r7
|
|
10002862: f000 ffcf bl 10003804 <__wrap___aeabi_uldivmod>
|
|
10002866: b2d3 uxtb r3, r2
|
|
10002868: 2b09 cmp r3, #9
|
|
1000286a: d9e1 bls.n 10002830 <_ntoa_long_long+0x6a>
|
|
1000286c: 4642 mov r2, r8
|
|
1000286e: 0692 lsls r2, r2, #26
|
|
10002870: d505 bpl.n 1000287e <_ntoa_long_long+0xb8>
|
|
10002872: 2241 movs r2, #65 @ 0x41
|
|
10002874: 18d2 adds r2, r2, r3
|
|
10002876: b2d2 uxtb r2, r2
|
|
10002878: 3a0a subs r2, #10
|
|
1000287a: b2d2 uxtb r2, r2
|
|
1000287c: e7da b.n 10002834 <_ntoa_long_long+0x6e>
|
|
1000287e: 2261 movs r2, #97 @ 0x61
|
|
10002880: e7f8 b.n 10002874 <_ntoa_long_long+0xae>
|
|
10002882: 45aa cmp sl, r5
|
|
10002884: d9e3 bls.n 1000284e <_ntoa_long_long+0x88>
|
|
10002886: 464e mov r6, r9
|
|
10002888: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000288a: 469a mov sl, r3
|
|
1000288c: e008 b.n 100028a0 <_ntoa_long_long+0xda>
|
|
1000288e: 464e mov r6, r9
|
|
10002890: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10002892: 469a mov sl, r3
|
|
10002894: e004 b.n 100028a0 <_ntoa_long_long+0xda>
|
|
10002896: 2600 movs r6, #0
|
|
10002898: e002 b.n 100028a0 <_ntoa_long_long+0xda>
|
|
1000289a: 464e mov r6, r9
|
|
1000289c: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000289e: 469a mov sl, r3
|
|
100028a0: 4643 mov r3, r8
|
|
100028a2: 9306 str r3, [sp, #24]
|
|
100028a4: 9b27 ldr r3, [sp, #156] @ 0x9c
|
|
100028a6: 9305 str r3, [sp, #20]
|
|
100028a8: 9b26 ldr r3, [sp, #152] @ 0x98
|
|
100028aa: 9304 str r3, [sp, #16]
|
|
100028ac: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
100028ae: 9303 str r3, [sp, #12]
|
|
100028b0: 465b mov r3, fp
|
|
100028b2: 9302 str r3, [sp, #8]
|
|
100028b4: 9601 str r6, [sp, #4]
|
|
100028b6: ab0e add r3, sp, #56 @ 0x38
|
|
100028b8: 9300 str r3, [sp, #0]
|
|
100028ba: 4653 mov r3, sl
|
|
100028bc: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
100028be: 990b ldr r1, [sp, #44] @ 0x2c
|
|
100028c0: 980a ldr r0, [sp, #40] @ 0x28
|
|
100028c2: f7ff fe9a bl 100025fa <_ntoa_format>
|
|
100028c6: b017 add sp, #92 @ 0x5c
|
|
100028c8: bcf0 pop {r4, r5, r6, r7}
|
|
100028ca: 46bb mov fp, r7
|
|
100028cc: 46b2 mov sl, r6
|
|
100028ce: 46a9 mov r9, r5
|
|
100028d0: 46a0 mov r8, r4
|
|
100028d2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100028d4 <_etoa>:
|
|
100028d4: b5f0 push {r4, r5, r6, r7, lr}
|
|
100028d6: 46de mov lr, fp
|
|
100028d8: 4657 mov r7, sl
|
|
100028da: 464e mov r6, r9
|
|
100028dc: 4645 mov r5, r8
|
|
100028de: b5e0 push {r5, r6, r7, lr}
|
|
100028e0: b091 sub sp, #68 @ 0x44
|
|
100028e2: 4680 mov r8, r0
|
|
100028e4: 4689 mov r9, r1
|
|
100028e6: 920c str r2, [sp, #48] @ 0x30
|
|
100028e8: 469a mov sl, r3
|
|
100028ea: 9c1a ldr r4, [sp, #104] @ 0x68
|
|
100028ec: 9d1b ldr r5, [sp, #108] @ 0x6c
|
|
100028ee: 0022 movs r2, r4
|
|
100028f0: 002b movs r3, r5
|
|
100028f2: 0020 movs r0, r4
|
|
100028f4: 0029 movs r1, r5
|
|
100028f6: f001 fa10 bl 10003d1a <__wrap___aeabi_dcmpun>
|
|
100028fa: 2800 cmp r0, #0
|
|
100028fc: d000 beq.n 10002900 <_etoa+0x2c>
|
|
100028fe: e0ec b.n 10002ada <_etoa+0x206>
|
|
10002900: 2201 movs r2, #1
|
|
10002902: 4252 negs r2, r2
|
|
10002904: 4bd4 ldr r3, [pc, #848] @ (10002c58 <_etoa+0x384>)
|
|
10002906: 0020 movs r0, r4
|
|
10002908: 0029 movs r1, r5
|
|
1000290a: f001 fa01 bl 10003d10 <__wrap___aeabi_dcmpgt>
|
|
1000290e: 2800 cmp r0, #0
|
|
10002910: d000 beq.n 10002914 <_etoa+0x40>
|
|
10002912: e0e2 b.n 10002ada <_etoa+0x206>
|
|
10002914: 2201 movs r2, #1
|
|
10002916: 4252 negs r2, r2
|
|
10002918: 4bd0 ldr r3, [pc, #832] @ (10002c5c <_etoa+0x388>)
|
|
1000291a: 0020 movs r0, r4
|
|
1000291c: 0029 movs r1, r5
|
|
1000291e: f001 f9e1 bl 10003ce4 <__wrap___aeabi_dcmplt>
|
|
10002922: 2800 cmp r0, #0
|
|
10002924: d000 beq.n 10002928 <_etoa+0x54>
|
|
10002926: e0d8 b.n 10002ada <_etoa+0x206>
|
|
10002928: 2200 movs r2, #0
|
|
1000292a: 2300 movs r3, #0
|
|
1000292c: 0020 movs r0, r4
|
|
1000292e: 0029 movs r1, r5
|
|
10002930: f001 f9d8 bl 10003ce4 <__wrap___aeabi_dcmplt>
|
|
10002934: 2800 cmp r0, #0
|
|
10002936: d000 beq.n 1000293a <_etoa+0x66>
|
|
10002938: e0e4 b.n 10002b04 <_etoa+0x230>
|
|
1000293a: 9406 str r4, [sp, #24]
|
|
1000293c: 9507 str r5, [sp, #28]
|
|
1000293e: 2380 movs r3, #128 @ 0x80
|
|
10002940: 00db lsls r3, r3, #3
|
|
10002942: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002944: 401a ands r2, r3
|
|
10002946: 920d str r2, [sp, #52] @ 0x34
|
|
10002948: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
1000294a: 421a tst r2, r3
|
|
1000294c: d101 bne.n 10002952 <_etoa+0x7e>
|
|
1000294e: 2306 movs r3, #6
|
|
10002950: 931c str r3, [sp, #112] @ 0x70
|
|
10002952: 9806 ldr r0, [sp, #24]
|
|
10002954: 9907 ldr r1, [sp, #28]
|
|
10002956: 0002 movs r2, r0
|
|
10002958: 000b movs r3, r1
|
|
1000295a: 9208 str r2, [sp, #32]
|
|
1000295c: 9309 str r3, [sp, #36] @ 0x24
|
|
1000295e: 0003 movs r3, r0
|
|
10002960: 000a movs r2, r1
|
|
10002962: 4302 orrs r2, r0
|
|
10002964: d100 bne.n 10002968 <_etoa+0x94>
|
|
10002966: e0d9 b.n 10002b1c <_etoa+0x248>
|
|
10002968: 0d08 lsrs r0, r1, #20
|
|
1000296a: 0540 lsls r0, r0, #21
|
|
1000296c: 0d40 lsrs r0, r0, #21
|
|
1000296e: 4ebc ldr r6, [pc, #752] @ (10002c60 <_etoa+0x38c>)
|
|
10002970: 46b4 mov ip, r6
|
|
10002972: 4460 add r0, ip
|
|
10002974: 030a lsls r2, r1, #12
|
|
10002976: 0b12 lsrs r2, r2, #12
|
|
10002978: 001e movs r6, r3
|
|
1000297a: 4bba ldr r3, [pc, #744] @ (10002c64 <_etoa+0x390>)
|
|
1000297c: 4313 orrs r3, r2
|
|
1000297e: 001f movs r7, r3
|
|
10002980: f001 f9de bl 10003d40 <__wrap___aeabi_i2d>
|
|
10002984: 4ab8 ldr r2, [pc, #736] @ (10002c68 <_etoa+0x394>)
|
|
10002986: 4bb9 ldr r3, [pc, #740] @ (10002c6c <_etoa+0x398>)
|
|
10002988: f001 f969 bl 10003c5e <__wrap___aeabi_dmul>
|
|
1000298c: 4ab8 ldr r2, [pc, #736] @ (10002c70 <_etoa+0x39c>)
|
|
1000298e: 4bb9 ldr r3, [pc, #740] @ (10002c74 <_etoa+0x3a0>)
|
|
10002990: f001 f93e bl 10003c10 <__wrap___aeabi_dadd>
|
|
10002994: 9008 str r0, [sp, #32]
|
|
10002996: 9109 str r1, [sp, #36] @ 0x24
|
|
10002998: 2200 movs r2, #0
|
|
1000299a: 4bb7 ldr r3, [pc, #732] @ (10002c78 <_etoa+0x3a4>)
|
|
1000299c: 0030 movs r0, r6
|
|
1000299e: 0039 movs r1, r7
|
|
100029a0: f001 f92d bl 10003bfe <__wrap___aeabi_dsub>
|
|
100029a4: 4ab5 ldr r2, [pc, #724] @ (10002c7c <_etoa+0x3a8>)
|
|
100029a6: 4bb6 ldr r3, [pc, #728] @ (10002c80 <_etoa+0x3ac>)
|
|
100029a8: f001 f959 bl 10003c5e <__wrap___aeabi_dmul>
|
|
100029ac: 0002 movs r2, r0
|
|
100029ae: 000b movs r3, r1
|
|
100029b0: 9808 ldr r0, [sp, #32]
|
|
100029b2: 9909 ldr r1, [sp, #36] @ 0x24
|
|
100029b4: f001 f92c bl 10003c10 <__wrap___aeabi_dadd>
|
|
100029b8: f001 f9da bl 10003d70 <__wrap___aeabi_d2iz>
|
|
100029bc: 4683 mov fp, r0
|
|
100029be: f001 f9bf bl 10003d40 <__wrap___aeabi_i2d>
|
|
100029c2: 0006 movs r6, r0
|
|
100029c4: 000f movs r7, r1
|
|
100029c6: 4aaf ldr r2, [pc, #700] @ (10002c84 <_etoa+0x3b0>)
|
|
100029c8: 4baf ldr r3, [pc, #700] @ (10002c88 <_etoa+0x3b4>)
|
|
100029ca: f001 f948 bl 10003c5e <__wrap___aeabi_dmul>
|
|
100029ce: 2200 movs r2, #0
|
|
100029d0: 4bae ldr r3, [pc, #696] @ (10002c8c <_etoa+0x3b8>)
|
|
100029d2: f001 f91d bl 10003c10 <__wrap___aeabi_dadd>
|
|
100029d6: f001 f9cb bl 10003d70 <__wrap___aeabi_d2iz>
|
|
100029da: 9008 str r0, [sp, #32]
|
|
100029dc: 4aac ldr r2, [pc, #688] @ (10002c90 <_etoa+0x3bc>)
|
|
100029de: 4bad ldr r3, [pc, #692] @ (10002c94 <_etoa+0x3c0>)
|
|
100029e0: 0030 movs r0, r6
|
|
100029e2: 0039 movs r1, r7
|
|
100029e4: f001 f93b bl 10003c5e <__wrap___aeabi_dmul>
|
|
100029e8: 0006 movs r6, r0
|
|
100029ea: 000f movs r7, r1
|
|
100029ec: 9808 ldr r0, [sp, #32]
|
|
100029ee: f001 f9a7 bl 10003d40 <__wrap___aeabi_i2d>
|
|
100029f2: 4aa9 ldr r2, [pc, #676] @ (10002c98 <_etoa+0x3c4>)
|
|
100029f4: 4ba9 ldr r3, [pc, #676] @ (10002c9c <_etoa+0x3c8>)
|
|
100029f6: f001 f932 bl 10003c5e <__wrap___aeabi_dmul>
|
|
100029fa: 0002 movs r2, r0
|
|
100029fc: 000b movs r3, r1
|
|
100029fe: 0030 movs r0, r6
|
|
10002a00: 0039 movs r1, r7
|
|
10002a02: f001 f8fc bl 10003bfe <__wrap___aeabi_dsub>
|
|
10002a06: 0006 movs r6, r0
|
|
10002a08: 000f movs r7, r1
|
|
10002a0a: 0002 movs r2, r0
|
|
10002a0c: 000b movs r3, r1
|
|
10002a0e: f001 f926 bl 10003c5e <__wrap___aeabi_dmul>
|
|
10002a12: 900a str r0, [sp, #40] @ 0x28
|
|
10002a14: 910b str r1, [sp, #44] @ 0x2c
|
|
10002a16: 9b08 ldr r3, [sp, #32]
|
|
10002a18: 4aa1 ldr r2, [pc, #644] @ (10002ca0 <_etoa+0x3cc>)
|
|
10002a1a: 4694 mov ip, r2
|
|
10002a1c: 4463 add r3, ip
|
|
10002a1e: 2100 movs r1, #0
|
|
10002a20: 2200 movs r2, #0
|
|
10002a22: 9108 str r1, [sp, #32]
|
|
10002a24: 9209 str r2, [sp, #36] @ 0x24
|
|
10002a26: 051b lsls r3, r3, #20
|
|
10002a28: 9309 str r3, [sp, #36] @ 0x24
|
|
10002a2a: 2300 movs r3, #0
|
|
10002a2c: 9308 str r3, [sp, #32]
|
|
10002a2e: 0032 movs r2, r6
|
|
10002a30: 003b movs r3, r7
|
|
10002a32: 0030 movs r0, r6
|
|
10002a34: 0039 movs r1, r7
|
|
10002a36: f001 f8eb bl 10003c10 <__wrap___aeabi_dadd>
|
|
10002a3a: 900e str r0, [sp, #56] @ 0x38
|
|
10002a3c: 910f str r1, [sp, #60] @ 0x3c
|
|
10002a3e: 0032 movs r2, r6
|
|
10002a40: 003b movs r3, r7
|
|
10002a42: 2000 movs r0, #0
|
|
10002a44: 2180 movs r1, #128 @ 0x80
|
|
10002a46: 05c9 lsls r1, r1, #23
|
|
10002a48: f001 f8d9 bl 10003bfe <__wrap___aeabi_dsub>
|
|
10002a4c: 0006 movs r6, r0
|
|
10002a4e: 000f movs r7, r1
|
|
10002a50: 2200 movs r2, #0
|
|
10002a52: 4b94 ldr r3, [pc, #592] @ (10002ca4 <_etoa+0x3d0>)
|
|
10002a54: 980a ldr r0, [sp, #40] @ 0x28
|
|
10002a56: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002a58: f001 f8e3 bl 10003c22 <__wrap___aeabi_ddiv>
|
|
10002a5c: 2200 movs r2, #0
|
|
10002a5e: 4b92 ldr r3, [pc, #584] @ (10002ca8 <_etoa+0x3d4>)
|
|
10002a60: f001 f8d6 bl 10003c10 <__wrap___aeabi_dadd>
|
|
10002a64: 0002 movs r2, r0
|
|
10002a66: 000b movs r3, r1
|
|
10002a68: 980a ldr r0, [sp, #40] @ 0x28
|
|
10002a6a: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002a6c: f001 f8d9 bl 10003c22 <__wrap___aeabi_ddiv>
|
|
10002a70: 2200 movs r2, #0
|
|
10002a72: 4b8e ldr r3, [pc, #568] @ (10002cac <_etoa+0x3d8>)
|
|
10002a74: f001 f8cc bl 10003c10 <__wrap___aeabi_dadd>
|
|
10002a78: 0002 movs r2, r0
|
|
10002a7a: 000b movs r3, r1
|
|
10002a7c: 980a ldr r0, [sp, #40] @ 0x28
|
|
10002a7e: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002a80: f001 f8cf bl 10003c22 <__wrap___aeabi_ddiv>
|
|
10002a84: 0002 movs r2, r0
|
|
10002a86: 000b movs r3, r1
|
|
10002a88: 0030 movs r0, r6
|
|
10002a8a: 0039 movs r1, r7
|
|
10002a8c: f001 f8c0 bl 10003c10 <__wrap___aeabi_dadd>
|
|
10002a90: 0002 movs r2, r0
|
|
10002a92: 000b movs r3, r1
|
|
10002a94: 980e ldr r0, [sp, #56] @ 0x38
|
|
10002a96: 990f ldr r1, [sp, #60] @ 0x3c
|
|
10002a98: f001 f8c3 bl 10003c22 <__wrap___aeabi_ddiv>
|
|
10002a9c: 2200 movs r2, #0
|
|
10002a9e: 4b71 ldr r3, [pc, #452] @ (10002c64 <_etoa+0x390>)
|
|
10002aa0: f001 f8b6 bl 10003c10 <__wrap___aeabi_dadd>
|
|
10002aa4: 9a08 ldr r2, [sp, #32]
|
|
10002aa6: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002aa8: f001 f8d9 bl 10003c5e <__wrap___aeabi_dmul>
|
|
10002aac: 0006 movs r6, r0
|
|
10002aae: 000f movs r7, r1
|
|
10002ab0: 9608 str r6, [sp, #32]
|
|
10002ab2: 9709 str r7, [sp, #36] @ 0x24
|
|
10002ab4: 9a06 ldr r2, [sp, #24]
|
|
10002ab6: 9b07 ldr r3, [sp, #28]
|
|
10002ab8: f001 f92a bl 10003d10 <__wrap___aeabi_dcmpgt>
|
|
10002abc: 2800 cmp r0, #0
|
|
10002abe: d02f beq.n 10002b20 <_etoa+0x24c>
|
|
10002ac0: 2301 movs r3, #1
|
|
10002ac2: 425b negs r3, r3
|
|
10002ac4: 469c mov ip, r3
|
|
10002ac6: 44e3 add fp, ip
|
|
10002ac8: 2200 movs r2, #0
|
|
10002aca: 4b77 ldr r3, [pc, #476] @ (10002ca8 <_etoa+0x3d4>)
|
|
10002acc: 0030 movs r0, r6
|
|
10002ace: 0039 movs r1, r7
|
|
10002ad0: f001 f8a7 bl 10003c22 <__wrap___aeabi_ddiv>
|
|
10002ad4: 9008 str r0, [sp, #32]
|
|
10002ad6: 9109 str r1, [sp, #36] @ 0x24
|
|
10002ad8: e022 b.n 10002b20 <_etoa+0x24c>
|
|
10002ada: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002adc: 9304 str r3, [sp, #16]
|
|
10002ade: 9b1d ldr r3, [sp, #116] @ 0x74
|
|
10002ae0: 9303 str r3, [sp, #12]
|
|
10002ae2: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002ae4: 9302 str r3, [sp, #8]
|
|
10002ae6: 9400 str r4, [sp, #0]
|
|
10002ae8: 9501 str r5, [sp, #4]
|
|
10002aea: 4653 mov r3, sl
|
|
10002aec: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10002aee: 4649 mov r1, r9
|
|
10002af0: 4640 mov r0, r8
|
|
10002af2: f000 f8ff bl 10002cf4 <_ftoa>
|
|
10002af6: b011 add sp, #68 @ 0x44
|
|
10002af8: bcf0 pop {r4, r5, r6, r7}
|
|
10002afa: 46bb mov fp, r7
|
|
10002afc: 46b2 mov sl, r6
|
|
10002afe: 46a9 mov r9, r5
|
|
10002b00: 46a0 mov r8, r4
|
|
10002b02: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10002b04: 2100 movs r1, #0
|
|
10002b06: 2200 movs r2, #0
|
|
10002b08: 9106 str r1, [sp, #24]
|
|
10002b0a: 9207 str r2, [sp, #28]
|
|
10002b0c: 9406 str r4, [sp, #24]
|
|
10002b0e: 2380 movs r3, #128 @ 0x80
|
|
10002b10: 061b lsls r3, r3, #24
|
|
10002b12: 469c mov ip, r3
|
|
10002b14: 44ac add ip, r5
|
|
10002b16: 4663 mov r3, ip
|
|
10002b18: 9307 str r3, [sp, #28]
|
|
10002b1a: e710 b.n 1000293e <_etoa+0x6a>
|
|
10002b1c: 2300 movs r3, #0
|
|
10002b1e: 469b mov fp, r3
|
|
10002b20: 465b mov r3, fp
|
|
10002b22: 3363 adds r3, #99 @ 0x63
|
|
10002b24: 2bc6 cmp r3, #198 @ 0xc6
|
|
10002b26: d820 bhi.n 10002b6a <_etoa+0x296>
|
|
10002b28: 2604 movs r6, #4
|
|
10002b2a: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002b2c: 051b lsls r3, r3, #20
|
|
10002b2e: d528 bpl.n 10002b82 <_etoa+0x2ae>
|
|
10002b30: 9a08 ldr r2, [sp, #32]
|
|
10002b32: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002b34: 0019 movs r1, r3
|
|
10002b36: 4311 orrs r1, r2
|
|
10002b38: d00f beq.n 10002b5a <_etoa+0x286>
|
|
10002b3a: 4a5d ldr r2, [pc, #372] @ (10002cb0 <_etoa+0x3dc>)
|
|
10002b3c: 4b5d ldr r3, [pc, #372] @ (10002cb4 <_etoa+0x3e0>)
|
|
10002b3e: 9806 ldr r0, [sp, #24]
|
|
10002b40: 9907 ldr r1, [sp, #28]
|
|
10002b42: f001 f8dd bl 10003d00 <__wrap___aeabi_dcmpge>
|
|
10002b46: 2800 cmp r0, #0
|
|
10002b48: d07a beq.n 10002c40 <_etoa+0x36c>
|
|
10002b4a: 2200 movs r2, #0
|
|
10002b4c: 4b5a ldr r3, [pc, #360] @ (10002cb8 <_etoa+0x3e4>)
|
|
10002b4e: 9806 ldr r0, [sp, #24]
|
|
10002b50: 9907 ldr r1, [sp, #28]
|
|
10002b52: f001 f8c7 bl 10003ce4 <__wrap___aeabi_dcmplt>
|
|
10002b56: 2800 cmp r0, #0
|
|
10002b58: d072 beq.n 10002c40 <_etoa+0x36c>
|
|
10002b5a: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002b5c: 455b cmp r3, fp
|
|
10002b5e: dd06 ble.n 10002b6e <_etoa+0x29a>
|
|
10002b60: 465a mov r2, fp
|
|
10002b62: 1a9b subs r3, r3, r2
|
|
10002b64: 3b01 subs r3, #1
|
|
10002b66: 931c str r3, [sp, #112] @ 0x70
|
|
10002b68: e003 b.n 10002b72 <_etoa+0x29e>
|
|
10002b6a: 2605 movs r6, #5
|
|
10002b6c: e7dd b.n 10002b2a <_etoa+0x256>
|
|
10002b6e: 2300 movs r3, #0
|
|
10002b70: 931c str r3, [sp, #112] @ 0x70
|
|
10002b72: 2380 movs r3, #128 @ 0x80
|
|
10002b74: 00db lsls r3, r3, #3
|
|
10002b76: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002b78: 431a orrs r2, r3
|
|
10002b7a: 921e str r2, [sp, #120] @ 0x78
|
|
10002b7c: 2600 movs r6, #0
|
|
10002b7e: 2300 movs r3, #0
|
|
10002b80: 469b mov fp, r3
|
|
10002b82: 9b1d ldr r3, [sp, #116] @ 0x74
|
|
10002b84: 429e cmp r6, r3
|
|
10002b86: d265 bcs.n 10002c54 <_etoa+0x380>
|
|
10002b88: 1b9f subs r7, r3, r6
|
|
10002b8a: 2302 movs r3, #2
|
|
10002b8c: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002b8e: 401a ands r2, r3
|
|
10002b90: 920a str r2, [sp, #40] @ 0x28
|
|
10002b92: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002b94: 4213 tst r3, r2
|
|
10002b96: d002 beq.n 10002b9e <_etoa+0x2ca>
|
|
10002b98: 2e00 cmp r6, #0
|
|
10002b9a: d000 beq.n 10002b9e <_etoa+0x2ca>
|
|
10002b9c: 2700 movs r7, #0
|
|
10002b9e: 465b mov r3, fp
|
|
10002ba0: 2b00 cmp r3, #0
|
|
10002ba2: d007 beq.n 10002bb4 <_etoa+0x2e0>
|
|
10002ba4: 9a08 ldr r2, [sp, #32]
|
|
10002ba6: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002ba8: 9806 ldr r0, [sp, #24]
|
|
10002baa: 9907 ldr r1, [sp, #28]
|
|
10002bac: f001 f839 bl 10003c22 <__wrap___aeabi_ddiv>
|
|
10002bb0: 9006 str r0, [sp, #24]
|
|
10002bb2: 9107 str r1, [sp, #28]
|
|
10002bb4: 2200 movs r2, #0
|
|
10002bb6: 2300 movs r3, #0
|
|
10002bb8: 0020 movs r0, r4
|
|
10002bba: 0029 movs r1, r5
|
|
10002bbc: f001 f892 bl 10003ce4 <__wrap___aeabi_dcmplt>
|
|
10002bc0: 2800 cmp r0, #0
|
|
10002bc2: d000 beq.n 10002bc6 <_etoa+0x2f2>
|
|
10002bc4: e07c b.n 10002cc0 <_etoa+0x3ec>
|
|
10002bc6: 4b3d ldr r3, [pc, #244] @ (10002cbc <_etoa+0x3e8>)
|
|
10002bc8: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002bca: 4013 ands r3, r2
|
|
10002bcc: 9304 str r3, [sp, #16]
|
|
10002bce: 9703 str r7, [sp, #12]
|
|
10002bd0: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002bd2: 9302 str r3, [sp, #8]
|
|
10002bd4: 9b06 ldr r3, [sp, #24]
|
|
10002bd6: 9c07 ldr r4, [sp, #28]
|
|
10002bd8: 9300 str r3, [sp, #0]
|
|
10002bda: 9401 str r4, [sp, #4]
|
|
10002bdc: 4653 mov r3, sl
|
|
10002bde: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10002be0: 4649 mov r1, r9
|
|
10002be2: 4640 mov r0, r8
|
|
10002be4: f000 f886 bl 10002cf4 <_ftoa>
|
|
10002be8: 2e00 cmp r6, #0
|
|
10002bea: d100 bne.n 10002bee <_etoa+0x31a>
|
|
10002bec: e783 b.n 10002af6 <_etoa+0x222>
|
|
10002bee: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002bf0: 069b lsls r3, r3, #26
|
|
10002bf2: d571 bpl.n 10002cd8 <_etoa+0x404>
|
|
10002bf4: 2545 movs r5, #69 @ 0x45
|
|
10002bf6: 1c44 adds r4, r0, #1
|
|
10002bf8: 4653 mov r3, sl
|
|
10002bfa: 0002 movs r2, r0
|
|
10002bfc: 4649 mov r1, r9
|
|
10002bfe: 0028 movs r0, r5
|
|
10002c00: 47c0 blx r8
|
|
10002c02: 465a mov r2, fp
|
|
10002c04: 17d3 asrs r3, r2, #31
|
|
10002c06: 18d2 adds r2, r2, r3
|
|
10002c08: 405a eors r2, r3
|
|
10002c0a: 2305 movs r3, #5
|
|
10002c0c: 9305 str r3, [sp, #20]
|
|
10002c0e: 3e01 subs r6, #1
|
|
10002c10: 9604 str r6, [sp, #16]
|
|
10002c12: 2300 movs r3, #0
|
|
10002c14: 9303 str r3, [sp, #12]
|
|
10002c16: 330a adds r3, #10
|
|
10002c18: 9302 str r3, [sp, #8]
|
|
10002c1a: 465b mov r3, fp
|
|
10002c1c: 0fdb lsrs r3, r3, #31
|
|
10002c1e: 9301 str r3, [sp, #4]
|
|
10002c20: 9200 str r2, [sp, #0]
|
|
10002c22: 4653 mov r3, sl
|
|
10002c24: 0022 movs r2, r4
|
|
10002c26: 4649 mov r1, r9
|
|
10002c28: 4640 mov r0, r8
|
|
10002c2a: f7ff fd6e bl 1000270a <_ntoa_long>
|
|
10002c2e: 9b0a ldr r3, [sp, #40] @ 0x28
|
|
10002c30: 2b00 cmp r3, #0
|
|
10002c32: d100 bne.n 10002c36 <_etoa+0x362>
|
|
10002c34: e75f b.n 10002af6 <_etoa+0x222>
|
|
10002c36: 0002 movs r2, r0
|
|
10002c38: 4647 mov r7, r8
|
|
10002c3a: 9e0c ldr r6, [sp, #48] @ 0x30
|
|
10002c3c: 9d1d ldr r5, [sp, #116] @ 0x74
|
|
10002c3e: e053 b.n 10002ce8 <_etoa+0x414>
|
|
10002c40: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002c42: 2b00 cmp r3, #0
|
|
10002c44: d09d beq.n 10002b82 <_etoa+0x2ae>
|
|
10002c46: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10002c48: 2b00 cmp r3, #0
|
|
10002c4a: d09a beq.n 10002b82 <_etoa+0x2ae>
|
|
10002c4c: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002c4e: 3b01 subs r3, #1
|
|
10002c50: 931c str r3, [sp, #112] @ 0x70
|
|
10002c52: e796 b.n 10002b82 <_etoa+0x2ae>
|
|
10002c54: 2700 movs r7, #0
|
|
10002c56: e798 b.n 10002b8a <_etoa+0x2b6>
|
|
10002c58: 7fefffff .word 0x7fefffff
|
|
10002c5c: ffefffff .word 0xffefffff
|
|
10002c60: fffffc01 .word 0xfffffc01
|
|
10002c64: 3ff00000 .word 0x3ff00000
|
|
10002c68: 509f79fb .word 0x509f79fb
|
|
10002c6c: 3fd34413 .word 0x3fd34413
|
|
10002c70: 8b60c8b3 .word 0x8b60c8b3
|
|
10002c74: 3fc68a28 .word 0x3fc68a28
|
|
10002c78: 3ff80000 .word 0x3ff80000
|
|
10002c7c: 636f4361 .word 0x636f4361
|
|
10002c80: 3fd287a7 .word 0x3fd287a7
|
|
10002c84: 0979a371 .word 0x0979a371
|
|
10002c88: 400a934f .word 0x400a934f
|
|
10002c8c: 3fe00000 .word 0x3fe00000
|
|
10002c90: bbb55516 .word 0xbbb55516
|
|
10002c94: 40026bb1 .word 0x40026bb1
|
|
10002c98: fefa39ef .word 0xfefa39ef
|
|
10002c9c: 3fe62e42 .word 0x3fe62e42
|
|
10002ca0: 000003ff .word 0x000003ff
|
|
10002ca4: 402c0000 .word 0x402c0000
|
|
10002ca8: 40240000 .word 0x40240000
|
|
10002cac: 40180000 .word 0x40180000
|
|
10002cb0: eb1c432d .word 0xeb1c432d
|
|
10002cb4: 3f1a36e2 .word 0x3f1a36e2
|
|
10002cb8: 412e8480 .word 0x412e8480
|
|
10002cbc: fffff7ff .word 0xfffff7ff
|
|
10002cc0: 9c06 ldr r4, [sp, #24]
|
|
10002cc2: 9d07 ldr r5, [sp, #28]
|
|
10002cc4: 0022 movs r2, r4
|
|
10002cc6: 0029 movs r1, r5
|
|
10002cc8: 2080 movs r0, #128 @ 0x80
|
|
10002cca: 0600 lsls r0, r0, #24
|
|
10002ccc: 4684 mov ip, r0
|
|
10002cce: 4461 add r1, ip
|
|
10002cd0: 000b movs r3, r1
|
|
10002cd2: 9206 str r2, [sp, #24]
|
|
10002cd4: 9307 str r3, [sp, #28]
|
|
10002cd6: e776 b.n 10002bc6 <_etoa+0x2f2>
|
|
10002cd8: 2565 movs r5, #101 @ 0x65
|
|
10002cda: e78c b.n 10002bf6 <_etoa+0x322>
|
|
10002cdc: 1c54 adds r4, r2, #1
|
|
10002cde: 4653 mov r3, sl
|
|
10002ce0: 4649 mov r1, r9
|
|
10002ce2: 2020 movs r0, #32
|
|
10002ce4: 47b8 blx r7
|
|
10002ce6: 0022 movs r2, r4
|
|
10002ce8: 1b93 subs r3, r2, r6
|
|
10002cea: 42ab cmp r3, r5
|
|
10002cec: d3f6 bcc.n 10002cdc <_etoa+0x408>
|
|
10002cee: 0010 movs r0, r2
|
|
10002cf0: e701 b.n 10002af6 <_etoa+0x222>
|
|
10002cf2: 46c0 nop @ (mov r8, r8)
|
|
|
|
10002cf4 <_ftoa>:
|
|
10002cf4: b5f0 push {r4, r5, r6, r7, lr}
|
|
10002cf6: 46de mov lr, fp
|
|
10002cf8: 4657 mov r7, sl
|
|
10002cfa: 464e mov r6, r9
|
|
10002cfc: 4645 mov r5, r8
|
|
10002cfe: b5e0 push {r5, r6, r7, lr}
|
|
10002d00: b095 sub sp, #84 @ 0x54
|
|
10002d02: 9006 str r0, [sp, #24]
|
|
10002d04: 9107 str r1, [sp, #28]
|
|
10002d06: 4693 mov fp, r2
|
|
10002d08: 4699 mov r9, r3
|
|
10002d0a: 9f20 ldr r7, [sp, #128] @ 0x80
|
|
10002d0c: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002d0e: 9b1f ldr r3, [sp, #124] @ 0x7c
|
|
10002d10: 0010 movs r0, r2
|
|
10002d12: 0019 movs r1, r3
|
|
10002d14: f001 f801 bl 10003d1a <__wrap___aeabi_dcmpun>
|
|
10002d18: 2800 cmp r0, #0
|
|
10002d1a: d131 bne.n 10002d80 <_ftoa+0x8c>
|
|
10002d1c: 2201 movs r2, #1
|
|
10002d1e: 4252 negs r2, r2
|
|
10002d20: 4bbf ldr r3, [pc, #764] @ (10003020 <_ftoa+0x32c>)
|
|
10002d22: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002d24: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002d26: f000 ffdd bl 10003ce4 <__wrap___aeabi_dcmplt>
|
|
10002d2a: 2800 cmp r0, #0
|
|
10002d2c: d137 bne.n 10002d9e <_ftoa+0xaa>
|
|
10002d2e: 2201 movs r2, #1
|
|
10002d30: 4252 negs r2, r2
|
|
10002d32: 4bbc ldr r3, [pc, #752] @ (10003024 <_ftoa+0x330>)
|
|
10002d34: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002d36: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002d38: f000 ffea bl 10003d10 <__wrap___aeabi_dcmpgt>
|
|
10002d3c: 2800 cmp r0, #0
|
|
10002d3e: d13d bne.n 10002dbc <_ftoa+0xc8>
|
|
10002d40: 2200 movs r2, #0
|
|
10002d42: 4bb9 ldr r3, [pc, #740] @ (10003028 <_ftoa+0x334>)
|
|
10002d44: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002d46: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002d48: f000 ffe2 bl 10003d10 <__wrap___aeabi_dcmpgt>
|
|
10002d4c: 2800 cmp r0, #0
|
|
10002d4e: d150 bne.n 10002df2 <_ftoa+0xfe>
|
|
10002d50: 2200 movs r2, #0
|
|
10002d52: 4bb6 ldr r3, [pc, #728] @ (1000302c <_ftoa+0x338>)
|
|
10002d54: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002d56: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002d58: f000 ffc4 bl 10003ce4 <__wrap___aeabi_dcmplt>
|
|
10002d5c: 2800 cmp r0, #0
|
|
10002d5e: d148 bne.n 10002df2 <_ftoa+0xfe>
|
|
10002d60: 2200 movs r2, #0
|
|
10002d62: 2300 movs r3, #0
|
|
10002d64: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002d66: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002d68: f000 ffbc bl 10003ce4 <__wrap___aeabi_dcmplt>
|
|
10002d6c: 2800 cmp r0, #0
|
|
10002d6e: d150 bne.n 10002e12 <_ftoa+0x11e>
|
|
10002d70: 2300 movs r3, #0
|
|
10002d72: 4698 mov r8, r3
|
|
10002d74: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002d76: 055b lsls r3, r3, #21
|
|
10002d78: d400 bmi.n 10002d7c <_ftoa+0x88>
|
|
10002d7a: e0b6 b.n 10002eea <_ftoa+0x1f6>
|
|
10002d7c: 2400 movs r4, #0
|
|
10002d7e: e058 b.n 10002e32 <_ftoa+0x13e>
|
|
10002d80: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002d82: 9303 str r3, [sp, #12]
|
|
10002d84: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002d86: 9302 str r3, [sp, #8]
|
|
10002d88: 2303 movs r3, #3
|
|
10002d8a: 9301 str r3, [sp, #4]
|
|
10002d8c: 4ba8 ldr r3, [pc, #672] @ (10003030 <_ftoa+0x33c>)
|
|
10002d8e: 9300 str r3, [sp, #0]
|
|
10002d90: 464b mov r3, r9
|
|
10002d92: 465a mov r2, fp
|
|
10002d94: 9907 ldr r1, [sp, #28]
|
|
10002d96: 9806 ldr r0, [sp, #24]
|
|
10002d98: f7ff fbd8 bl 1000254c <_out_rev>
|
|
10002d9c: e10e b.n 10002fbc <_ftoa+0x2c8>
|
|
10002d9e: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002da0: 9303 str r3, [sp, #12]
|
|
10002da2: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002da4: 9302 str r3, [sp, #8]
|
|
10002da6: 2304 movs r3, #4
|
|
10002da8: 9301 str r3, [sp, #4]
|
|
10002daa: 4ba2 ldr r3, [pc, #648] @ (10003034 <_ftoa+0x340>)
|
|
10002dac: 9300 str r3, [sp, #0]
|
|
10002dae: 464b mov r3, r9
|
|
10002db0: 465a mov r2, fp
|
|
10002db2: 9907 ldr r1, [sp, #28]
|
|
10002db4: 9806 ldr r0, [sp, #24]
|
|
10002db6: f7ff fbc9 bl 1000254c <_out_rev>
|
|
10002dba: e0ff b.n 10002fbc <_ftoa+0x2c8>
|
|
10002dbc: 2304 movs r3, #4
|
|
10002dbe: 9a22 ldr r2, [sp, #136] @ 0x88
|
|
10002dc0: 401a ands r2, r3
|
|
10002dc2: 9922 ldr r1, [sp, #136] @ 0x88
|
|
10002dc4: 420b tst r3, r1
|
|
10002dc6: d010 beq.n 10002dea <_ftoa+0xf6>
|
|
10002dc8: 4b9b ldr r3, [pc, #620] @ (10003038 <_ftoa+0x344>)
|
|
10002dca: 2a00 cmp r2, #0
|
|
10002dcc: d00f beq.n 10002dee <_ftoa+0xfa>
|
|
10002dce: 2204 movs r2, #4
|
|
10002dd0: 9922 ldr r1, [sp, #136] @ 0x88
|
|
10002dd2: 9103 str r1, [sp, #12]
|
|
10002dd4: 9921 ldr r1, [sp, #132] @ 0x84
|
|
10002dd6: 9102 str r1, [sp, #8]
|
|
10002dd8: 9201 str r2, [sp, #4]
|
|
10002dda: 9300 str r3, [sp, #0]
|
|
10002ddc: 464b mov r3, r9
|
|
10002dde: 465a mov r2, fp
|
|
10002de0: 9907 ldr r1, [sp, #28]
|
|
10002de2: 9806 ldr r0, [sp, #24]
|
|
10002de4: f7ff fbb2 bl 1000254c <_out_rev>
|
|
10002de8: e0e8 b.n 10002fbc <_ftoa+0x2c8>
|
|
10002dea: 4b94 ldr r3, [pc, #592] @ (1000303c <_ftoa+0x348>)
|
|
10002dec: e7ed b.n 10002dca <_ftoa+0xd6>
|
|
10002dee: 2203 movs r2, #3
|
|
10002df0: e7ee b.n 10002dd0 <_ftoa+0xdc>
|
|
10002df2: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002df4: 9304 str r3, [sp, #16]
|
|
10002df6: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002df8: 9303 str r3, [sp, #12]
|
|
10002dfa: 9702 str r7, [sp, #8]
|
|
10002dfc: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002dfe: 9c1f ldr r4, [sp, #124] @ 0x7c
|
|
10002e00: 9300 str r3, [sp, #0]
|
|
10002e02: 9401 str r4, [sp, #4]
|
|
10002e04: 464b mov r3, r9
|
|
10002e06: 465a mov r2, fp
|
|
10002e08: 9907 ldr r1, [sp, #28]
|
|
10002e0a: 9806 ldr r0, [sp, #24]
|
|
10002e0c: f7ff fd62 bl 100028d4 <_etoa>
|
|
10002e10: e0d4 b.n 10002fbc <_ftoa+0x2c8>
|
|
10002e12: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002e14: 9b1f ldr r3, [sp, #124] @ 0x7c
|
|
10002e16: 2000 movs r0, #0
|
|
10002e18: 2100 movs r1, #0
|
|
10002e1a: f000 fef0 bl 10003bfe <__wrap___aeabi_dsub>
|
|
10002e1e: 901e str r0, [sp, #120] @ 0x78
|
|
10002e20: 911f str r1, [sp, #124] @ 0x7c
|
|
10002e22: 2301 movs r3, #1
|
|
10002e24: 4698 mov r8, r3
|
|
10002e26: e7a5 b.n 10002d74 <_ftoa+0x80>
|
|
10002e28: ab0c add r3, sp, #48 @ 0x30
|
|
10002e2a: 2230 movs r2, #48 @ 0x30
|
|
10002e2c: 551a strb r2, [r3, r4]
|
|
10002e2e: 3f01 subs r7, #1
|
|
10002e30: 3401 adds r4, #1
|
|
10002e32: 2c1f cmp r4, #31
|
|
10002e34: d801 bhi.n 10002e3a <_ftoa+0x146>
|
|
10002e36: 2f09 cmp r7, #9
|
|
10002e38: d8f6 bhi.n 10002e28 <_ftoa+0x134>
|
|
10002e3a: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002e3c: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002e3e: f000 ff97 bl 10003d70 <__wrap___aeabi_d2iz>
|
|
10002e42: 0005 movs r5, r0
|
|
10002e44: f000 ff7c bl 10003d40 <__wrap___aeabi_i2d>
|
|
10002e48: 0002 movs r2, r0
|
|
10002e4a: 000b movs r3, r1
|
|
10002e4c: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002e4e: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002e50: f000 fed5 bl 10003bfe <__wrap___aeabi_dsub>
|
|
10002e54: 4b7a ldr r3, [pc, #488] @ (10003040 <_ftoa+0x34c>)
|
|
10002e56: 00fa lsls r2, r7, #3
|
|
10002e58: 189b adds r3, r3, r2
|
|
10002e5a: 681a ldr r2, [r3, #0]
|
|
10002e5c: 685b ldr r3, [r3, #4]
|
|
10002e5e: 920a str r2, [sp, #40] @ 0x28
|
|
10002e60: 930b str r3, [sp, #44] @ 0x2c
|
|
10002e62: f000 fefc bl 10003c5e <__wrap___aeabi_dmul>
|
|
10002e66: 9008 str r0, [sp, #32]
|
|
10002e68: 9109 str r1, [sp, #36] @ 0x24
|
|
10002e6a: f000 ffa5 bl 10003db8 <__wrap___aeabi_d2uiz>
|
|
10002e6e: 0006 movs r6, r0
|
|
10002e70: f000 ff62 bl 10003d38 <__wrap___aeabi_ui2d>
|
|
10002e74: 0002 movs r2, r0
|
|
10002e76: 000b movs r3, r1
|
|
10002e78: 9808 ldr r0, [sp, #32]
|
|
10002e7a: 9909 ldr r1, [sp, #36] @ 0x24
|
|
10002e7c: f000 febf bl 10003bfe <__wrap___aeabi_dsub>
|
|
10002e80: 9008 str r0, [sp, #32]
|
|
10002e82: 9109 str r1, [sp, #36] @ 0x24
|
|
10002e84: 2200 movs r2, #0
|
|
10002e86: 4b6f ldr r3, [pc, #444] @ (10003044 <_ftoa+0x350>)
|
|
10002e88: f000 ff42 bl 10003d10 <__wrap___aeabi_dcmpgt>
|
|
10002e8c: 2800 cmp r0, #0
|
|
10002e8e: d02e beq.n 10002eee <_ftoa+0x1fa>
|
|
10002e90: 3601 adds r6, #1
|
|
10002e92: 0030 movs r0, r6
|
|
10002e94: f000 ff50 bl 10003d38 <__wrap___aeabi_ui2d>
|
|
10002e98: 0002 movs r2, r0
|
|
10002e9a: 000b movs r3, r1
|
|
10002e9c: 980a ldr r0, [sp, #40] @ 0x28
|
|
10002e9e: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002ea0: f000 ff26 bl 10003cf0 <__wrap___aeabi_dcmple>
|
|
10002ea4: 2800 cmp r0, #0
|
|
10002ea6: d001 beq.n 10002eac <_ftoa+0x1b8>
|
|
10002ea8: 3501 adds r5, #1
|
|
10002eaa: 2600 movs r6, #0
|
|
10002eac: 2f00 cmp r7, #0
|
|
10002eae: d12c bne.n 10002f0a <_ftoa+0x216>
|
|
10002eb0: 0028 movs r0, r5
|
|
10002eb2: f000 ff45 bl 10003d40 <__wrap___aeabi_i2d>
|
|
10002eb6: 0002 movs r2, r0
|
|
10002eb8: 000b movs r3, r1
|
|
10002eba: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002ebc: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002ebe: f000 fe9e bl 10003bfe <__wrap___aeabi_dsub>
|
|
10002ec2: 0006 movs r6, r0
|
|
10002ec4: 000f movs r7, r1
|
|
10002ec6: 2200 movs r2, #0
|
|
10002ec8: 4b5e ldr r3, [pc, #376] @ (10003044 <_ftoa+0x350>)
|
|
10002eca: f000 ff0b bl 10003ce4 <__wrap___aeabi_dcmplt>
|
|
10002ece: 2800 cmp r0, #0
|
|
10002ed0: d146 bne.n 10002f60 <_ftoa+0x26c>
|
|
10002ed2: 2200 movs r2, #0
|
|
10002ed4: 4b5b ldr r3, [pc, #364] @ (10003044 <_ftoa+0x350>)
|
|
10002ed6: 0030 movs r0, r6
|
|
10002ed8: 0039 movs r1, r7
|
|
10002eda: f000 ff19 bl 10003d10 <__wrap___aeabi_dcmpgt>
|
|
10002ede: 2800 cmp r0, #0
|
|
10002ee0: d13e bne.n 10002f60 <_ftoa+0x26c>
|
|
10002ee2: 07eb lsls r3, r5, #31
|
|
10002ee4: d53c bpl.n 10002f60 <_ftoa+0x26c>
|
|
10002ee6: 3501 adds r5, #1
|
|
10002ee8: e03a b.n 10002f60 <_ftoa+0x26c>
|
|
10002eea: 2706 movs r7, #6
|
|
10002eec: e746 b.n 10002d7c <_ftoa+0x88>
|
|
10002eee: 2200 movs r2, #0
|
|
10002ef0: 4b54 ldr r3, [pc, #336] @ (10003044 <_ftoa+0x350>)
|
|
10002ef2: 9808 ldr r0, [sp, #32]
|
|
10002ef4: 9909 ldr r1, [sp, #36] @ 0x24
|
|
10002ef6: f000 fef5 bl 10003ce4 <__wrap___aeabi_dcmplt>
|
|
10002efa: 2800 cmp r0, #0
|
|
10002efc: d1d6 bne.n 10002eac <_ftoa+0x1b8>
|
|
10002efe: 2e00 cmp r6, #0
|
|
10002f00: d001 beq.n 10002f06 <_ftoa+0x212>
|
|
10002f02: 07f3 lsls r3, r6, #31
|
|
10002f04: d5d2 bpl.n 10002eac <_ftoa+0x1b8>
|
|
10002f06: 3601 adds r6, #1
|
|
10002f08: e7d0 b.n 10002eac <_ftoa+0x1b8>
|
|
10002f0a: 46aa mov sl, r5
|
|
10002f0c: 2c1f cmp r4, #31
|
|
10002f0e: d811 bhi.n 10002f34 <_ftoa+0x240>
|
|
10002f10: 3f01 subs r7, #1
|
|
10002f12: 210a movs r1, #10
|
|
10002f14: 0030 movs r0, r6
|
|
10002f16: f000 fc37 bl 10003788 <__wrap___aeabi_uidiv>
|
|
10002f1a: 1c65 adds r5, r4, #1
|
|
10002f1c: 3130 adds r1, #48 @ 0x30
|
|
10002f1e: ab0c add r3, sp, #48 @ 0x30
|
|
10002f20: 5519 strb r1, [r3, r4]
|
|
10002f22: 210a movs r1, #10
|
|
10002f24: 0030 movs r0, r6
|
|
10002f26: f000 fc2f bl 10003788 <__wrap___aeabi_uidiv>
|
|
10002f2a: 2e09 cmp r6, #9
|
|
10002f2c: d90e bls.n 10002f4c <_ftoa+0x258>
|
|
10002f2e: 0006 movs r6, r0
|
|
10002f30: 002c movs r4, r5
|
|
10002f32: e7eb b.n 10002f0c <_ftoa+0x218>
|
|
10002f34: 4655 mov r5, sl
|
|
10002f36: 2c1f cmp r4, #31
|
|
10002f38: d80c bhi.n 10002f54 <_ftoa+0x260>
|
|
10002f3a: 1e7b subs r3, r7, #1
|
|
10002f3c: 2f00 cmp r7, #0
|
|
10002f3e: d009 beq.n 10002f54 <_ftoa+0x260>
|
|
10002f40: aa0c add r2, sp, #48 @ 0x30
|
|
10002f42: 2130 movs r1, #48 @ 0x30
|
|
10002f44: 5511 strb r1, [r2, r4]
|
|
10002f46: 001f movs r7, r3
|
|
10002f48: 3401 adds r4, #1
|
|
10002f4a: e7f4 b.n 10002f36 <_ftoa+0x242>
|
|
10002f4c: 002b movs r3, r5
|
|
10002f4e: 4655 mov r5, sl
|
|
10002f50: 001c movs r4, r3
|
|
10002f52: e7f0 b.n 10002f36 <_ftoa+0x242>
|
|
10002f54: 2c1f cmp r4, #31
|
|
10002f56: d803 bhi.n 10002f60 <_ftoa+0x26c>
|
|
10002f58: ab0c add r3, sp, #48 @ 0x30
|
|
10002f5a: 222e movs r2, #46 @ 0x2e
|
|
10002f5c: 551a strb r2, [r3, r4]
|
|
10002f5e: 3401 adds r4, #1
|
|
10002f60: 2c1f cmp r4, #31
|
|
10002f62: d810 bhi.n 10002f86 <_ftoa+0x292>
|
|
10002f64: 210a movs r1, #10
|
|
10002f66: 0028 movs r0, r5
|
|
10002f68: f000 fbe6 bl 10003738 <__wrap___aeabi_idiv>
|
|
10002f6c: 1c66 adds r6, r4, #1
|
|
10002f6e: 3130 adds r1, #48 @ 0x30
|
|
10002f70: ab0c add r3, sp, #48 @ 0x30
|
|
10002f72: 5519 strb r1, [r3, r4]
|
|
10002f74: 210a movs r1, #10
|
|
10002f76: 0028 movs r0, r5
|
|
10002f78: f000 fbde bl 10003738 <__wrap___aeabi_idiv>
|
|
10002f7c: 1e05 subs r5, r0, #0
|
|
10002f7e: d001 beq.n 10002f84 <_ftoa+0x290>
|
|
10002f80: 0034 movs r4, r6
|
|
10002f82: e7ed b.n 10002f60 <_ftoa+0x26c>
|
|
10002f84: 0034 movs r4, r6
|
|
10002f86: 2303 movs r3, #3
|
|
10002f88: 9a22 ldr r2, [sp, #136] @ 0x88
|
|
10002f8a: 4013 ands r3, r2
|
|
10002f8c: 2b01 cmp r3, #1
|
|
10002f8e: d01c beq.n 10002fca <_ftoa+0x2d6>
|
|
10002f90: 2c1f cmp r4, #31
|
|
10002f92: d806 bhi.n 10002fa2 <_ftoa+0x2ae>
|
|
10002f94: 4643 mov r3, r8
|
|
10002f96: 2b00 cmp r3, #0
|
|
10002f98: d032 beq.n 10003000 <_ftoa+0x30c>
|
|
10002f9a: ab0c add r3, sp, #48 @ 0x30
|
|
10002f9c: 222d movs r2, #45 @ 0x2d
|
|
10002f9e: 551a strb r2, [r3, r4]
|
|
10002fa0: 3401 adds r4, #1
|
|
10002fa2: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002fa4: 9303 str r3, [sp, #12]
|
|
10002fa6: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002fa8: 9302 str r3, [sp, #8]
|
|
10002faa: 9401 str r4, [sp, #4]
|
|
10002fac: ab0c add r3, sp, #48 @ 0x30
|
|
10002fae: 9300 str r3, [sp, #0]
|
|
10002fb0: 464b mov r3, r9
|
|
10002fb2: 465a mov r2, fp
|
|
10002fb4: 9907 ldr r1, [sp, #28]
|
|
10002fb6: 9806 ldr r0, [sp, #24]
|
|
10002fb8: f7ff fac8 bl 1000254c <_out_rev>
|
|
10002fbc: b015 add sp, #84 @ 0x54
|
|
10002fbe: bcf0 pop {r4, r5, r6, r7}
|
|
10002fc0: 46bb mov fp, r7
|
|
10002fc2: 46b2 mov sl, r6
|
|
10002fc4: 46a9 mov r9, r5
|
|
10002fc6: 46a0 mov r8, r4
|
|
10002fc8: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10002fca: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002fcc: 2b00 cmp r3, #0
|
|
10002fce: d013 beq.n 10002ff8 <_ftoa+0x304>
|
|
10002fd0: 4643 mov r3, r8
|
|
10002fd2: 2b00 cmp r3, #0
|
|
10002fd4: d102 bne.n 10002fdc <_ftoa+0x2e8>
|
|
10002fd6: 330c adds r3, #12
|
|
10002fd8: 4213 tst r3, r2
|
|
10002fda: d00f beq.n 10002ffc <_ftoa+0x308>
|
|
10002fdc: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002fde: 3b01 subs r3, #1
|
|
10002fe0: 9321 str r3, [sp, #132] @ 0x84
|
|
10002fe2: 0019 movs r1, r3
|
|
10002fe4: e003 b.n 10002fee <_ftoa+0x2fa>
|
|
10002fe6: ab0c add r3, sp, #48 @ 0x30
|
|
10002fe8: 2230 movs r2, #48 @ 0x30
|
|
10002fea: 551a strb r2, [r3, r4]
|
|
10002fec: 3401 adds r4, #1
|
|
10002fee: 428c cmp r4, r1
|
|
10002ff0: d2ce bcs.n 10002f90 <_ftoa+0x29c>
|
|
10002ff2: 2c1f cmp r4, #31
|
|
10002ff4: d9f7 bls.n 10002fe6 <_ftoa+0x2f2>
|
|
10002ff6: e7cb b.n 10002f90 <_ftoa+0x29c>
|
|
10002ff8: 9921 ldr r1, [sp, #132] @ 0x84
|
|
10002ffa: e7f8 b.n 10002fee <_ftoa+0x2fa>
|
|
10002ffc: 9921 ldr r1, [sp, #132] @ 0x84
|
|
10002ffe: e7f6 b.n 10002fee <_ftoa+0x2fa>
|
|
10003000: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10003002: 075b lsls r3, r3, #29
|
|
10003004: d504 bpl.n 10003010 <_ftoa+0x31c>
|
|
10003006: ab0c add r3, sp, #48 @ 0x30
|
|
10003008: 222b movs r2, #43 @ 0x2b
|
|
1000300a: 551a strb r2, [r3, r4]
|
|
1000300c: 3401 adds r4, #1
|
|
1000300e: e7c8 b.n 10002fa2 <_ftoa+0x2ae>
|
|
10003010: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10003012: 071b lsls r3, r3, #28
|
|
10003014: d5c5 bpl.n 10002fa2 <_ftoa+0x2ae>
|
|
10003016: ab0c add r3, sp, #48 @ 0x30
|
|
10003018: 2220 movs r2, #32
|
|
1000301a: 551a strb r2, [r3, r4]
|
|
1000301c: 3401 adds r4, #1
|
|
1000301e: e7c0 b.n 10002fa2 <_ftoa+0x2ae>
|
|
10003020: ffefffff .word 0xffefffff
|
|
10003024: 7fefffff .word 0x7fefffff
|
|
10003028: 41cdcd65 .word 0x41cdcd65
|
|
1000302c: c1cdcd65 .word 0xc1cdcd65
|
|
10003030: 10006404 .word 0x10006404
|
|
10003034: 10006408 .word 0x10006408
|
|
10003038: 100063f8 .word 0x100063f8
|
|
1000303c: 10006400 .word 0x10006400
|
|
10003040: 100065b0 .word 0x100065b0
|
|
10003044: 3fe00000 .word 0x3fe00000
|
|
|
|
10003048 <_vsnprintf>:
|
|
10003048: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000304a: 46de mov lr, fp
|
|
1000304c: 4657 mov r7, sl
|
|
1000304e: 464e mov r6, r9
|
|
10003050: 4645 mov r5, r8
|
|
10003052: b5e0 push {r5, r6, r7, lr}
|
|
10003054: b093 sub sp, #76 @ 0x4c
|
|
10003056: 4682 mov sl, r0
|
|
10003058: 4688 mov r8, r1
|
|
1000305a: 4693 mov fp, r2
|
|
1000305c: 9311 str r3, [sp, #68] @ 0x44
|
|
1000305e: 2900 cmp r1, #0
|
|
10003060: d100 bne.n 10003064 <_vsnprintf+0x1c>
|
|
10003062: e30d b.n 10003680 <_vsnprintf+0x638>
|
|
10003064: 2500 movs r5, #0
|
|
10003066: 4656 mov r6, sl
|
|
10003068: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
1000306a: 7818 ldrb r0, [r3, #0]
|
|
1000306c: 2800 cmp r0, #0
|
|
1000306e: d100 bne.n 10003072 <_vsnprintf+0x2a>
|
|
10003070: e309 b.n 10003686 <_vsnprintf+0x63e>
|
|
10003072: 2825 cmp r0, #37 @ 0x25
|
|
10003074: d009 beq.n 1000308a <_vsnprintf+0x42>
|
|
10003076: 1c6c adds r4, r5, #1
|
|
10003078: 465b mov r3, fp
|
|
1000307a: 002a movs r2, r5
|
|
1000307c: 4641 mov r1, r8
|
|
1000307e: 47b0 blx r6
|
|
10003080: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003082: 3301 adds r3, #1
|
|
10003084: 9311 str r3, [sp, #68] @ 0x44
|
|
10003086: 0025 movs r5, r4
|
|
10003088: e7ee b.n 10003068 <_vsnprintf+0x20>
|
|
1000308a: 3301 adds r3, #1
|
|
1000308c: 9311 str r3, [sp, #68] @ 0x44
|
|
1000308e: 2700 movs r7, #0
|
|
10003090: e020 b.n 100030d4 <_vsnprintf+0x8c>
|
|
10003092: 2301 movs r3, #1
|
|
10003094: 431f orrs r7, r3
|
|
10003096: 3201 adds r2, #1
|
|
10003098: 9211 str r2, [sp, #68] @ 0x44
|
|
1000309a: 2401 movs r4, #1
|
|
1000309c: e018 b.n 100030d0 <_vsnprintf+0x88>
|
|
1000309e: 2302 movs r3, #2
|
|
100030a0: 431f orrs r7, r3
|
|
100030a2: 3201 adds r2, #1
|
|
100030a4: 9211 str r2, [sp, #68] @ 0x44
|
|
100030a6: 2401 movs r4, #1
|
|
100030a8: e012 b.n 100030d0 <_vsnprintf+0x88>
|
|
100030aa: 2304 movs r3, #4
|
|
100030ac: 431f orrs r7, r3
|
|
100030ae: 3201 adds r2, #1
|
|
100030b0: 9211 str r2, [sp, #68] @ 0x44
|
|
100030b2: 2401 movs r4, #1
|
|
100030b4: e00c b.n 100030d0 <_vsnprintf+0x88>
|
|
100030b6: 2308 movs r3, #8
|
|
100030b8: 431f orrs r7, r3
|
|
100030ba: 3201 adds r2, #1
|
|
100030bc: 9211 str r2, [sp, #68] @ 0x44
|
|
100030be: 2401 movs r4, #1
|
|
100030c0: e006 b.n 100030d0 <_vsnprintf+0x88>
|
|
100030c2: 2310 movs r3, #16
|
|
100030c4: 431f orrs r7, r3
|
|
100030c6: 3201 adds r2, #1
|
|
100030c8: 9211 str r2, [sp, #68] @ 0x44
|
|
100030ca: 2401 movs r4, #1
|
|
100030cc: e000 b.n 100030d0 <_vsnprintf+0x88>
|
|
100030ce: 2400 movs r4, #0
|
|
100030d0: 2c00 cmp r4, #0
|
|
100030d2: d009 beq.n 100030e8 <_vsnprintf+0xa0>
|
|
100030d4: 9a11 ldr r2, [sp, #68] @ 0x44
|
|
100030d6: 7813 ldrb r3, [r2, #0]
|
|
100030d8: 3b20 subs r3, #32
|
|
100030da: b2d9 uxtb r1, r3
|
|
100030dc: 2910 cmp r1, #16
|
|
100030de: d8f6 bhi.n 100030ce <_vsnprintf+0x86>
|
|
100030e0: 008b lsls r3, r1, #2
|
|
100030e2: 49c8 ldr r1, [pc, #800] @ (10003404 <_vsnprintf+0x3bc>)
|
|
100030e4: 58cb ldr r3, [r1, r3]
|
|
100030e6: 469f mov pc, r3
|
|
100030e8: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100030ea: 781a ldrb r2, [r3, #0]
|
|
100030ec: 0013 movs r3, r2
|
|
100030ee: 3b30 subs r3, #48 @ 0x30
|
|
100030f0: b2db uxtb r3, r3
|
|
100030f2: 2b09 cmp r3, #9
|
|
100030f4: d910 bls.n 10003118 <_vsnprintf+0xd0>
|
|
100030f6: 2a2a cmp r2, #42 @ 0x2a
|
|
100030f8: d013 beq.n 10003122 <_vsnprintf+0xda>
|
|
100030fa: 940b str r4, [sp, #44] @ 0x2c
|
|
100030fc: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100030fe: 781a ldrb r2, [r3, #0]
|
|
10003100: 2a2e cmp r2, #46 @ 0x2e
|
|
10003102: d01e beq.n 10003142 <_vsnprintf+0xfa>
|
|
10003104: 9a11 ldr r2, [sp, #68] @ 0x44
|
|
10003106: 7813 ldrb r3, [r2, #0]
|
|
10003108: 3b68 subs r3, #104 @ 0x68
|
|
1000310a: b2d9 uxtb r1, r3
|
|
1000310c: 2912 cmp r1, #18
|
|
1000310e: d859 bhi.n 100031c4 <_vsnprintf+0x17c>
|
|
10003110: 008b lsls r3, r1, #2
|
|
10003112: 49bd ldr r1, [pc, #756] @ (10003408 <_vsnprintf+0x3c0>)
|
|
10003114: 58cb ldr r3, [r1, r3]
|
|
10003116: 469f mov pc, r3
|
|
10003118: a811 add r0, sp, #68 @ 0x44
|
|
1000311a: f7ff fa05 bl 10002528 <_atoi>
|
|
1000311e: 900b str r0, [sp, #44] @ 0x2c
|
|
10003120: e7ec b.n 100030fc <_vsnprintf+0xb4>
|
|
10003122: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10003124: 1d1a adds r2, r3, #4
|
|
10003126: 921c str r2, [sp, #112] @ 0x70
|
|
10003128: 681b ldr r3, [r3, #0]
|
|
1000312a: 2b00 cmp r3, #0
|
|
1000312c: db04 blt.n 10003138 <_vsnprintf+0xf0>
|
|
1000312e: 930b str r3, [sp, #44] @ 0x2c
|
|
10003130: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003132: 3301 adds r3, #1
|
|
10003134: 9311 str r3, [sp, #68] @ 0x44
|
|
10003136: e7e1 b.n 100030fc <_vsnprintf+0xb4>
|
|
10003138: 2202 movs r2, #2
|
|
1000313a: 4317 orrs r7, r2
|
|
1000313c: 425b negs r3, r3
|
|
1000313e: 930b str r3, [sp, #44] @ 0x2c
|
|
10003140: e7f6 b.n 10003130 <_vsnprintf+0xe8>
|
|
10003142: 2280 movs r2, #128 @ 0x80
|
|
10003144: 00d2 lsls r2, r2, #3
|
|
10003146: 4317 orrs r7, r2
|
|
10003148: 1c5a adds r2, r3, #1
|
|
1000314a: 9211 str r2, [sp, #68] @ 0x44
|
|
1000314c: 785a ldrb r2, [r3, #1]
|
|
1000314e: 0013 movs r3, r2
|
|
10003150: 3b30 subs r3, #48 @ 0x30
|
|
10003152: b2db uxtb r3, r3
|
|
10003154: 2b09 cmp r3, #9
|
|
10003156: d90b bls.n 10003170 <_vsnprintf+0x128>
|
|
10003158: 2a2a cmp r2, #42 @ 0x2a
|
|
1000315a: d1d3 bne.n 10003104 <_vsnprintf+0xbc>
|
|
1000315c: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
1000315e: 1d1a adds r2, r3, #4
|
|
10003160: 921c str r2, [sp, #112] @ 0x70
|
|
10003162: 681c ldr r4, [r3, #0]
|
|
10003164: 2c00 cmp r4, #0
|
|
10003166: db08 blt.n 1000317a <_vsnprintf+0x132>
|
|
10003168: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
1000316a: 3301 adds r3, #1
|
|
1000316c: 9311 str r3, [sp, #68] @ 0x44
|
|
1000316e: e7c9 b.n 10003104 <_vsnprintf+0xbc>
|
|
10003170: a811 add r0, sp, #68 @ 0x44
|
|
10003172: f7ff f9d9 bl 10002528 <_atoi>
|
|
10003176: 0004 movs r4, r0
|
|
10003178: e7c4 b.n 10003104 <_vsnprintf+0xbc>
|
|
1000317a: 2400 movs r4, #0
|
|
1000317c: e7f4 b.n 10003168 <_vsnprintf+0x120>
|
|
1000317e: 2380 movs r3, #128 @ 0x80
|
|
10003180: 005b lsls r3, r3, #1
|
|
10003182: 433b orrs r3, r7
|
|
10003184: 1c51 adds r1, r2, #1
|
|
10003186: 9111 str r1, [sp, #68] @ 0x44
|
|
10003188: 7851 ldrb r1, [r2, #1]
|
|
1000318a: 296c cmp r1, #108 @ 0x6c
|
|
1000318c: d001 beq.n 10003192 <_vsnprintf+0x14a>
|
|
1000318e: 001f movs r7, r3
|
|
10003190: e018 b.n 100031c4 <_vsnprintf+0x17c>
|
|
10003192: 23c0 movs r3, #192 @ 0xc0
|
|
10003194: 009b lsls r3, r3, #2
|
|
10003196: 431f orrs r7, r3
|
|
10003198: 3202 adds r2, #2
|
|
1000319a: 9211 str r2, [sp, #68] @ 0x44
|
|
1000319c: e012 b.n 100031c4 <_vsnprintf+0x17c>
|
|
1000319e: 2380 movs r3, #128 @ 0x80
|
|
100031a0: 433b orrs r3, r7
|
|
100031a2: 1c51 adds r1, r2, #1
|
|
100031a4: 9111 str r1, [sp, #68] @ 0x44
|
|
100031a6: 7851 ldrb r1, [r2, #1]
|
|
100031a8: 2968 cmp r1, #104 @ 0x68
|
|
100031aa: d001 beq.n 100031b0 <_vsnprintf+0x168>
|
|
100031ac: 001f movs r7, r3
|
|
100031ae: e009 b.n 100031c4 <_vsnprintf+0x17c>
|
|
100031b0: 23c0 movs r3, #192 @ 0xc0
|
|
100031b2: 431f orrs r7, r3
|
|
100031b4: 3202 adds r2, #2
|
|
100031b6: 9211 str r2, [sp, #68] @ 0x44
|
|
100031b8: e004 b.n 100031c4 <_vsnprintf+0x17c>
|
|
100031ba: 2380 movs r3, #128 @ 0x80
|
|
100031bc: 005b lsls r3, r3, #1
|
|
100031be: 431f orrs r7, r3
|
|
100031c0: 3201 adds r2, #1
|
|
100031c2: 9211 str r2, [sp, #68] @ 0x44
|
|
100031c4: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100031c6: 7818 ldrb r0, [r3, #0]
|
|
100031c8: 2867 cmp r0, #103 @ 0x67
|
|
100031ca: d818 bhi.n 100031fe <_vsnprintf+0x1b6>
|
|
100031cc: 2825 cmp r0, #37 @ 0x25
|
|
100031ce: d200 bcs.n 100031d2 <_vsnprintf+0x18a>
|
|
100031d0: e24c b.n 1000366c <_vsnprintf+0x624>
|
|
100031d2: 0003 movs r3, r0
|
|
100031d4: 3b25 subs r3, #37 @ 0x25
|
|
100031d6: b2da uxtb r2, r3
|
|
100031d8: 2a42 cmp r2, #66 @ 0x42
|
|
100031da: d900 bls.n 100031de <_vsnprintf+0x196>
|
|
100031dc: e246 b.n 1000366c <_vsnprintf+0x624>
|
|
100031de: 0093 lsls r3, r2, #2
|
|
100031e0: 4a8a ldr r2, [pc, #552] @ (1000340c <_vsnprintf+0x3c4>)
|
|
100031e2: 58d3 ldr r3, [r2, r3]
|
|
100031e4: 469f mov pc, r3
|
|
100031e6: 2380 movs r3, #128 @ 0x80
|
|
100031e8: 009b lsls r3, r3, #2
|
|
100031ea: 431f orrs r7, r3
|
|
100031ec: 3201 adds r2, #1
|
|
100031ee: 9211 str r2, [sp, #68] @ 0x44
|
|
100031f0: e7e8 b.n 100031c4 <_vsnprintf+0x17c>
|
|
100031f2: 2380 movs r3, #128 @ 0x80
|
|
100031f4: 005b lsls r3, r3, #1
|
|
100031f6: 431f orrs r7, r3
|
|
100031f8: 3201 adds r2, #1
|
|
100031fa: 9211 str r2, [sp, #68] @ 0x44
|
|
100031fc: e7e2 b.n 100031c4 <_vsnprintf+0x17c>
|
|
100031fe: 2878 cmp r0, #120 @ 0x78
|
|
10003200: d900 bls.n 10003204 <_vsnprintf+0x1bc>
|
|
10003202: e233 b.n 1000366c <_vsnprintf+0x624>
|
|
10003204: 2869 cmp r0, #105 @ 0x69
|
|
10003206: d200 bcs.n 1000320a <_vsnprintf+0x1c2>
|
|
10003208: e230 b.n 1000366c <_vsnprintf+0x624>
|
|
1000320a: 0002 movs r2, r0
|
|
1000320c: 3a69 subs r2, #105 @ 0x69
|
|
1000320e: b2d2 uxtb r2, r2
|
|
10003210: 2301 movs r3, #1
|
|
10003212: 4093 lsls r3, r2
|
|
10003214: 4a7e ldr r2, [pc, #504] @ (10003410 <_vsnprintf+0x3c8>)
|
|
10003216: 4213 tst r3, r2
|
|
10003218: d111 bne.n 1000323e <_vsnprintf+0x1f6>
|
|
1000321a: 061a lsls r2, r3, #24
|
|
1000321c: d500 bpl.n 10003220 <_vsnprintf+0x1d8>
|
|
1000321e: e200 b.n 10003622 <_vsnprintf+0x5da>
|
|
10003220: 055b lsls r3, r3, #21
|
|
10003222: d400 bmi.n 10003226 <_vsnprintf+0x1de>
|
|
10003224: e222 b.n 1000366c <_vsnprintf+0x624>
|
|
10003226: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10003228: 1d1a adds r2, r3, #4
|
|
1000322a: 921c str r2, [sp, #112] @ 0x70
|
|
1000322c: 681b ldr r3, [r3, #0]
|
|
1000322e: 469a mov sl, r3
|
|
10003230: 2c00 cmp r4, #0
|
|
10003232: d000 beq.n 10003236 <_vsnprintf+0x1ee>
|
|
10003234: e1b2 b.n 1000359c <_vsnprintf+0x554>
|
|
10003236: 2201 movs r2, #1
|
|
10003238: 4252 negs r2, r2
|
|
1000323a: 4653 mov r3, sl
|
|
1000323c: e18e b.n 1000355c <_vsnprintf+0x514>
|
|
1000323e: 286f cmp r0, #111 @ 0x6f
|
|
10003240: d00e beq.n 10003260 <_vsnprintf+0x218>
|
|
10003242: d806 bhi.n 10003252 <_vsnprintf+0x20a>
|
|
10003244: 2858 cmp r0, #88 @ 0x58
|
|
10003246: d03d beq.n 100032c4 <_vsnprintf+0x27c>
|
|
10003248: 2862 cmp r0, #98 @ 0x62
|
|
1000324a: d104 bne.n 10003256 <_vsnprintf+0x20e>
|
|
1000324c: 2302 movs r3, #2
|
|
1000324e: 469c mov ip, r3
|
|
10003250: e008 b.n 10003264 <_vsnprintf+0x21c>
|
|
10003252: 2878 cmp r0, #120 @ 0x78
|
|
10003254: d039 beq.n 100032ca <_vsnprintf+0x282>
|
|
10003256: 2310 movs r3, #16
|
|
10003258: 439f bics r7, r3
|
|
1000325a: 3b06 subs r3, #6
|
|
1000325c: 469c mov ip, r3
|
|
1000325e: e001 b.n 10003264 <_vsnprintf+0x21c>
|
|
10003260: 2308 movs r3, #8
|
|
10003262: 469c mov ip, r3
|
|
10003264: 2858 cmp r0, #88 @ 0x58
|
|
10003266: d033 beq.n 100032d0 <_vsnprintf+0x288>
|
|
10003268: 2869 cmp r0, #105 @ 0x69
|
|
1000326a: d003 beq.n 10003274 <_vsnprintf+0x22c>
|
|
1000326c: 2864 cmp r0, #100 @ 0x64
|
|
1000326e: d001 beq.n 10003274 <_vsnprintf+0x22c>
|
|
10003270: 220c movs r2, #12
|
|
10003272: 4397 bics r7, r2
|
|
10003274: 057a lsls r2, r7, #21
|
|
10003276: d501 bpl.n 1000327c <_vsnprintf+0x234>
|
|
10003278: 2201 movs r2, #1
|
|
1000327a: 4397 bics r7, r2
|
|
1000327c: 2869 cmp r0, #105 @ 0x69
|
|
1000327e: d02a beq.n 100032d6 <_vsnprintf+0x28e>
|
|
10003280: 2864 cmp r0, #100 @ 0x64
|
|
10003282: d028 beq.n 100032d6 <_vsnprintf+0x28e>
|
|
10003284: 05ba lsls r2, r7, #22
|
|
10003286: d500 bpl.n 1000328a <_vsnprintf+0x242>
|
|
10003288: e09f b.n 100033ca <_vsnprintf+0x382>
|
|
1000328a: 05fa lsls r2, r7, #23
|
|
1000328c: d500 bpl.n 10003290 <_vsnprintf+0x248>
|
|
1000328e: e0c1 b.n 10003414 <_vsnprintf+0x3cc>
|
|
10003290: 067a lsls r2, r7, #25
|
|
10003292: d400 bmi.n 10003296 <_vsnprintf+0x24e>
|
|
10003294: e0d3 b.n 1000343e <_vsnprintf+0x3f6>
|
|
10003296: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003298: 1d11 adds r1, r2, #4
|
|
1000329a: 911c str r1, [sp, #112] @ 0x70
|
|
1000329c: 6811 ldr r1, [r2, #0]
|
|
1000329e: 22ff movs r2, #255 @ 0xff
|
|
100032a0: 400a ands r2, r1
|
|
100032a2: 9705 str r7, [sp, #20]
|
|
100032a4: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
100032a6: 9304 str r3, [sp, #16]
|
|
100032a8: 9403 str r4, [sp, #12]
|
|
100032aa: 4663 mov r3, ip
|
|
100032ac: 9302 str r3, [sp, #8]
|
|
100032ae: 2300 movs r3, #0
|
|
100032b0: 9301 str r3, [sp, #4]
|
|
100032b2: 9200 str r2, [sp, #0]
|
|
100032b4: 465b mov r3, fp
|
|
100032b6: 002a movs r2, r5
|
|
100032b8: 4641 mov r1, r8
|
|
100032ba: 0030 movs r0, r6
|
|
100032bc: f7ff fa25 bl 1000270a <_ntoa_long>
|
|
100032c0: 0005 movs r5, r0
|
|
100032c2: e027 b.n 10003314 <_vsnprintf+0x2cc>
|
|
100032c4: 2310 movs r3, #16
|
|
100032c6: 469c mov ip, r3
|
|
100032c8: e7cc b.n 10003264 <_vsnprintf+0x21c>
|
|
100032ca: 2310 movs r3, #16
|
|
100032cc: 469c mov ip, r3
|
|
100032ce: e7c9 b.n 10003264 <_vsnprintf+0x21c>
|
|
100032d0: 2220 movs r2, #32
|
|
100032d2: 4317 orrs r7, r2
|
|
100032d4: e7c8 b.n 10003268 <_vsnprintf+0x220>
|
|
100032d6: 05ba lsls r2, r7, #22
|
|
100032d8: d420 bmi.n 1000331c <_vsnprintf+0x2d4>
|
|
100032da: 05fa lsls r2, r7, #23
|
|
100032dc: d450 bmi.n 10003380 <_vsnprintf+0x338>
|
|
100032de: 067a lsls r2, r7, #25
|
|
100032e0: d566 bpl.n 100033b0 <_vsnprintf+0x368>
|
|
100032e2: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100032e4: 1d11 adds r1, r2, #4
|
|
100032e6: 911c str r1, [sp, #112] @ 0x70
|
|
100032e8: 6811 ldr r1, [r2, #0]
|
|
100032ea: 22ff movs r2, #255 @ 0xff
|
|
100032ec: 400a ands r2, r1
|
|
100032ee: 17d0 asrs r0, r2, #31
|
|
100032f0: 1811 adds r1, r2, r0
|
|
100032f2: 4041 eors r1, r0
|
|
100032f4: 9705 str r7, [sp, #20]
|
|
100032f6: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
100032f8: 9304 str r3, [sp, #16]
|
|
100032fa: 9403 str r4, [sp, #12]
|
|
100032fc: 4663 mov r3, ip
|
|
100032fe: 9302 str r3, [sp, #8]
|
|
10003300: 0fd2 lsrs r2, r2, #31
|
|
10003302: 9201 str r2, [sp, #4]
|
|
10003304: 9100 str r1, [sp, #0]
|
|
10003306: 465b mov r3, fp
|
|
10003308: 002a movs r2, r5
|
|
1000330a: 4641 mov r1, r8
|
|
1000330c: 0030 movs r0, r6
|
|
1000330e: f7ff f9fc bl 1000270a <_ntoa_long>
|
|
10003312: 0005 movs r5, r0
|
|
10003314: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003316: 3301 adds r3, #1
|
|
10003318: 9311 str r3, [sp, #68] @ 0x44
|
|
1000331a: e6a5 b.n 10003068 <_vsnprintf+0x20>
|
|
1000331c: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
1000331e: 3207 adds r2, #7
|
|
10003320: 2107 movs r1, #7
|
|
10003322: 438a bics r2, r1
|
|
10003324: 0011 movs r1, r2
|
|
10003326: 3108 adds r1, #8
|
|
10003328: 911c str r1, [sp, #112] @ 0x70
|
|
1000332a: 6811 ldr r1, [r2, #0]
|
|
1000332c: 6853 ldr r3, [r2, #4]
|
|
1000332e: 4699 mov r9, r3
|
|
10003330: 17db asrs r3, r3, #31
|
|
10003332: 930c str r3, [sp, #48] @ 0x30
|
|
10003334: 930d str r3, [sp, #52] @ 0x34
|
|
10003336: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10003338: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000333a: 0010 movs r0, r2
|
|
1000333c: 4048 eors r0, r1
|
|
1000333e: 900e str r0, [sp, #56] @ 0x38
|
|
10003340: 464a mov r2, r9
|
|
10003342: 4053 eors r3, r2
|
|
10003344: 930f str r3, [sp, #60] @ 0x3c
|
|
10003346: 980e ldr r0, [sp, #56] @ 0x38
|
|
10003348: 990f ldr r1, [sp, #60] @ 0x3c
|
|
1000334a: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
1000334c: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000334e: 1a80 subs r0, r0, r2
|
|
10003350: 4199 sbcs r1, r3
|
|
10003352: 900e str r0, [sp, #56] @ 0x38
|
|
10003354: 910f str r1, [sp, #60] @ 0x3c
|
|
10003356: 9708 str r7, [sp, #32]
|
|
10003358: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
1000335a: 9307 str r3, [sp, #28]
|
|
1000335c: 9406 str r4, [sp, #24]
|
|
1000335e: 4663 mov r3, ip
|
|
10003360: 9304 str r3, [sp, #16]
|
|
10003362: 2300 movs r3, #0
|
|
10003364: 9305 str r3, [sp, #20]
|
|
10003366: 464b mov r3, r9
|
|
10003368: 0fda lsrs r2, r3, #31
|
|
1000336a: 9202 str r2, [sp, #8]
|
|
1000336c: 9000 str r0, [sp, #0]
|
|
1000336e: 9101 str r1, [sp, #4]
|
|
10003370: 465b mov r3, fp
|
|
10003372: 002a movs r2, r5
|
|
10003374: 4641 mov r1, r8
|
|
10003376: 0030 movs r0, r6
|
|
10003378: f7ff fa25 bl 100027c6 <_ntoa_long_long>
|
|
1000337c: 0005 movs r5, r0
|
|
1000337e: e7c9 b.n 10003314 <_vsnprintf+0x2cc>
|
|
10003380: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003382: 1d11 adds r1, r2, #4
|
|
10003384: 911c str r1, [sp, #112] @ 0x70
|
|
10003386: 6812 ldr r2, [r2, #0]
|
|
10003388: 17d0 asrs r0, r2, #31
|
|
1000338a: 1811 adds r1, r2, r0
|
|
1000338c: 4041 eors r1, r0
|
|
1000338e: 9705 str r7, [sp, #20]
|
|
10003390: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
10003392: 9304 str r3, [sp, #16]
|
|
10003394: 9403 str r4, [sp, #12]
|
|
10003396: 4663 mov r3, ip
|
|
10003398: 9302 str r3, [sp, #8]
|
|
1000339a: 0fd2 lsrs r2, r2, #31
|
|
1000339c: 9201 str r2, [sp, #4]
|
|
1000339e: 9100 str r1, [sp, #0]
|
|
100033a0: 465b mov r3, fp
|
|
100033a2: 002a movs r2, r5
|
|
100033a4: 4641 mov r1, r8
|
|
100033a6: 0030 movs r0, r6
|
|
100033a8: f7ff f9af bl 1000270a <_ntoa_long>
|
|
100033ac: 0005 movs r5, r0
|
|
100033ae: e7b1 b.n 10003314 <_vsnprintf+0x2cc>
|
|
100033b0: 063a lsls r2, r7, #24
|
|
100033b2: d505 bpl.n 100033c0 <_vsnprintf+0x378>
|
|
100033b4: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100033b6: 1d11 adds r1, r2, #4
|
|
100033b8: 911c str r1, [sp, #112] @ 0x70
|
|
100033ba: 2300 movs r3, #0
|
|
100033bc: 5ed2 ldrsh r2, [r2, r3]
|
|
100033be: e796 b.n 100032ee <_vsnprintf+0x2a6>
|
|
100033c0: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100033c2: 1d11 adds r1, r2, #4
|
|
100033c4: 911c str r1, [sp, #112] @ 0x70
|
|
100033c6: 6812 ldr r2, [r2, #0]
|
|
100033c8: e791 b.n 100032ee <_vsnprintf+0x2a6>
|
|
100033ca: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100033cc: 3207 adds r2, #7
|
|
100033ce: 2107 movs r1, #7
|
|
100033d0: 438a bics r2, r1
|
|
100033d2: 0011 movs r1, r2
|
|
100033d4: 3108 adds r1, #8
|
|
100033d6: 911c str r1, [sp, #112] @ 0x70
|
|
100033d8: 9708 str r7, [sp, #32]
|
|
100033da: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
100033dc: 9307 str r3, [sp, #28]
|
|
100033de: 9406 str r4, [sp, #24]
|
|
100033e0: 4663 mov r3, ip
|
|
100033e2: 9304 str r3, [sp, #16]
|
|
100033e4: 2300 movs r3, #0
|
|
100033e6: 9305 str r3, [sp, #20]
|
|
100033e8: 9302 str r3, [sp, #8]
|
|
100033ea: 6853 ldr r3, [r2, #4]
|
|
100033ec: 6812 ldr r2, [r2, #0]
|
|
100033ee: 9200 str r2, [sp, #0]
|
|
100033f0: 9301 str r3, [sp, #4]
|
|
100033f2: 465b mov r3, fp
|
|
100033f4: 002a movs r2, r5
|
|
100033f6: 4641 mov r1, r8
|
|
100033f8: 0030 movs r0, r6
|
|
100033fa: f7ff f9e4 bl 100027c6 <_ntoa_long_long>
|
|
100033fe: 0005 movs r5, r0
|
|
10003400: e788 b.n 10003314 <_vsnprintf+0x2cc>
|
|
10003402: 46c0 nop @ (mov r8, r8)
|
|
10003404: 10006410 .word 0x10006410
|
|
10003408: 10006454 .word 0x10006454
|
|
1000340c: 100064a0 .word 0x100064a0
|
|
10003410: 00009041 .word 0x00009041
|
|
10003414: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003416: 1d11 adds r1, r2, #4
|
|
10003418: 911c str r1, [sp, #112] @ 0x70
|
|
1000341a: 9705 str r7, [sp, #20]
|
|
1000341c: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
1000341e: 9304 str r3, [sp, #16]
|
|
10003420: 9403 str r4, [sp, #12]
|
|
10003422: 4663 mov r3, ip
|
|
10003424: 9302 str r3, [sp, #8]
|
|
10003426: 2300 movs r3, #0
|
|
10003428: 9301 str r3, [sp, #4]
|
|
1000342a: 6813 ldr r3, [r2, #0]
|
|
1000342c: 9300 str r3, [sp, #0]
|
|
1000342e: 465b mov r3, fp
|
|
10003430: 002a movs r2, r5
|
|
10003432: 4641 mov r1, r8
|
|
10003434: 0030 movs r0, r6
|
|
10003436: f7ff f968 bl 1000270a <_ntoa_long>
|
|
1000343a: 0005 movs r5, r0
|
|
1000343c: e76a b.n 10003314 <_vsnprintf+0x2cc>
|
|
1000343e: 063a lsls r2, r7, #24
|
|
10003440: d506 bpl.n 10003450 <_vsnprintf+0x408>
|
|
10003442: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003444: 1d11 adds r1, r2, #4
|
|
10003446: 911c str r1, [sp, #112] @ 0x70
|
|
10003448: 6812 ldr r2, [r2, #0]
|
|
1000344a: 0412 lsls r2, r2, #16
|
|
1000344c: 0c12 lsrs r2, r2, #16
|
|
1000344e: e728 b.n 100032a2 <_vsnprintf+0x25a>
|
|
10003450: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003452: 1d11 adds r1, r2, #4
|
|
10003454: 911c str r1, [sp, #112] @ 0x70
|
|
10003456: 6812 ldr r2, [r2, #0]
|
|
10003458: e723 b.n 100032a2 <_vsnprintf+0x25a>
|
|
1000345a: 2846 cmp r0, #70 @ 0x46
|
|
1000345c: d019 beq.n 10003492 <_vsnprintf+0x44a>
|
|
1000345e: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10003460: 3307 adds r3, #7
|
|
10003462: 2207 movs r2, #7
|
|
10003464: 4393 bics r3, r2
|
|
10003466: 001a movs r2, r3
|
|
10003468: 3208 adds r2, #8
|
|
1000346a: 921c str r2, [sp, #112] @ 0x70
|
|
1000346c: 9704 str r7, [sp, #16]
|
|
1000346e: 9a0b ldr r2, [sp, #44] @ 0x2c
|
|
10003470: 9203 str r2, [sp, #12]
|
|
10003472: 9402 str r4, [sp, #8]
|
|
10003474: 681a ldr r2, [r3, #0]
|
|
10003476: 685b ldr r3, [r3, #4]
|
|
10003478: 9200 str r2, [sp, #0]
|
|
1000347a: 9301 str r3, [sp, #4]
|
|
1000347c: 465b mov r3, fp
|
|
1000347e: 002a movs r2, r5
|
|
10003480: 4641 mov r1, r8
|
|
10003482: 0030 movs r0, r6
|
|
10003484: f7ff fc36 bl 10002cf4 <_ftoa>
|
|
10003488: 0005 movs r5, r0
|
|
1000348a: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
1000348c: 3301 adds r3, #1
|
|
1000348e: 9311 str r3, [sp, #68] @ 0x44
|
|
10003490: e5ea b.n 10003068 <_vsnprintf+0x20>
|
|
10003492: 2320 movs r3, #32
|
|
10003494: 431f orrs r7, r3
|
|
10003496: e7e2 b.n 1000345e <_vsnprintf+0x416>
|
|
10003498: 2867 cmp r0, #103 @ 0x67
|
|
1000349a: d001 beq.n 100034a0 <_vsnprintf+0x458>
|
|
1000349c: 2847 cmp r0, #71 @ 0x47
|
|
1000349e: d102 bne.n 100034a6 <_vsnprintf+0x45e>
|
|
100034a0: 2380 movs r3, #128 @ 0x80
|
|
100034a2: 011b lsls r3, r3, #4
|
|
100034a4: 431f orrs r7, r3
|
|
100034a6: 2845 cmp r0, #69 @ 0x45
|
|
100034a8: d001 beq.n 100034ae <_vsnprintf+0x466>
|
|
100034aa: 2847 cmp r0, #71 @ 0x47
|
|
100034ac: d101 bne.n 100034b2 <_vsnprintf+0x46a>
|
|
100034ae: 2320 movs r3, #32
|
|
100034b0: 431f orrs r7, r3
|
|
100034b2: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
100034b4: 3307 adds r3, #7
|
|
100034b6: 2207 movs r2, #7
|
|
100034b8: 4393 bics r3, r2
|
|
100034ba: 001a movs r2, r3
|
|
100034bc: 3208 adds r2, #8
|
|
100034be: 921c str r2, [sp, #112] @ 0x70
|
|
100034c0: 9704 str r7, [sp, #16]
|
|
100034c2: 9a0b ldr r2, [sp, #44] @ 0x2c
|
|
100034c4: 9203 str r2, [sp, #12]
|
|
100034c6: 9402 str r4, [sp, #8]
|
|
100034c8: 681a ldr r2, [r3, #0]
|
|
100034ca: 685b ldr r3, [r3, #4]
|
|
100034cc: 9200 str r2, [sp, #0]
|
|
100034ce: 9301 str r3, [sp, #4]
|
|
100034d0: 465b mov r3, fp
|
|
100034d2: 002a movs r2, r5
|
|
100034d4: 4641 mov r1, r8
|
|
100034d6: 0030 movs r0, r6
|
|
100034d8: f7ff f9fc bl 100028d4 <_etoa>
|
|
100034dc: 0005 movs r5, r0
|
|
100034de: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100034e0: 3301 adds r3, #1
|
|
100034e2: 9311 str r3, [sp, #68] @ 0x44
|
|
100034e4: e5c0 b.n 10003068 <_vsnprintf+0x20>
|
|
100034e6: 2302 movs r3, #2
|
|
100034e8: 001a movs r2, r3
|
|
100034ea: 403a ands r2, r7
|
|
100034ec: 4691 mov r9, r2
|
|
100034ee: 423b tst r3, r7
|
|
100034f0: d01d beq.n 1000352e <_vsnprintf+0x4e6>
|
|
100034f2: 2401 movs r4, #1
|
|
100034f4: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
100034f6: 1d1a adds r2, r3, #4
|
|
100034f8: 921c str r2, [sp, #112] @ 0x70
|
|
100034fa: 1c6f adds r7, r5, #1
|
|
100034fc: 7818 ldrb r0, [r3, #0]
|
|
100034fe: 465b mov r3, fp
|
|
10003500: 002a movs r2, r5
|
|
10003502: 4641 mov r1, r8
|
|
10003504: 47b0 blx r6
|
|
10003506: 464b mov r3, r9
|
|
10003508: 2b00 cmp r3, #0
|
|
1000350a: d114 bne.n 10003536 <_vsnprintf+0x4ee>
|
|
1000350c: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
1000350e: 3301 adds r3, #1
|
|
10003510: 9311 str r3, [sp, #68] @ 0x44
|
|
10003512: 003d movs r5, r7
|
|
10003514: e5a8 b.n 10003068 <_vsnprintf+0x20>
|
|
10003516: 1c57 adds r7, r2, #1
|
|
10003518: 465b mov r3, fp
|
|
1000351a: 4641 mov r1, r8
|
|
1000351c: 2020 movs r0, #32
|
|
1000351e: 47b0 blx r6
|
|
10003520: 0023 movs r3, r4
|
|
10003522: 003a movs r2, r7
|
|
10003524: 1c5c adds r4, r3, #1
|
|
10003526: 429d cmp r5, r3
|
|
10003528: d8f5 bhi.n 10003516 <_vsnprintf+0x4ce>
|
|
1000352a: 0015 movs r5, r2
|
|
1000352c: e7e2 b.n 100034f4 <_vsnprintf+0x4ac>
|
|
1000352e: 2301 movs r3, #1
|
|
10003530: 002a movs r2, r5
|
|
10003532: 9d0b ldr r5, [sp, #44] @ 0x2c
|
|
10003534: e7f6 b.n 10003524 <_vsnprintf+0x4dc>
|
|
10003536: 003a movs r2, r7
|
|
10003538: 46b1 mov r9, r6
|
|
1000353a: 9e0b ldr r6, [sp, #44] @ 0x2c
|
|
1000353c: e006 b.n 1000354c <_vsnprintf+0x504>
|
|
1000353e: 1c57 adds r7, r2, #1
|
|
10003540: 465b mov r3, fp
|
|
10003542: 4641 mov r1, r8
|
|
10003544: 2020 movs r0, #32
|
|
10003546: 47c8 blx r9
|
|
10003548: 002c movs r4, r5
|
|
1000354a: 003a movs r2, r7
|
|
1000354c: 1c65 adds r5, r4, #1
|
|
1000354e: 42a6 cmp r6, r4
|
|
10003550: d8f5 bhi.n 1000353e <_vsnprintf+0x4f6>
|
|
10003552: 0017 movs r7, r2
|
|
10003554: 464e mov r6, r9
|
|
10003556: e7d9 b.n 1000350c <_vsnprintf+0x4c4>
|
|
10003558: 3301 adds r3, #1
|
|
1000355a: 000a movs r2, r1
|
|
1000355c: 7819 ldrb r1, [r3, #0]
|
|
1000355e: 2900 cmp r1, #0
|
|
10003560: d002 beq.n 10003568 <_vsnprintf+0x520>
|
|
10003562: 1e51 subs r1, r2, #1
|
|
10003564: 2a00 cmp r2, #0
|
|
10003566: d1f7 bne.n 10003558 <_vsnprintf+0x510>
|
|
10003568: 4652 mov r2, sl
|
|
1000356a: 1a9b subs r3, r3, r2
|
|
1000356c: 2280 movs r2, #128 @ 0x80
|
|
1000356e: 00d2 lsls r2, r2, #3
|
|
10003570: 0039 movs r1, r7
|
|
10003572: 4011 ands r1, r2
|
|
10003574: 4689 mov r9, r1
|
|
10003576: 4217 tst r7, r2
|
|
10003578: d002 beq.n 10003580 <_vsnprintf+0x538>
|
|
1000357a: 42a3 cmp r3, r4
|
|
1000357c: d900 bls.n 10003580 <_vsnprintf+0x538>
|
|
1000357e: 0023 movs r3, r4
|
|
10003580: 2202 movs r2, #2
|
|
10003582: 0011 movs r1, r2
|
|
10003584: 4039 ands r1, r7
|
|
10003586: 9110 str r1, [sp, #64] @ 0x40
|
|
10003588: 423a tst r2, r7
|
|
1000358a: d009 beq.n 100035a0 <_vsnprintf+0x558>
|
|
1000358c: 002a movs r2, r5
|
|
1000358e: 0025 movs r5, r4
|
|
10003590: 4657 mov r7, sl
|
|
10003592: 469a mov sl, r3
|
|
10003594: 0033 movs r3, r6
|
|
10003596: 464e mov r6, r9
|
|
10003598: 4699 mov r9, r3
|
|
1000359a: e021 b.n 100035e0 <_vsnprintf+0x598>
|
|
1000359c: 0022 movs r2, r4
|
|
1000359e: e64c b.n 1000323a <_vsnprintf+0x1f2>
|
|
100035a0: 002a movs r2, r5
|
|
100035a2: 4645 mov r5, r8
|
|
100035a4: 46a0 mov r8, r4
|
|
100035a6: e006 b.n 100035b6 <_vsnprintf+0x56e>
|
|
100035a8: 1c54 adds r4, r2, #1
|
|
100035aa: 465b mov r3, fp
|
|
100035ac: 0029 movs r1, r5
|
|
100035ae: 2020 movs r0, #32
|
|
100035b0: 47b0 blx r6
|
|
100035b2: 003b movs r3, r7
|
|
100035b4: 0022 movs r2, r4
|
|
100035b6: 1c5f adds r7, r3, #1
|
|
100035b8: 990b ldr r1, [sp, #44] @ 0x2c
|
|
100035ba: 4299 cmp r1, r3
|
|
100035bc: d8f4 bhi.n 100035a8 <_vsnprintf+0x560>
|
|
100035be: 4644 mov r4, r8
|
|
100035c0: 46a8 mov r8, r5
|
|
100035c2: 003b movs r3, r7
|
|
100035c4: 0025 movs r5, r4
|
|
100035c6: 4657 mov r7, sl
|
|
100035c8: 469a mov sl, r3
|
|
100035ca: 0033 movs r3, r6
|
|
100035cc: 464e mov r6, r9
|
|
100035ce: 4699 mov r9, r3
|
|
100035d0: e006 b.n 100035e0 <_vsnprintf+0x598>
|
|
100035d2: 001d movs r5, r3
|
|
100035d4: 3701 adds r7, #1
|
|
100035d6: 1c54 adds r4, r2, #1
|
|
100035d8: 465b mov r3, fp
|
|
100035da: 4641 mov r1, r8
|
|
100035dc: 47c8 blx r9
|
|
100035de: 0022 movs r2, r4
|
|
100035e0: 7838 ldrb r0, [r7, #0]
|
|
100035e2: 2800 cmp r0, #0
|
|
100035e4: d004 beq.n 100035f0 <_vsnprintf+0x5a8>
|
|
100035e6: 2e00 cmp r6, #0
|
|
100035e8: d0f4 beq.n 100035d4 <_vsnprintf+0x58c>
|
|
100035ea: 1e6b subs r3, r5, #1
|
|
100035ec: 2d00 cmp r5, #0
|
|
100035ee: d1f0 bne.n 100035d2 <_vsnprintf+0x58a>
|
|
100035f0: 0015 movs r5, r2
|
|
100035f2: 4653 mov r3, sl
|
|
100035f4: 464e mov r6, r9
|
|
100035f6: 9a10 ldr r2, [sp, #64] @ 0x40
|
|
100035f8: 2a00 cmp r2, #0
|
|
100035fa: d103 bne.n 10003604 <_vsnprintf+0x5bc>
|
|
100035fc: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100035fe: 3301 adds r3, #1
|
|
10003600: 9311 str r3, [sp, #68] @ 0x44
|
|
10003602: e531 b.n 10003068 <_vsnprintf+0x20>
|
|
10003604: 9f0b ldr r7, [sp, #44] @ 0x2c
|
|
10003606: 002a movs r2, r5
|
|
10003608: e006 b.n 10003618 <_vsnprintf+0x5d0>
|
|
1000360a: 1c55 adds r5, r2, #1
|
|
1000360c: 465b mov r3, fp
|
|
1000360e: 4641 mov r1, r8
|
|
10003610: 2020 movs r0, #32
|
|
10003612: 47b0 blx r6
|
|
10003614: 0023 movs r3, r4
|
|
10003616: 002a movs r2, r5
|
|
10003618: 1c5c adds r4, r3, #1
|
|
1000361a: 429f cmp r7, r3
|
|
1000361c: d8f5 bhi.n 1000360a <_vsnprintf+0x5c2>
|
|
1000361e: 0015 movs r5, r2
|
|
10003620: e7ec b.n 100035fc <_vsnprintf+0x5b4>
|
|
10003622: 2321 movs r3, #33 @ 0x21
|
|
10003624: 433b orrs r3, r7
|
|
10003626: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003628: 1d11 adds r1, r2, #4
|
|
1000362a: 911c str r1, [sp, #112] @ 0x70
|
|
1000362c: 6812 ldr r2, [r2, #0]
|
|
1000362e: 9305 str r3, [sp, #20]
|
|
10003630: 2308 movs r3, #8
|
|
10003632: 9304 str r3, [sp, #16]
|
|
10003634: 9403 str r4, [sp, #12]
|
|
10003636: 3308 adds r3, #8
|
|
10003638: 9302 str r3, [sp, #8]
|
|
1000363a: 2300 movs r3, #0
|
|
1000363c: 9301 str r3, [sp, #4]
|
|
1000363e: 9200 str r2, [sp, #0]
|
|
10003640: 465b mov r3, fp
|
|
10003642: 002a movs r2, r5
|
|
10003644: 4641 mov r1, r8
|
|
10003646: 0030 movs r0, r6
|
|
10003648: f7ff f85f bl 1000270a <_ntoa_long>
|
|
1000364c: 0005 movs r5, r0
|
|
1000364e: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003650: 3301 adds r3, #1
|
|
10003652: 9311 str r3, [sp, #68] @ 0x44
|
|
10003654: e508 b.n 10003068 <_vsnprintf+0x20>
|
|
10003656: 1c6c adds r4, r5, #1
|
|
10003658: 465b mov r3, fp
|
|
1000365a: 002a movs r2, r5
|
|
1000365c: 4641 mov r1, r8
|
|
1000365e: 2025 movs r0, #37 @ 0x25
|
|
10003660: 47b0 blx r6
|
|
10003662: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003664: 3301 adds r3, #1
|
|
10003666: 9311 str r3, [sp, #68] @ 0x44
|
|
10003668: 0025 movs r5, r4
|
|
1000366a: e4fd b.n 10003068 <_vsnprintf+0x20>
|
|
1000366c: 1c6c adds r4, r5, #1
|
|
1000366e: 465b mov r3, fp
|
|
10003670: 002a movs r2, r5
|
|
10003672: 4641 mov r1, r8
|
|
10003674: 47b0 blx r6
|
|
10003676: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003678: 3301 adds r3, #1
|
|
1000367a: 9311 str r3, [sp, #68] @ 0x44
|
|
1000367c: 0025 movs r5, r4
|
|
1000367e: e4f3 b.n 10003068 <_vsnprintf+0x20>
|
|
10003680: 4b0a ldr r3, [pc, #40] @ (100036ac <_vsnprintf+0x664>)
|
|
10003682: 469a mov sl, r3
|
|
10003684: e4ee b.n 10003064 <_vsnprintf+0x1c>
|
|
10003686: 46b2 mov sl, r6
|
|
10003688: 455d cmp r5, fp
|
|
1000368a: d30d bcc.n 100036a8 <_vsnprintf+0x660>
|
|
1000368c: 465b mov r3, fp
|
|
1000368e: 1e5a subs r2, r3, #1
|
|
10003690: 465b mov r3, fp
|
|
10003692: 4641 mov r1, r8
|
|
10003694: 2000 movs r0, #0
|
|
10003696: 47d0 blx sl
|
|
10003698: 0028 movs r0, r5
|
|
1000369a: b013 add sp, #76 @ 0x4c
|
|
1000369c: bcf0 pop {r4, r5, r6, r7}
|
|
1000369e: 46bb mov fp, r7
|
|
100036a0: 46b2 mov sl, r6
|
|
100036a2: 46a9 mov r9, r5
|
|
100036a4: 46a0 mov r8, r4
|
|
100036a6: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100036a8: 002a movs r2, r5
|
|
100036aa: e7f1 b.n 10003690 <_vsnprintf+0x648>
|
|
100036ac: 10002519 .word 0x10002519
|
|
|
|
100036b0 <vfctprintf>:
|
|
100036b0: b500 push {lr}
|
|
100036b2: b085 sub sp, #20
|
|
100036b4: 9002 str r0, [sp, #8]
|
|
100036b6: 9103 str r1, [sp, #12]
|
|
100036b8: 2101 movs r1, #1
|
|
100036ba: 4804 ldr r0, [pc, #16] @ (100036cc <vfctprintf+0x1c>)
|
|
100036bc: 9300 str r3, [sp, #0]
|
|
100036be: 0013 movs r3, r2
|
|
100036c0: 424a negs r2, r1
|
|
100036c2: a902 add r1, sp, #8
|
|
100036c4: f7ff fcc0 bl 10003048 <_vsnprintf>
|
|
100036c8: b005 add sp, #20
|
|
100036ca: bd00 pop {pc}
|
|
100036cc: 1000251b .word 0x1000251b
|
|
|
|
100036d0 <__aeabi_bits_init>:
|
|
100036d0: 4801 ldr r0, [pc, #4] @ (100036d8 <__aeabi_bits_init+0x8>)
|
|
100036d2: 2104 movs r1, #4
|
|
100036d4: 4b01 ldr r3, [pc, #4] @ (100036dc <__aeabi_bits_init+0xc>)
|
|
100036d6: 4718 bx r3
|
|
100036d8: 200002b0 .word 0x200002b0
|
|
100036dc: 10003701 .word 0x10003701
|
|
|
|
100036e0 <rom_func_lookup>:
|
|
100036e0: b510 push {r4, lr}
|
|
100036e2: 0001 movs r1, r0
|
|
100036e4: 2318 movs r3, #24
|
|
100036e6: 881b ldrh r3, [r3, #0]
|
|
100036e8: 2214 movs r2, #20
|
|
100036ea: 8810 ldrh r0, [r2, #0]
|
|
100036ec: 4798 blx r3
|
|
100036ee: bd10 pop {r4, pc}
|
|
|
|
100036f0 <rom_data_lookup>:
|
|
100036f0: b510 push {r4, lr}
|
|
100036f2: 0001 movs r1, r0
|
|
100036f4: 2318 movs r3, #24
|
|
100036f6: 881b ldrh r3, [r3, #0]
|
|
100036f8: 2216 movs r2, #22
|
|
100036fa: 8810 ldrh r0, [r2, #0]
|
|
100036fc: 4798 blx r3
|
|
100036fe: bd10 pop {r4, pc}
|
|
|
|
10003700 <rom_funcs_lookup>:
|
|
10003700: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003702: 46c6 mov lr, r8
|
|
10003704: b500 push {lr}
|
|
10003706: 0007 movs r7, r0
|
|
10003708: 000e movs r6, r1
|
|
1000370a: 2500 movs r5, #0
|
|
1000370c: 2301 movs r3, #1
|
|
1000370e: 4698 mov r8, r3
|
|
10003710: e000 b.n 10003714 <rom_funcs_lookup+0x14>
|
|
10003712: 3501 adds r5, #1
|
|
10003714: 42b5 cmp r5, r6
|
|
10003716: d20a bcs.n 1000372e <rom_funcs_lookup+0x2e>
|
|
10003718: 00ac lsls r4, r5, #2
|
|
1000371a: 193c adds r4, r7, r4
|
|
1000371c: 6820 ldr r0, [r4, #0]
|
|
1000371e: f7ff ffdf bl 100036e0 <rom_func_lookup>
|
|
10003722: 6020 str r0, [r4, #0]
|
|
10003724: 2800 cmp r0, #0
|
|
10003726: d1f4 bne.n 10003712 <rom_funcs_lookup+0x12>
|
|
10003728: 2300 movs r3, #0
|
|
1000372a: 4698 mov r8, r3
|
|
1000372c: e7f1 b.n 10003712 <rom_funcs_lookup+0x12>
|
|
1000372e: 4640 mov r0, r8
|
|
10003730: bc80 pop {r7}
|
|
10003732: 46b8 mov r8, r7
|
|
10003734: bdf0 pop {r4, r5, r6, r7, pc}
|
|
...
|
|
|
|
10003738 <__wrap___aeabi_idiv>:
|
|
10003738: 4a12 ldr r2, [pc, #72] @ (10003784 <divmod_s32s32_savestate+0x18>)
|
|
1000373a: 6f93 ldr r3, [r2, #120] @ 0x78
|
|
1000373c: 089b lsrs r3, r3, #2
|
|
1000373e: d215 bcs.n 1000376c <divmod_s32s32_savestate>
|
|
|
|
10003740 <divmod_s32s32_unsafe>:
|
|
10003740: 6690 str r0, [r2, #104] @ 0x68
|
|
10003742: 66d1 str r1, [r2, #108] @ 0x6c
|
|
10003744: 2900 cmp r1, #0
|
|
10003746: d005 beq.n 10003754 <divmod_s32s32_unsafe+0x14>
|
|
10003748: e7ff b.n 1000374a <divmod_s32s32_unsafe+0xa>
|
|
1000374a: e7ff b.n 1000374c <divmod_s32s32_unsafe+0xc>
|
|
1000374c: e7ff b.n 1000374e <divmod_s32s32_unsafe+0xe>
|
|
1000374e: 6f51 ldr r1, [r2, #116] @ 0x74
|
|
10003750: 6f10 ldr r0, [r2, #112] @ 0x70
|
|
10003752: 4770 bx lr
|
|
10003754: b504 push {r2, lr}
|
|
10003756: 2180 movs r1, #128 @ 0x80
|
|
10003758: 0609 lsls r1, r1, #24
|
|
1000375a: 17c2 asrs r2, r0, #31
|
|
1000375c: 4051 eors r1, r2
|
|
1000375e: 2800 cmp r0, #0
|
|
10003760: d000 beq.n 10003764 <divmod_s32s32_unsafe+0x24>
|
|
10003762: 43c8 mvns r0, r1
|
|
10003764: f002 f864 bl 10005830 <____aeabi_idiv0_veneer>
|
|
10003768: 2100 movs r1, #0
|
|
1000376a: bd04 pop {r2, pc}
|
|
|
|
1000376c <divmod_s32s32_savestate>:
|
|
1000376c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000376e: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
10003770: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
10003772: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
10003774: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
10003776: f7ff ffe3 bl 10003740 <divmod_s32s32_unsafe>
|
|
1000377a: 6614 str r4, [r2, #96] @ 0x60
|
|
1000377c: 6655 str r5, [r2, #100] @ 0x64
|
|
1000377e: 6757 str r7, [r2, #116] @ 0x74
|
|
10003780: 6716 str r6, [r2, #112] @ 0x70
|
|
10003782: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003784: d0000000 .word 0xd0000000
|
|
|
|
10003788 <__wrap___aeabi_uidiv>:
|
|
10003788: 4a11 ldr r2, [pc, #68] @ (100037d0 <divmod_u32u32_savestate+0x18>)
|
|
1000378a: 6f93 ldr r3, [r2, #120] @ 0x78
|
|
1000378c: 089b lsrs r3, r3, #2
|
|
1000378e: d213 bcs.n 100037b8 <divmod_u32u32_savestate>
|
|
|
|
10003790 <divmod_u32u32_unsafe>:
|
|
10003790: 6610 str r0, [r2, #96] @ 0x60
|
|
10003792: 6651 str r1, [r2, #100] @ 0x64
|
|
10003794: 2900 cmp r1, #0
|
|
10003796: d005 beq.n 100037a4 <divmod_u32u32_unsafe+0x14>
|
|
10003798: e7ff b.n 1000379a <divmod_u32u32_unsafe+0xa>
|
|
1000379a: e7ff b.n 1000379c <divmod_u32u32_unsafe+0xc>
|
|
1000379c: e7ff b.n 1000379e <divmod_u32u32_unsafe+0xe>
|
|
1000379e: 6f51 ldr r1, [r2, #116] @ 0x74
|
|
100037a0: 6f10 ldr r0, [r2, #112] @ 0x70
|
|
100037a2: 4770 bx lr
|
|
100037a4: b504 push {r2, lr}
|
|
100037a6: 2800 cmp r0, #0
|
|
100037a8: d001 beq.n 100037ae <divmod_u32u32_unsafe+0x1e>
|
|
100037aa: 2000 movs r0, #0
|
|
100037ac: 43c0 mvns r0, r0
|
|
100037ae: f002 f83f bl 10005830 <____aeabi_idiv0_veneer>
|
|
100037b2: 2100 movs r1, #0
|
|
100037b4: bd04 pop {r2, pc}
|
|
100037b6: 46c0 nop @ (mov r8, r8)
|
|
|
|
100037b8 <divmod_u32u32_savestate>:
|
|
100037b8: b5f0 push {r4, r5, r6, r7, lr}
|
|
100037ba: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
100037bc: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
100037be: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
100037c0: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
100037c2: f7ff ffe5 bl 10003790 <divmod_u32u32_unsafe>
|
|
100037c6: 6614 str r4, [r2, #96] @ 0x60
|
|
100037c8: 6655 str r5, [r2, #100] @ 0x64
|
|
100037ca: 6757 str r7, [r2, #116] @ 0x74
|
|
100037cc: 6716 str r6, [r2, #112] @ 0x70
|
|
100037ce: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100037d0: d0000000 .word 0xd0000000
|
|
|
|
100037d4 <__wrap___aeabi_ldivmod>:
|
|
100037d4: 4694 mov ip, r2
|
|
100037d6: 4a4a ldr r2, [pc, #296] @ (10003900 <udiv0+0x1a>)
|
|
100037d8: 6f92 ldr r2, [r2, #120] @ 0x78
|
|
100037da: 0892 lsrs r2, r2, #2
|
|
100037dc: 4662 mov r2, ip
|
|
100037de: d201 bcs.n 100037e4 <divmod_s64s64_savestate>
|
|
100037e0: e028 b.n 10003834 <divmod_s64s64_unsafe>
|
|
100037e2: 46c0 nop @ (mov r8, r8)
|
|
|
|
100037e4 <divmod_s64s64_savestate>:
|
|
100037e4: b5f0 push {r4, r5, r6, r7, lr}
|
|
100037e6: 4e46 ldr r6, [pc, #280] @ (10003900 <udiv0+0x1a>)
|
|
100037e8: 6e34 ldr r4, [r6, #96] @ 0x60
|
|
100037ea: 6e75 ldr r5, [r6, #100] @ 0x64
|
|
100037ec: 6f77 ldr r7, [r6, #116] @ 0x74
|
|
100037ee: 6f36 ldr r6, [r6, #112] @ 0x70
|
|
100037f0: f000 f820 bl 10003834 <divmod_s64s64_unsafe>
|
|
100037f4: 4694 mov ip, r2
|
|
100037f6: 4a42 ldr r2, [pc, #264] @ (10003900 <udiv0+0x1a>)
|
|
100037f8: 6614 str r4, [r2, #96] @ 0x60
|
|
100037fa: 6655 str r5, [r2, #100] @ 0x64
|
|
100037fc: 6757 str r7, [r2, #116] @ 0x74
|
|
100037fe: 6716 str r6, [r2, #112] @ 0x70
|
|
10003800: 4662 mov r2, ip
|
|
10003802: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003804 <__wrap___aeabi_uldivmod>:
|
|
10003804: 4694 mov ip, r2
|
|
10003806: 4a3e ldr r2, [pc, #248] @ (10003900 <udiv0+0x1a>)
|
|
10003808: 6f92 ldr r2, [r2, #120] @ 0x78
|
|
1000380a: 0892 lsrs r2, r2, #2
|
|
1000380c: 4662 mov r2, ip
|
|
1000380e: d201 bcs.n 10003814 <divmod_u64u64_savestate>
|
|
10003810: e054 b.n 100038bc <divmod_u64u64_unsafe>
|
|
10003812: 46c0 nop @ (mov r8, r8)
|
|
|
|
10003814 <divmod_u64u64_savestate>:
|
|
10003814: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003816: 4e3a ldr r6, [pc, #232] @ (10003900 <udiv0+0x1a>)
|
|
10003818: 6e34 ldr r4, [r6, #96] @ 0x60
|
|
1000381a: 6e75 ldr r5, [r6, #100] @ 0x64
|
|
1000381c: 6f77 ldr r7, [r6, #116] @ 0x74
|
|
1000381e: 6f36 ldr r6, [r6, #112] @ 0x70
|
|
10003820: f000 f84c bl 100038bc <divmod_u64u64_unsafe>
|
|
10003824: 4694 mov ip, r2
|
|
10003826: 4a36 ldr r2, [pc, #216] @ (10003900 <udiv0+0x1a>)
|
|
10003828: 6614 str r4, [r2, #96] @ 0x60
|
|
1000382a: 6655 str r5, [r2, #100] @ 0x64
|
|
1000382c: 6757 str r7, [r2, #116] @ 0x74
|
|
1000382e: 6716 str r6, [r2, #112] @ 0x70
|
|
10003830: 4662 mov r2, ip
|
|
10003832: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003834 <divmod_s64s64_unsafe>:
|
|
10003834: 2b00 cmp r3, #0
|
|
10003836: db24 blt.n 10003882 <l41_1+0x26>
|
|
10003838: d011 beq.n 1000385e <l41_1+0x2>
|
|
1000383a: 2900 cmp r1, #0
|
|
1000383c: da3e bge.n 100038bc <divmod_u64u64_unsafe>
|
|
1000383e: b500 push {lr}
|
|
10003840: 43c9 mvns r1, r1
|
|
10003842: 4240 negs r0, r0
|
|
10003844: d100 bne.n 10003848 <l39_1>
|
|
10003846: 3101 adds r1, #1
|
|
|
|
10003848 <l39_1>:
|
|
10003848: f000 f838 bl 100038bc <divmod_u64u64_unsafe>
|
|
1000384c: 43c9 mvns r1, r1
|
|
1000384e: 4240 negs r0, r0
|
|
10003850: d100 bne.n 10003854 <l40_1>
|
|
10003852: 3101 adds r1, #1
|
|
|
|
10003854 <l40_1>:
|
|
10003854: 43db mvns r3, r3
|
|
10003856: 4252 negs r2, r2
|
|
10003858: d100 bne.n 1000385c <l41_1>
|
|
1000385a: 3301 adds r3, #1
|
|
|
|
1000385c <l41_1>:
|
|
1000385c: bd00 pop {pc}
|
|
1000385e: 2a00 cmp r2, #0
|
|
10003860: d1eb bne.n 1000383a <divmod_s64s64_unsafe+0x6>
|
|
10003862: 2800 cmp r0, #0
|
|
10003864: d101 bne.n 1000386a <l41_1+0xe>
|
|
10003866: 2900 cmp r1, #0
|
|
10003868: d005 beq.n 10003876 <l41_1+0x1a>
|
|
1000386a: 2000 movs r0, #0
|
|
1000386c: 0fc9 lsrs r1, r1, #31
|
|
1000386e: 07c9 lsls r1, r1, #31
|
|
10003870: d101 bne.n 10003876 <l41_1+0x1a>
|
|
10003872: 43c0 mvns r0, r0
|
|
10003874: 0841 lsrs r1, r0, #1
|
|
10003876: b500 push {lr}
|
|
10003878: f001 ffd2 bl 10005820 <____aeabi_ldiv0_veneer>
|
|
1000387c: 2200 movs r2, #0
|
|
1000387e: 2300 movs r3, #0
|
|
10003880: bd00 pop {pc}
|
|
10003882: b500 push {lr}
|
|
10003884: 2900 cmp r1, #0
|
|
10003886: db0a blt.n 1000389e <l43_1+0x2>
|
|
10003888: 43db mvns r3, r3
|
|
1000388a: 4252 negs r2, r2
|
|
1000388c: d100 bne.n 10003890 <l42_1>
|
|
1000388e: 3301 adds r3, #1
|
|
|
|
10003890 <l42_1>:
|
|
10003890: f000 f814 bl 100038bc <divmod_u64u64_unsafe>
|
|
10003894: 43c9 mvns r1, r1
|
|
10003896: 4240 negs r0, r0
|
|
10003898: d100 bne.n 1000389c <l43_1>
|
|
1000389a: 3101 adds r1, #1
|
|
|
|
1000389c <l43_1>:
|
|
1000389c: bd00 pop {pc}
|
|
1000389e: 43c9 mvns r1, r1
|
|
100038a0: 4240 negs r0, r0
|
|
100038a2: d100 bne.n 100038a6 <l44_1>
|
|
100038a4: 3101 adds r1, #1
|
|
|
|
100038a6 <l44_1>:
|
|
100038a6: 43db mvns r3, r3
|
|
100038a8: 4252 negs r2, r2
|
|
100038aa: d100 bne.n 100038ae <l45_1>
|
|
100038ac: 3301 adds r3, #1
|
|
|
|
100038ae <l45_1>:
|
|
100038ae: f000 f805 bl 100038bc <divmod_u64u64_unsafe>
|
|
100038b2: 43db mvns r3, r3
|
|
100038b4: 4252 negs r2, r2
|
|
100038b6: d100 bne.n 100038ba <l46_1>
|
|
100038b8: 3301 adds r3, #1
|
|
|
|
100038ba <l46_1>:
|
|
100038ba: bd00 pop {pc}
|
|
|
|
100038bc <divmod_u64u64_unsafe>:
|
|
100038bc: 2900 cmp r1, #0
|
|
100038be: d123 bne.n 10003908 <y64>
|
|
100038c0: 2b00 cmp r3, #0
|
|
100038c2: d118 bne.n 100038f6 <udiv0+0x10>
|
|
100038c4: 2a00 cmp r2, #0
|
|
100038c6: d00c beq.n 100038e2 <divmod_u64u64_unsafe+0x26>
|
|
100038c8: 46bc mov ip, r7
|
|
100038ca: 4f0d ldr r7, [pc, #52] @ (10003900 <udiv0+0x1a>)
|
|
100038cc: 6638 str r0, [r7, #96] @ 0x60
|
|
100038ce: 667a str r2, [r7, #100] @ 0x64
|
|
100038d0: 2100 movs r1, #0
|
|
100038d2: 2300 movs r3, #0
|
|
100038d4: e7ff b.n 100038d6 <divmod_u64u64_unsafe+0x1a>
|
|
100038d6: e7ff b.n 100038d8 <divmod_u64u64_unsafe+0x1c>
|
|
100038d8: e7ff b.n 100038da <divmod_u64u64_unsafe+0x1e>
|
|
100038da: 6f7a ldr r2, [r7, #116] @ 0x74
|
|
100038dc: 6f38 ldr r0, [r7, #112] @ 0x70
|
|
100038de: 4667 mov r7, ip
|
|
100038e0: 4770 bx lr
|
|
100038e2: 2800 cmp r0, #0
|
|
100038e4: d001 beq.n 100038ea <udiv0+0x4>
|
|
|
|
100038e6 <udiv0>:
|
|
100038e6: 4807 ldr r0, [pc, #28] @ (10003904 <udiv0+0x1e>)
|
|
100038e8: 0001 movs r1, r0
|
|
100038ea: b500 push {lr}
|
|
100038ec: f001 ff98 bl 10005820 <____aeabi_ldiv0_veneer>
|
|
100038f0: 2200 movs r2, #0
|
|
100038f2: 2300 movs r3, #0
|
|
100038f4: bd00 pop {pc}
|
|
100038f6: 0002 movs r2, r0
|
|
100038f8: 000b movs r3, r1
|
|
100038fa: 2000 movs r0, #0
|
|
100038fc: 2100 movs r1, #0
|
|
100038fe: 4770 bx lr
|
|
10003900: d0000000 .word 0xd0000000
|
|
10003904: ffffffff .word 0xffffffff
|
|
|
|
10003908 <y64>:
|
|
10003908: 2b00 cmp r3, #0
|
|
1000390a: d000 beq.n 1000390e <y64+0x6>
|
|
1000390c: e0bf b.n 10003a8e <y64_x48>
|
|
1000390e: 0c13 lsrs r3, r2, #16
|
|
10003910: d128 bne.n 10003964 <y64_x32>
|
|
10003912: 2a00 cmp r2, #0
|
|
10003914: d0e7 beq.n 100038e6 <udiv0>
|
|
10003916: b480 push {r7}
|
|
10003918: 4f11 ldr r7, [pc, #68] @ (10003960 <y64+0x58>)
|
|
1000391a: 6639 str r1, [r7, #96] @ 0x60
|
|
1000391c: 667a str r2, [r7, #100] @ 0x64
|
|
1000391e: e7ff b.n 10003920 <y64+0x18>
|
|
10003920: e7ff b.n 10003922 <y64+0x1a>
|
|
10003922: b430 push {r4, r5}
|
|
10003924: 0c04 lsrs r4, r0, #16
|
|
10003926: 6f7b ldr r3, [r7, #116] @ 0x74
|
|
10003928: 6f39 ldr r1, [r7, #112] @ 0x70
|
|
1000392a: 041b lsls r3, r3, #16
|
|
1000392c: 4323 orrs r3, r4
|
|
1000392e: 663b str r3, [r7, #96] @ 0x60
|
|
10003930: 667a str r2, [r7, #100] @ 0x64
|
|
10003932: e7ff b.n 10003934 <y64+0x2c>
|
|
10003934: e7ff b.n 10003936 <y64+0x2e>
|
|
10003936: e7ff b.n 10003938 <y64+0x30>
|
|
10003938: 46c0 nop @ (mov r8, r8)
|
|
1000393a: b284 uxth r4, r0
|
|
1000393c: 6f7b ldr r3, [r7, #116] @ 0x74
|
|
1000393e: 6f3d ldr r5, [r7, #112] @ 0x70
|
|
10003940: 041b lsls r3, r3, #16
|
|
10003942: 4323 orrs r3, r4
|
|
10003944: 663b str r3, [r7, #96] @ 0x60
|
|
10003946: 667a str r2, [r7, #100] @ 0x64
|
|
10003948: e7ff b.n 1000394a <y64+0x42>
|
|
1000394a: e7ff b.n 1000394c <y64+0x44>
|
|
1000394c: 46c0 nop @ (mov r8, r8)
|
|
1000394e: 2300 movs r3, #0
|
|
10003950: 042c lsls r4, r5, #16
|
|
10003952: 0c2d lsrs r5, r5, #16
|
|
10003954: 6f7a ldr r2, [r7, #116] @ 0x74
|
|
10003956: 6f38 ldr r0, [r7, #112] @ 0x70
|
|
10003958: 1900 adds r0, r0, r4
|
|
1000395a: 4169 adcs r1, r5
|
|
1000395c: bcb0 pop {r4, r5, r7}
|
|
1000395e: 4770 bx lr
|
|
10003960: d0000000 .word 0xd0000000
|
|
|
|
10003964 <y64_x32>:
|
|
10003964: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003966: 4694 mov ip, r2
|
|
10003968: 2500 movs r5, #0
|
|
1000396a: 0e14 lsrs r4, r2, #24
|
|
1000396c: d101 bne.n 10003972 <y64_x32+0xe>
|
|
1000396e: 0212 lsls r2, r2, #8
|
|
10003970: 3508 adds r5, #8
|
|
10003972: 0f14 lsrs r4, r2, #28
|
|
10003974: d101 bne.n 1000397a <y64_x32+0x16>
|
|
10003976: 0112 lsls r2, r2, #4
|
|
10003978: 3504 adds r5, #4
|
|
1000397a: 0f94 lsrs r4, r2, #30
|
|
1000397c: d101 bne.n 10003982 <y64_x32+0x1e>
|
|
1000397e: 0092 lsls r2, r2, #2
|
|
10003980: 3502 adds r5, #2
|
|
10003982: 0fd4 lsrs r4, r2, #31
|
|
10003984: d101 bne.n 1000398a <y64_x32+0x26>
|
|
10003986: 0052 lsls r2, r2, #1
|
|
10003988: 3501 adds r5, #1
|
|
1000398a: 0bd4 lsrs r4, r2, #15
|
|
1000398c: 3401 adds r4, #1
|
|
1000398e: 4f25 ldr r7, [pc, #148] @ (10003a24 <y64_x32+0xc0>)
|
|
10003990: 667c str r4, [r7, #100] @ 0x64
|
|
10003992: 4c25 ldr r4, [pc, #148] @ (10003a28 <y64_x32+0xc4>)
|
|
10003994: 663c str r4, [r7, #96] @ 0x60
|
|
10003996: 0c0e lsrs r6, r1, #16
|
|
10003998: b293 uxth r3, r2
|
|
1000399a: e7ff b.n 1000399c <y64_x32+0x38>
|
|
1000399c: e7ff b.n 1000399e <y64_x32+0x3a>
|
|
1000399e: e7ff b.n 100039a0 <y64_x32+0x3c>
|
|
100039a0: 6f3c ldr r4, [r7, #112] @ 0x70
|
|
100039a2: 4366 muls r6, r4
|
|
100039a4: 0c36 lsrs r6, r6, #16
|
|
100039a6: 0377 lsls r7, r6, #13
|
|
100039a8: 46be mov lr, r7
|
|
100039aa: 4373 muls r3, r6
|
|
100039ac: 0bdf lsrs r7, r3, #15
|
|
100039ae: 045b lsls r3, r3, #17
|
|
100039b0: 1ac0 subs r0, r0, r3
|
|
100039b2: 41b9 sbcs r1, r7
|
|
100039b4: 0c13 lsrs r3, r2, #16
|
|
100039b6: 4373 muls r3, r6
|
|
100039b8: 18db adds r3, r3, r3
|
|
100039ba: 1ac9 subs r1, r1, r3
|
|
100039bc: 08ce lsrs r6, r1, #3
|
|
100039be: 4366 muls r6, r4
|
|
100039c0: 0c36 lsrs r6, r6, #16
|
|
100039c2: 44b6 add lr, r6
|
|
100039c4: b293 uxth r3, r2
|
|
100039c6: 4373 muls r3, r6
|
|
100039c8: 0f1f lsrs r7, r3, #28
|
|
100039ca: 011b lsls r3, r3, #4
|
|
100039cc: 1ac0 subs r0, r0, r3
|
|
100039ce: 41b9 sbcs r1, r7
|
|
100039d0: 0c13 lsrs r3, r2, #16
|
|
100039d2: 4373 muls r3, r6
|
|
100039d4: 0b1f lsrs r7, r3, #12
|
|
100039d6: 051b lsls r3, r3, #20
|
|
100039d8: 1ac0 subs r0, r0, r3
|
|
100039da: 41b9 sbcs r1, r7
|
|
100039dc: 0d86 lsrs r6, r0, #22
|
|
100039de: 028f lsls r7, r1, #10
|
|
100039e0: 433e orrs r6, r7
|
|
100039e2: 4366 muls r6, r4
|
|
100039e4: 0c36 lsrs r6, r6, #16
|
|
100039e6: 2d09 cmp r5, #9
|
|
100039e8: db24 blt.n 10003a34 <last0>
|
|
100039ea: 0a52 lsrs r2, r2, #9
|
|
100039ec: 4372 muls r2, r6
|
|
100039ee: 1a80 subs r0, r0, r2
|
|
100039f0: 0377 lsls r7, r6, #13
|
|
100039f2: 0a46 lsrs r6, r0, #9
|
|
100039f4: 4366 muls r6, r4
|
|
100039f6: 0c36 lsrs r6, r6, #16
|
|
100039f8: 2316 movs r3, #22
|
|
100039fa: 1b5b subs r3, r3, r5
|
|
100039fc: 40de lsrs r6, r3
|
|
100039fe: 40df lsrs r7, r3
|
|
10003a00: 19bf adds r7, r7, r6
|
|
10003a02: 4664 mov r4, ip
|
|
10003a04: 4366 muls r6, r4
|
|
10003a06: 1b82 subs r2, r0, r6
|
|
10003a08: 4670 mov r0, lr
|
|
10003a0a: 3504 adds r5, #4
|
|
10003a0c: 3306 adds r3, #6
|
|
10003a0e: 0001 movs r1, r0
|
|
10003a10: 40d9 lsrs r1, r3
|
|
10003a12: 40a8 lsls r0, r5
|
|
10003a14: 19c0 adds r0, r0, r7
|
|
10003a16: d300 bcc.n 10003a1a <y64_x32+0xb6>
|
|
10003a18: 3101 adds r1, #1
|
|
10003a1a: 42a2 cmp r2, r4
|
|
10003a1c: d206 bcs.n 10003a2c <y64_x32+0xc8>
|
|
10003a1e: 2300 movs r3, #0
|
|
10003a20: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003a22: 0000 .short 0x0000
|
|
10003a24: d0000000 .word 0xd0000000
|
|
10003a28: ffffffff .word 0xffffffff
|
|
10003a2c: 1b12 subs r2, r2, r4
|
|
10003a2e: 3001 adds r0, #1
|
|
10003a30: d3f3 bcc.n 10003a1a <y64_x32+0xb6>
|
|
10003a32: e7f1 b.n 10003a18 <y64_x32+0xb4>
|
|
|
|
10003a34 <last0>:
|
|
10003a34: 2709 movs r7, #9
|
|
10003a36: 1b7f subs r7, r7, r5
|
|
10003a38: 40fe lsrs r6, r7
|
|
10003a3a: 4664 mov r4, ip
|
|
10003a3c: b2a2 uxth r2, r4
|
|
10003a3e: 4372 muls r2, r6
|
|
10003a40: 1a80 subs r0, r0, r2
|
|
10003a42: d200 bcs.n 10003a46 <last0+0x12>
|
|
10003a44: 3901 subs r1, #1
|
|
10003a46: 0c22 lsrs r2, r4, #16
|
|
10003a48: 4372 muls r2, r6
|
|
10003a4a: 0c13 lsrs r3, r2, #16
|
|
10003a4c: 0412 lsls r2, r2, #16
|
|
10003a4e: 1a82 subs r2, r0, r2
|
|
10003a50: 4199 sbcs r1, r3
|
|
10003a52: 000b movs r3, r1
|
|
10003a54: 4670 mov r0, lr
|
|
10003a56: 3504 adds r5, #4
|
|
10003a58: 3713 adds r7, #19
|
|
10003a5a: 0001 movs r1, r0
|
|
10003a5c: 40f9 lsrs r1, r7
|
|
10003a5e: 40a8 lsls r0, r5
|
|
10003a60: 1980 adds r0, r0, r6
|
|
10003a62: d300 bcc.n 10003a66 <last0+0x32>
|
|
10003a64: 3101 adds r1, #1
|
|
10003a66: 2b00 cmp r3, #0
|
|
10003a68: d102 bne.n 10003a70 <last0+0x3c>
|
|
10003a6a: 42a2 cmp r2, r4
|
|
10003a6c: d20a bcs.n 10003a84 <last0+0x50>
|
|
10003a6e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003a70: 3001 adds r0, #1
|
|
10003a72: d300 bcc.n 10003a76 <last0+0x42>
|
|
10003a74: 3101 adds r1, #1
|
|
10003a76: 1b12 subs r2, r2, r4
|
|
10003a78: d2fa bcs.n 10003a70 <last0+0x3c>
|
|
10003a7a: 3b01 subs r3, #1
|
|
10003a7c: d1f8 bne.n 10003a70 <last0+0x3c>
|
|
10003a7e: 42a2 cmp r2, r4
|
|
10003a80: d200 bcs.n 10003a84 <last0+0x50>
|
|
10003a82: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003a84: 3001 adds r0, #1
|
|
10003a86: d300 bcc.n 10003a8a <last0+0x56>
|
|
10003a88: 3101 adds r1, #1
|
|
10003a8a: 1b12 subs r2, r2, r4
|
|
10003a8c: e7f7 b.n 10003a7e <last0+0x4a>
|
|
|
|
10003a8e <y64_x48>:
|
|
10003a8e: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003a90: 0c1c lsrs r4, r3, #16
|
|
10003a92: d000 beq.n 10003a96 <y64_x48+0x8>
|
|
10003a94: e080 b.n 10003b98 <y64_x64>
|
|
10003a96: b40c push {r2, r3}
|
|
10003a98: 2500 movs r5, #0
|
|
10003a9a: 0a1c lsrs r4, r3, #8
|
|
10003a9c: d104 bne.n 10003aa8 <y64_x48+0x1a>
|
|
10003a9e: 021b lsls r3, r3, #8
|
|
10003aa0: 0e16 lsrs r6, r2, #24
|
|
10003aa2: 4333 orrs r3, r6
|
|
10003aa4: 0212 lsls r2, r2, #8
|
|
10003aa6: 3508 adds r5, #8
|
|
10003aa8: 0b1c lsrs r4, r3, #12
|
|
10003aaa: d104 bne.n 10003ab6 <y64_x48+0x28>
|
|
10003aac: 011b lsls r3, r3, #4
|
|
10003aae: 0f16 lsrs r6, r2, #28
|
|
10003ab0: 4333 orrs r3, r6
|
|
10003ab2: 0112 lsls r2, r2, #4
|
|
10003ab4: 3504 adds r5, #4
|
|
10003ab6: 0b9c lsrs r4, r3, #14
|
|
10003ab8: d104 bne.n 10003ac4 <y64_x48+0x36>
|
|
10003aba: 009b lsls r3, r3, #2
|
|
10003abc: 0f96 lsrs r6, r2, #30
|
|
10003abe: 4333 orrs r3, r6
|
|
10003ac0: 0092 lsls r2, r2, #2
|
|
10003ac2: 3502 adds r5, #2
|
|
10003ac4: 0bdc lsrs r4, r3, #15
|
|
10003ac6: d102 bne.n 10003ace <y64_x48+0x40>
|
|
10003ac8: 1892 adds r2, r2, r2
|
|
10003aca: 415b adcs r3, r3
|
|
10003acc: 3501 adds r5, #1
|
|
10003ace: 001c movs r4, r3
|
|
10003ad0: 1897 adds r7, r2, r2
|
|
10003ad2: 4164 adcs r4, r4
|
|
10003ad4: 3401 adds r4, #1
|
|
10003ad6: 4f46 ldr r7, [pc, #280] @ (10003bf0 <y64_x64+0x58>)
|
|
10003ad8: 667c str r4, [r7, #100] @ 0x64
|
|
10003ada: 4c46 ldr r4, [pc, #280] @ (10003bf4 <y64_x64+0x5c>)
|
|
10003adc: 663c str r4, [r7, #96] @ 0x60
|
|
10003ade: 0c0e lsrs r6, r1, #16
|
|
10003ae0: e7ff b.n 10003ae2 <y64_x48+0x54>
|
|
10003ae2: e7ff b.n 10003ae4 <y64_x48+0x56>
|
|
10003ae4: e7ff b.n 10003ae6 <y64_x48+0x58>
|
|
10003ae6: 46c0 nop @ (mov r8, r8)
|
|
10003ae8: 6f3c ldr r4, [r7, #112] @ 0x70
|
|
10003aea: 4366 muls r6, r4
|
|
10003aec: 0c36 lsrs r6, r6, #16
|
|
10003aee: 0377 lsls r7, r6, #13
|
|
10003af0: 46be mov lr, r7
|
|
10003af2: b297 uxth r7, r2
|
|
10003af4: 4377 muls r7, r6
|
|
10003af6: 1bc0 subs r0, r0, r7
|
|
10003af8: d200 bcs.n 10003afc <y64_x48+0x6e>
|
|
10003afa: 3901 subs r1, #1
|
|
10003afc: 1bc0 subs r0, r0, r7
|
|
10003afe: d200 bcs.n 10003b02 <y64_x48+0x74>
|
|
10003b00: 3901 subs r1, #1
|
|
10003b02: b29f uxth r7, r3
|
|
10003b04: 4377 muls r7, r6
|
|
10003b06: 1bc9 subs r1, r1, r7
|
|
10003b08: 1bc9 subs r1, r1, r7
|
|
10003b0a: 0c17 lsrs r7, r2, #16
|
|
10003b0c: 4377 muls r7, r6
|
|
10003b0e: 047e lsls r6, r7, #17
|
|
10003b10: 0bff lsrs r7, r7, #15
|
|
10003b12: 1b80 subs r0, r0, r6
|
|
10003b14: 41b9 sbcs r1, r7
|
|
10003b16: 08ce lsrs r6, r1, #3
|
|
10003b18: 4366 muls r6, r4
|
|
10003b1a: 0c36 lsrs r6, r6, #16
|
|
10003b1c: 2d0c cmp r5, #12
|
|
10003b1e: db33 blt.n 10003b88 <last1>
|
|
10003b20: 44b6 add lr, r6
|
|
10003b22: 0b12 lsrs r2, r2, #12
|
|
10003b24: 051f lsls r7, r3, #20
|
|
10003b26: 433a orrs r2, r7
|
|
10003b28: 0b1b lsrs r3, r3, #12
|
|
10003b2a: b297 uxth r7, r2
|
|
10003b2c: 4377 muls r7, r6
|
|
10003b2e: 1bc0 subs r0, r0, r7
|
|
10003b30: d200 bcs.n 10003b34 <y64_x48+0xa6>
|
|
10003b32: 3901 subs r1, #1
|
|
10003b34: b29f uxth r7, r3
|
|
10003b36: 4377 muls r7, r6
|
|
10003b38: 1bc9 subs r1, r1, r7
|
|
10003b3a: 0c17 lsrs r7, r2, #16
|
|
10003b3c: 4377 muls r7, r6
|
|
10003b3e: 043e lsls r6, r7, #16
|
|
10003b40: 0c3f lsrs r7, r7, #16
|
|
10003b42: 1b80 subs r0, r0, r6
|
|
10003b44: 41b9 sbcs r1, r7
|
|
10003b46: 0d86 lsrs r6, r0, #22
|
|
10003b48: 028f lsls r7, r1, #10
|
|
10003b4a: 433e orrs r6, r7
|
|
10003b4c: 4366 muls r6, r4
|
|
10003b4e: 2729 movs r7, #41 @ 0x29
|
|
10003b50: 1b7f subs r7, r7, r5
|
|
10003b52: 40fe lsrs r6, r7
|
|
10003b54: 3d0c subs r5, #12
|
|
10003b56: 4677 mov r7, lr
|
|
10003b58: 40af lsls r7, r5
|
|
10003b5a: 19bf adds r7, r7, r6
|
|
10003b5c: bc30 pop {r4, r5}
|
|
10003b5e: b2a2 uxth r2, r4
|
|
10003b60: b2ab uxth r3, r5
|
|
10003b62: 4372 muls r2, r6
|
|
10003b64: 4373 muls r3, r6
|
|
10003b66: 1a80 subs r0, r0, r2
|
|
10003b68: 4199 sbcs r1, r3
|
|
10003b6a: 0c22 lsrs r2, r4, #16
|
|
10003b6c: 4372 muls r2, r6
|
|
10003b6e: 0c13 lsrs r3, r2, #16
|
|
10003b70: 0412 lsls r2, r2, #16
|
|
10003b72: 1a80 subs r0, r0, r2
|
|
10003b74: 4199 sbcs r1, r3
|
|
10003b76: 0002 movs r2, r0
|
|
10003b78: 000b movs r3, r1
|
|
10003b7a: 3701 adds r7, #1
|
|
10003b7c: 1b00 subs r0, r0, r4
|
|
10003b7e: 41a9 sbcs r1, r5
|
|
10003b80: d2f9 bcs.n 10003b76 <y64_x48+0xe8>
|
|
10003b82: 1e78 subs r0, r7, #1
|
|
10003b84: 2100 movs r1, #0
|
|
10003b86: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003b88 <last1>:
|
|
10003b88: 270c movs r7, #12
|
|
10003b8a: 1b7f subs r7, r7, r5
|
|
10003b8c: 40fe lsrs r6, r7
|
|
10003b8e: 4677 mov r7, lr
|
|
10003b90: 0b7f lsrs r7, r7, #13
|
|
10003b92: 40af lsls r7, r5
|
|
10003b94: 19ff adds r7, r7, r7
|
|
10003b96: e7e0 b.n 10003b5a <y64_x48+0xcc>
|
|
|
|
10003b98 <y64_x64>:
|
|
10003b98: 2400 movs r4, #0
|
|
10003b9a: 1c5d adds r5, r3, #1
|
|
10003b9c: d007 beq.n 10003bae <y64_x64+0x16>
|
|
10003b9e: 4f14 ldr r7, [pc, #80] @ (10003bf0 <y64_x64+0x58>)
|
|
10003ba0: 667d str r5, [r7, #100] @ 0x64
|
|
10003ba2: 6639 str r1, [r7, #96] @ 0x60
|
|
10003ba4: e7ff b.n 10003ba6 <y64_x64+0xe>
|
|
10003ba6: e7ff b.n 10003ba8 <y64_x64+0x10>
|
|
10003ba8: e7ff b.n 10003baa <y64_x64+0x12>
|
|
10003baa: e7ff b.n 10003bac <y64_x64+0x14>
|
|
10003bac: 6f3c ldr r4, [r7, #112] @ 0x70
|
|
10003bae: b295 uxth r5, r2
|
|
10003bb0: b29e uxth r6, r3
|
|
10003bb2: 4365 muls r5, r4
|
|
10003bb4: 4366 muls r6, r4
|
|
10003bb6: 1b40 subs r0, r0, r5
|
|
10003bb8: 41b1 sbcs r1, r6
|
|
10003bba: 0c15 lsrs r5, r2, #16
|
|
10003bbc: 0c1e lsrs r6, r3, #16
|
|
10003bbe: 4365 muls r5, r4
|
|
10003bc0: 4366 muls r6, r4
|
|
10003bc2: 0436 lsls r6, r6, #16
|
|
10003bc4: 0c2f lsrs r7, r5, #16
|
|
10003bc6: 433e orrs r6, r7
|
|
10003bc8: 042d lsls r5, r5, #16
|
|
10003bca: 1b40 subs r0, r0, r5
|
|
10003bcc: 41b1 sbcs r1, r6
|
|
10003bce: 4299 cmp r1, r3
|
|
10003bd0: d204 bcs.n 10003bdc <y64_x64+0x44>
|
|
10003bd2: 0002 movs r2, r0
|
|
10003bd4: 000b movs r3, r1
|
|
10003bd6: 0020 movs r0, r4
|
|
10003bd8: 2100 movs r1, #0
|
|
10003bda: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003bdc: d101 bne.n 10003be2 <y64_x64+0x4a>
|
|
10003bde: 4290 cmp r0, r2
|
|
10003be0: d3f7 bcc.n 10003bd2 <y64_x64+0x3a>
|
|
10003be2: 1a80 subs r0, r0, r2
|
|
10003be4: 4199 sbcs r1, r3
|
|
10003be6: 3401 adds r4, #1
|
|
10003be8: 4299 cmp r1, r3
|
|
10003bea: d3f2 bcc.n 10003bd2 <y64_x64+0x3a>
|
|
10003bec: e7f6 b.n 10003bdc <y64_x64+0x44>
|
|
10003bee: 0000 .short 0x0000
|
|
10003bf0: d0000000 .word 0xd0000000
|
|
10003bf4: ffffffff .word 0xffffffff
|
|
|
|
10003bf8 <__wrap___aeabi_drsub>:
|
|
10003bf8: 4048 eors r0, r1
|
|
10003bfa: 4041 eors r1, r0
|
|
10003bfc: 4048 eors r0, r1
|
|
|
|
10003bfe <__wrap___aeabi_dsub>:
|
|
10003bfe: b418 push {r3, r4}
|
|
10003c00: 4b1b ldr r3, [pc, #108] @ (10003c70 <__wrap___aeabi_dmul+0x12>)
|
|
10003c02: 685b ldr r3, [r3, #4]
|
|
10003c04: 46fc mov ip, pc
|
|
10003c06: 9301 str r3, [sp, #4]
|
|
10003c08: bd08 pop {r3, pc}
|
|
10003c0a: df04 .short 0xdf04
|
|
10003c0c: 10003ed7 .word 0x10003ed7
|
|
|
|
10003c10 <__wrap___aeabi_dadd>:
|
|
10003c10: b418 push {r3, r4}
|
|
10003c12: 4b17 ldr r3, [pc, #92] @ (10003c70 <__wrap___aeabi_dmul+0x12>)
|
|
10003c14: 681b ldr r3, [r3, #0]
|
|
10003c16: 46fc mov ip, pc
|
|
10003c18: 9301 str r3, [sp, #4]
|
|
10003c1a: bd08 pop {r3, pc}
|
|
10003c1c: 3ee1df00 .word 0x3ee1df00
|
|
10003c20: 1000 .short 0x1000
|
|
|
|
10003c22 <__wrap___aeabi_ddiv>:
|
|
10003c22: 4694 mov ip, r2
|
|
10003c24: 4a13 ldr r2, [pc, #76] @ (10003c74 <__wrap___aeabi_dmul+0x16>)
|
|
10003c26: 6f92 ldr r2, [r2, #120] @ 0x78
|
|
10003c28: 0892 lsrs r2, r2, #2
|
|
10003c2a: d209 bcs.n 10003c40 <ddiv_save_state>
|
|
10003c2c: 4662 mov r2, ip
|
|
|
|
10003c2e <ddiv_shim_call>:
|
|
10003c2e: b418 push {r3, r4}
|
|
10003c30: 4b0f ldr r3, [pc, #60] @ (10003c70 <__wrap___aeabi_dmul+0x12>)
|
|
10003c32: 68db ldr r3, [r3, #12]
|
|
10003c34: 46fc mov ip, pc
|
|
10003c36: 9301 str r3, [sp, #4]
|
|
10003c38: bd08 pop {r3, pc}
|
|
10003c3a: df0c .short 0xdf0c
|
|
10003c3c: 10004199 .word 0x10004199
|
|
|
|
10003c40 <ddiv_save_state>:
|
|
10003c40: 4a0c ldr r2, [pc, #48] @ (10003c74 <__wrap___aeabi_dmul+0x16>)
|
|
10003c42: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003c44: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
10003c46: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
10003c48: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
10003c4a: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
10003c4c: 4662 mov r2, ip
|
|
10003c4e: f7ff ffee bl 10003c2e <ddiv_shim_call>
|
|
10003c52: 4a08 ldr r2, [pc, #32] @ (10003c74 <__wrap___aeabi_dmul+0x16>)
|
|
10003c54: 6614 str r4, [r2, #96] @ 0x60
|
|
10003c56: 6655 str r5, [r2, #100] @ 0x64
|
|
10003c58: 6757 str r7, [r2, #116] @ 0x74
|
|
10003c5a: 6716 str r6, [r2, #112] @ 0x70
|
|
10003c5c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003c5e <__wrap___aeabi_dmul>:
|
|
10003c5e: b418 push {r3, r4}
|
|
10003c60: 4b03 ldr r3, [pc, #12] @ (10003c70 <__wrap___aeabi_dmul+0x12>)
|
|
10003c62: 689b ldr r3, [r3, #8]
|
|
10003c64: 46fc mov ip, pc
|
|
10003c66: 9301 str r3, [sp, #4]
|
|
10003c68: bd08 pop {r3, pc}
|
|
10003c6a: df08 .short 0xdf08
|
|
10003c6c: 1000403d .word 0x1000403d
|
|
10003c70: 20000b68 .word 0x20000b68
|
|
10003c74: d0000000 .word 0xd0000000
|
|
|
|
10003c78 <__wrap___aeabi_cdrcmple>:
|
|
10003c78: b5ff push {r0, r1, r2, r3, r4, r5, r6, r7, lr}
|
|
10003c7a: 4050 eors r0, r2
|
|
10003c7c: 4042 eors r2, r0
|
|
10003c7e: 4050 eors r0, r2
|
|
10003c80: 4059 eors r1, r3
|
|
10003c82: 404b eors r3, r1
|
|
10003c84: 4059 eors r1, r3
|
|
10003c86: e000 b.n 10003c8a <__aeabi_dfcmple_guts>
|
|
|
|
10003c88 <__wrap___aeabi_cdcmpeq>:
|
|
10003c88: b5ff push {r0, r1, r2, r3, r4, r5, r6, r7, lr}
|
|
|
|
10003c8a <__aeabi_dfcmple_guts>:
|
|
10003c8a: 4f15 ldr r7, [pc, #84] @ (10003ce0 <__aeabi_dfcmple_guts+0x56>)
|
|
10003c8c: 004c lsls r4, r1, #1
|
|
10003c8e: 0d64 lsrs r4, r4, #21
|
|
10003c90: d003 beq.n 10003c9a <__aeabi_dfcmple_guts+0x10>
|
|
10003c92: 42bc cmp r4, r7
|
|
10003c94: d104 bne.n 10003ca0 <__aeabi_dfcmple_guts+0x16>
|
|
10003c96: 030c lsls r4, r1, #12
|
|
10003c98: d814 bhi.n 10003cc4 <__aeabi_dfcmple_guts+0x3a>
|
|
10003c9a: 2000 movs r0, #0
|
|
10003c9c: 0d09 lsrs r1, r1, #20
|
|
10003c9e: 0509 lsls r1, r1, #20
|
|
10003ca0: 005c lsls r4, r3, #1
|
|
10003ca2: 0d64 lsrs r4, r4, #21
|
|
10003ca4: d003 beq.n 10003cae <__aeabi_dfcmple_guts+0x24>
|
|
10003ca6: 42bc cmp r4, r7
|
|
10003ca8: d104 bne.n 10003cb4 <__aeabi_dfcmple_guts+0x2a>
|
|
10003caa: 031c lsls r4, r3, #12
|
|
10003cac: d80a bhi.n 10003cc4 <__aeabi_dfcmple_guts+0x3a>
|
|
10003cae: 2200 movs r2, #0
|
|
10003cb0: 0d1b lsrs r3, r3, #20
|
|
10003cb2: 051b lsls r3, r3, #20
|
|
10003cb4: 2601 movs r6, #1
|
|
10003cb6: 404b eors r3, r1
|
|
10003cb8: d409 bmi.n 10003cce <__aeabi_dfcmple_guts+0x44>
|
|
10003cba: 404b eors r3, r1
|
|
10003cbc: d503 bpl.n 10003cc6 <__aeabi_dfcmple_guts+0x3c>
|
|
10003cbe: 428b cmp r3, r1
|
|
10003cc0: d100 bne.n 10003cc4 <__aeabi_dfcmple_guts+0x3a>
|
|
10003cc2: 4282 cmp r2, r0
|
|
10003cc4: bdff pop {r0, r1, r2, r3, r4, r5, r6, r7, pc}
|
|
10003cc6: 4299 cmp r1, r3
|
|
10003cc8: d1fc bne.n 10003cc4 <__aeabi_dfcmple_guts+0x3a>
|
|
10003cca: 4290 cmp r0, r2
|
|
10003ccc: bdff pop {r0, r1, r2, r3, r4, r5, r6, r7, pc}
|
|
10003cce: 430b orrs r3, r1
|
|
10003cd0: 18db adds r3, r3, r3
|
|
10003cd2: 4303 orrs r3, r0
|
|
10003cd4: 4313 orrs r3, r2
|
|
10003cd6: d0f5 beq.n 10003cc4 <__aeabi_dfcmple_guts+0x3a>
|
|
10003cd8: 43c9 mvns r1, r1
|
|
10003cda: 1849 adds r1, r1, r1
|
|
10003cdc: bdff pop {r0, r1, r2, r3, r4, r5, r6, r7, pc}
|
|
10003cde: 0000 .short 0x0000
|
|
10003ce0: 000007ff .word 0x000007ff
|
|
|
|
10003ce4 <__wrap___aeabi_dcmplt>:
|
|
10003ce4: b500 push {lr}
|
|
10003ce6: f7ff ffcf bl 10003c88 <__wrap___aeabi_cdcmpeq>
|
|
10003cea: 4180 sbcs r0, r0
|
|
10003cec: bd00 pop {pc}
|
|
10003cee: 46c0 nop @ (mov r8, r8)
|
|
|
|
10003cf0 <__wrap___aeabi_dcmple>:
|
|
10003cf0: b500 push {lr}
|
|
10003cf2: f7ff ffc9 bl 10003c88 <__wrap___aeabi_cdcmpeq>
|
|
10003cf6: d901 bls.n 10003cfc <__wrap___aeabi_dcmple+0xc>
|
|
10003cf8: 2000 movs r0, #0
|
|
10003cfa: bd00 pop {pc}
|
|
10003cfc: 2001 movs r0, #1
|
|
10003cfe: bd00 pop {pc}
|
|
|
|
10003d00 <__wrap___aeabi_dcmpge>:
|
|
10003d00: b500 push {lr}
|
|
10003d02: f7ff ffb9 bl 10003c78 <__wrap___aeabi_cdrcmple>
|
|
10003d06: d901 bls.n 10003d0c <__wrap___aeabi_dcmpge+0xc>
|
|
10003d08: 2000 movs r0, #0
|
|
10003d0a: bd00 pop {pc}
|
|
10003d0c: 2001 movs r0, #1
|
|
10003d0e: bd00 pop {pc}
|
|
|
|
10003d10 <__wrap___aeabi_dcmpgt>:
|
|
10003d10: b500 push {lr}
|
|
10003d12: f7ff ffb1 bl 10003c78 <__wrap___aeabi_cdrcmple>
|
|
10003d16: 4180 sbcs r0, r0
|
|
10003d18: bd00 pop {pc}
|
|
|
|
10003d1a <__wrap___aeabi_dcmpun>:
|
|
10003d1a: 2001 movs r0, #1
|
|
10003d1c: 0540 lsls r0, r0, #21
|
|
10003d1e: 004a lsls r2, r1, #1
|
|
10003d20: 1812 adds r2, r2, r0
|
|
10003d22: d804 bhi.n 10003d2e <__wrap___aeabi_dcmpun+0x14>
|
|
10003d24: 005a lsls r2, r3, #1
|
|
10003d26: 1812 adds r2, r2, r0
|
|
10003d28: d801 bhi.n 10003d2e <__wrap___aeabi_dcmpun+0x14>
|
|
10003d2a: 2000 movs r0, #0
|
|
10003d2c: 4770 bx lr
|
|
10003d2e: 2001 movs r0, #1
|
|
10003d30: 4770 bx lr
|
|
10003d32: 2000 movs r0, #0
|
|
10003d34: 4770 bx lr
|
|
...
|
|
|
|
10003d38 <__wrap___aeabi_ui2d>:
|
|
10003d38: 2100 movs r1, #0
|
|
10003d3a: 2800 cmp r0, #0
|
|
10003d3c: d105 bne.n 10003d4a <__wrap___aeabi_i2d+0xa>
|
|
10003d3e: 4770 bx lr
|
|
|
|
10003d40 <__wrap___aeabi_i2d>:
|
|
10003d40: 17c1 asrs r1, r0, #31
|
|
10003d42: 4048 eors r0, r1
|
|
10003d44: 1a40 subs r0, r0, r1
|
|
10003d46: d0fa beq.n 10003d3e <__wrap___aeabi_ui2d+0x6>
|
|
10003d48: 07c9 lsls r1, r1, #31
|
|
10003d4a: b513 push {r0, r1, r4, lr}
|
|
10003d4c: 4b06 ldr r3, [pc, #24] @ (10003d68 <__wrap___aeabi_i2d+0x28>)
|
|
10003d4e: 681b ldr r3, [r3, #0]
|
|
10003d50: 4798 blx r3
|
|
10003d52: bc0c pop {r2, r3}
|
|
10003d54: 1c44 adds r4, r0, #1
|
|
10003d56: 40a2 lsls r2, r4
|
|
10003d58: 0510 lsls r0, r2, #20
|
|
10003d5a: 0b12 lsrs r2, r2, #12
|
|
10003d5c: 4903 ldr r1, [pc, #12] @ (10003d6c <__wrap___aeabi_i2d+0x2c>)
|
|
10003d5e: 1b09 subs r1, r1, r4
|
|
10003d60: 0509 lsls r1, r1, #20
|
|
10003d62: 4319 orrs r1, r3
|
|
10003d64: 4311 orrs r1, r2
|
|
10003d66: bd10 pop {r4, pc}
|
|
10003d68: 20000c68 .word 0x20000c68
|
|
10003d6c: 0000041f .word 0x0000041f
|
|
|
|
10003d70 <__wrap___aeabi_d2iz>:
|
|
10003d70: b510 push {r4, lr}
|
|
10003d72: 004c lsls r4, r1, #1
|
|
10003d74: 0d62 lsrs r2, r4, #21
|
|
10003d76: 2380 movs r3, #128 @ 0x80
|
|
10003d78: 18d2 adds r2, r2, r3
|
|
10003d7a: 00db lsls r3, r3, #3
|
|
10003d7c: 1ad2 subs r2, r2, r3
|
|
10003d7e: 055b lsls r3, r3, #21
|
|
10003d80: 2a7e cmp r2, #126 @ 0x7e
|
|
10003d82: dd10 ble.n 10003da6 <__wrap___aeabi_d2iz+0x36>
|
|
10003d84: 3a9e subs r2, #158 @ 0x9e
|
|
10003d86: da13 bge.n 10003db0 <__wrap___aeabi_d2iz+0x40>
|
|
10003d88: 17cc asrs r4, r1, #31
|
|
10003d8a: 0309 lsls r1, r1, #12
|
|
10003d8c: 0849 lsrs r1, r1, #1
|
|
10003d8e: 4319 orrs r1, r3
|
|
10003d90: 4252 negs r2, r2
|
|
10003d92: 40d1 lsrs r1, r2
|
|
10003d94: 0064 lsls r4, r4, #1
|
|
10003d96: 3401 adds r4, #1
|
|
10003d98: 3215 adds r2, #21
|
|
10003d9a: 2a20 cmp r2, #32
|
|
10003d9c: da05 bge.n 10003daa <__wrap___aeabi_d2iz+0x3a>
|
|
10003d9e: 40d0 lsrs r0, r2
|
|
10003da0: 4308 orrs r0, r1
|
|
10003da2: 4360 muls r0, r4
|
|
10003da4: bd10 pop {r4, pc}
|
|
10003da6: 2000 movs r0, #0
|
|
10003da8: bd10 pop {r4, pc}
|
|
10003daa: 4608 mov r0, r1
|
|
10003dac: 4360 muls r0, r4
|
|
10003dae: bd10 pop {r4, pc}
|
|
10003db0: 0fc8 lsrs r0, r1, #31
|
|
10003db2: 18c0 adds r0, r0, r3
|
|
10003db4: 3801 subs r0, #1
|
|
10003db6: bd10 pop {r4, pc}
|
|
|
|
10003db8 <__wrap___aeabi_d2uiz>:
|
|
10003db8: b418 push {r3, r4}
|
|
10003dba: 4b04 ldr r3, [pc, #16] @ (10003dcc <__wrap___aeabi_d2uiz+0x14>)
|
|
10003dbc: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10003dbe: 46fc mov ip, pc
|
|
10003dc0: 9301 str r3, [sp, #4]
|
|
10003dc2: bd08 pop {r3, pc}
|
|
10003dc4: 4349df24 .word 0x4349df24
|
|
10003dc8: 00001000 .word 0x00001000
|
|
10003dcc: 20000b68 .word 0x20000b68
|
|
|
|
10003dd0 <__aeabi_double_init>:
|
|
10003dd0: b570 push {r4, r5, r6, lr}
|
|
10003dd2: 2313 movs r3, #19
|
|
10003dd4: 781c ldrb r4, [r3, #0]
|
|
10003dd6: 2c01 cmp r4, #1
|
|
10003dd8: d012 beq.n 10003e00 <__aeabi_double_init+0x30>
|
|
10003dda: 2c01 cmp r4, #1
|
|
10003ddc: dc12 bgt.n 10003e04 <__aeabi_double_init+0x34>
|
|
10003dde: 4b21 ldr r3, [pc, #132] @ (10003e64 <__aeabi_double_init+0x94>)
|
|
10003de0: 4a21 ldr r2, [pc, #132] @ (10003e68 <__aeabi_double_init+0x98>)
|
|
10003de2: 6493 str r3, [r2, #72] @ 0x48
|
|
10003de4: 4821 ldr r0, [pc, #132] @ (10003e6c <__aeabi_double_init+0x9c>)
|
|
10003de6: f7ff fc7b bl 100036e0 <rom_func_lookup>
|
|
10003dea: 4b21 ldr r3, [pc, #132] @ (10003e70 <__aeabi_double_init+0xa0>)
|
|
10003dec: 6018 str r0, [r3, #0]
|
|
10003dee: bd70 pop {r4, r5, r6, pc}
|
|
10003df0: 491c ldr r1, [pc, #112] @ (10003e64 <__aeabi_double_init+0x94>)
|
|
10003df2: 4a1d ldr r2, [pc, #116] @ (10003e68 <__aeabi_double_init+0x98>)
|
|
10003df4: 0098 lsls r0, r3, #2
|
|
10003df6: 5081 str r1, [r0, r2]
|
|
10003df8: 3301 adds r3, #1
|
|
10003dfa: 2b1f cmp r3, #31
|
|
10003dfc: d9f8 bls.n 10003df0 <__aeabi_double_init+0x20>
|
|
10003dfe: e7ec b.n 10003dda <__aeabi_double_init+0xa>
|
|
10003e00: 2300 movs r3, #0
|
|
10003e02: e7fa b.n 10003dfa <__aeabi_double_init+0x2a>
|
|
10003e04: 481b ldr r0, [pc, #108] @ (10003e74 <__aeabi_double_init+0xa4>)
|
|
10003e06: f7ff fc73 bl 100036f0 <rom_data_lookup>
|
|
10003e0a: 0005 movs r5, r0
|
|
10003e0c: 481a ldr r0, [pc, #104] @ (10003e78 <__aeabi_double_init+0xa8>)
|
|
10003e0e: f7ff fc6f bl 100036f0 <rom_data_lookup>
|
|
10003e12: 3802 subs r0, #2
|
|
10003e14: 7803 ldrb r3, [r0, #0]
|
|
10003e16: 009b lsls r3, r3, #2
|
|
10003e18: 2b7f cmp r3, #127 @ 0x7f
|
|
10003e1a: dd09 ble.n 10003e30 <__aeabi_double_init+0x60>
|
|
10003e1c: 4812 ldr r0, [pc, #72] @ (10003e68 <__aeabi_double_init+0x98>)
|
|
10003e1e: 2280 movs r2, #128 @ 0x80
|
|
10003e20: 0029 movs r1, r5
|
|
10003e22: f000 fc29 bl 10004678 <__wrap___aeabi_memcpy>
|
|
10003e26: 2c02 cmp r4, #2
|
|
10003e28: d008 beq.n 10003e3c <__aeabi_double_init+0x6c>
|
|
10003e2a: 2c02 cmp r4, #2
|
|
10003e2c: dcda bgt.n 10003de4 <__aeabi_double_init+0x14>
|
|
10003e2e: e7d6 b.n 10003dde <__aeabi_double_init+0xe>
|
|
10003e30: 4b12 ldr r3, [pc, #72] @ (10003e7c <__aeabi_double_init+0xac>)
|
|
10003e32: 4a13 ldr r2, [pc, #76] @ (10003e80 <__aeabi_double_init+0xb0>)
|
|
10003e34: 4813 ldr r0, [pc, #76] @ (10003e84 <__aeabi_double_init+0xb4>)
|
|
10003e36: 2132 movs r1, #50 @ 0x32
|
|
10003e38: f7fe fabe bl 100023b8 <__assert_func>
|
|
10003e3c: 4b12 ldr r3, [pc, #72] @ (10003e88 <__aeabi_double_init+0xb8>)
|
|
10003e3e: 881a ldrh r2, [r3, #0]
|
|
10003e40: 23b5 movs r3, #181 @ 0xb5
|
|
10003e42: 021b lsls r3, r3, #8
|
|
10003e44: 429a cmp r2, r3
|
|
10003e46: d109 bne.n 10003e5c <__aeabi_double_init+0x8c>
|
|
10003e48: 4b10 ldr r3, [pc, #64] @ (10003e8c <__aeabi_double_init+0xbc>)
|
|
10003e4a: 881a ldrh r2, [r3, #0]
|
|
10003e4c: 4b10 ldr r3, [pc, #64] @ (10003e90 <__aeabi_double_init+0xc0>)
|
|
10003e4e: 429a cmp r2, r3
|
|
10003e50: d104 bne.n 10003e5c <__aeabi_double_init+0x8c>
|
|
10003e52: 4b10 ldr r3, [pc, #64] @ (10003e94 <__aeabi_double_init+0xc4>)
|
|
10003e54: 881a ldrh r2, [r3, #0]
|
|
10003e56: 4b10 ldr r3, [pc, #64] @ (10003e98 <__aeabi_double_init+0xc8>)
|
|
10003e58: 429a cmp r2, r3
|
|
10003e5a: d0e6 beq.n 10003e2a <__aeabi_double_init+0x5a>
|
|
10003e5c: 2000 movs r0, #0
|
|
10003e5e: f7fe fb43 bl 100024e8 <panic>
|
|
10003e62: 46c0 nop @ (mov r8, r8)
|
|
10003e64: 10003e9d .word 0x10003e9d
|
|
10003e68: 20000b68 .word 0x20000b68
|
|
10003e6c: 0000334c .word 0x0000334c
|
|
10003e70: 20000c68 .word 0x20000c68
|
|
10003e74: 00004453 .word 0x00004453
|
|
10003e78: 00004653 .word 0x00004653
|
|
10003e7c: 10006600 .word 0x10006600
|
|
10003e80: 100066b4 .word 0x100066b4
|
|
10003e84: 10006660 .word 0x10006660
|
|
10003e88: 00003854 .word 0x00003854
|
|
10003e8c: 000038d8 .word 0x000038d8
|
|
10003e90: 00004649 .word 0x00004649
|
|
10003e94: 0000389c .word 0x0000389c
|
|
10003e98: 00004659 .word 0x00004659
|
|
|
|
10003e9c <double_table_shim_on_use_helper>:
|
|
10003e9c: b507 push {r0, r1, r2, lr}
|
|
10003e9e: 4660 mov r0, ip
|
|
10003ea0: 2800 cmp r0, #0
|
|
10003ea2: d100 bne.n 10003ea6 <double_table_shim_on_use_helper+0xa>
|
|
10003ea4: be00 bkpt 0x0000
|
|
10003ea6: 8801 ldrh r1, [r0, #0]
|
|
10003ea8: 0a0a lsrs r2, r1, #8
|
|
10003eaa: 3002 adds r0, #2
|
|
10003eac: 2adf cmp r2, #223 @ 0xdf
|
|
10003eae: d1fa bne.n 10003ea6 <double_table_shim_on_use_helper+0xa>
|
|
10003eb0: b2c9 uxtb r1, r1
|
|
10003eb2: 0882 lsrs r2, r0, #2
|
|
10003eb4: d304 bcc.n 10003ec0 <double_table_shim_on_use_helper+0x24>
|
|
10003eb6: 8802 ldrh r2, [r0, #0]
|
|
10003eb8: 8840 ldrh r0, [r0, #2]
|
|
10003eba: 0400 lsls r0, r0, #16
|
|
10003ebc: 4310 orrs r0, r2
|
|
10003ebe: e000 b.n 10003ec2 <double_table_shim_on_use_helper+0x26>
|
|
10003ec0: 6800 ldr r0, [r0, #0]
|
|
10003ec2: 4a02 ldr r2, [pc, #8] @ (10003ecc <double_table_shim_on_use_helper+0x30>)
|
|
10003ec4: 5050 str r0, [r2, r1]
|
|
10003ec6: 9003 str r0, [sp, #12]
|
|
10003ec8: bd07 pop {r0, r1, r2, pc}
|
|
10003eca: 0000 .short 0x0000
|
|
10003ecc: 20000b68 .word 0x20000b68
|
|
|
|
10003ed0 <drsub_shim>:
|
|
10003ed0: b40f push {r0, r1, r2, r3}
|
|
10003ed2: bc03 pop {r0, r1}
|
|
10003ed4: bc0c pop {r2, r3}
|
|
|
|
10003ed6 <dsub_shim>:
|
|
10003ed6: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003ed8: 2401 movs r4, #1
|
|
10003eda: 07e4 lsls r4, r4, #31
|
|
10003edc: 4063 eors r3, r4
|
|
10003ede: e000 b.n 10003ee2 <da_entry>
|
|
|
|
10003ee0 <dadd_shim>:
|
|
10003ee0: b5f0 push {r4, r5, r6, r7, lr}
|
|
|
|
10003ee2 <da_entry>:
|
|
10003ee2: 0d0c lsrs r4, r1, #20
|
|
10003ee4: 0fcf lsrs r7, r1, #31
|
|
10003ee6: 1e66 subs r6, r4, #1
|
|
10003ee8: 0536 lsls r6, r6, #20
|
|
10003eea: 1b89 subs r1, r1, r6
|
|
10003eec: 0564 lsls r4, r4, #21
|
|
10003eee: d303 bcc.n 10003ef8 <l7_1>
|
|
10003ef0: 43c9 mvns r1, r1
|
|
10003ef2: 4240 negs r0, r0
|
|
10003ef4: d300 bcc.n 10003ef8 <l7_1>
|
|
10003ef6: 3101 adds r1, #1
|
|
|
|
10003ef8 <l7_1>:
|
|
10003ef8: 0d64 lsrs r4, r4, #21
|
|
10003efa: d003 beq.n 10003f04 <l7_2>
|
|
10003efc: 1c66 adds r6, r4, #1
|
|
10003efe: 0af6 lsrs r6, r6, #11
|
|
10003f00: d007 beq.n 10003f12 <l7_3>
|
|
10003f02: 1be4 subs r4, r4, r7
|
|
|
|
10003f04 <l7_2>:
|
|
10003f04: 2000 movs r0, #0
|
|
10003f06: 007f lsls r7, r7, #1
|
|
10003f08: 1c79 adds r1, r7, #1
|
|
10003f0a: 0789 lsls r1, r1, #30
|
|
10003f0c: 1289 asrs r1, r1, #10
|
|
10003f0e: 3c80 subs r4, #128 @ 0x80
|
|
10003f10: 0324 lsls r4, r4, #12
|
|
|
|
10003f12 <l7_3>:
|
|
10003f12: 0d1d lsrs r5, r3, #20
|
|
10003f14: 0fdf lsrs r7, r3, #31
|
|
10003f16: 1e6e subs r6, r5, #1
|
|
10003f18: 0536 lsls r6, r6, #20
|
|
10003f1a: 1b9b subs r3, r3, r6
|
|
10003f1c: 056d lsls r5, r5, #21
|
|
10003f1e: d303 bcc.n 10003f28 <l8_1>
|
|
10003f20: 43db mvns r3, r3
|
|
10003f22: 4252 negs r2, r2
|
|
10003f24: d300 bcc.n 10003f28 <l8_1>
|
|
10003f26: 3301 adds r3, #1
|
|
|
|
10003f28 <l8_1>:
|
|
10003f28: 0d6d lsrs r5, r5, #21
|
|
10003f2a: d003 beq.n 10003f34 <l8_2>
|
|
10003f2c: 1c6e adds r6, r5, #1
|
|
10003f2e: 0af6 lsrs r6, r6, #11
|
|
10003f30: d007 beq.n 10003f42 <l8_3>
|
|
10003f32: 1bed subs r5, r5, r7
|
|
|
|
10003f34 <l8_2>:
|
|
10003f34: 2200 movs r2, #0
|
|
10003f36: 007f lsls r7, r7, #1
|
|
10003f38: 1c7b adds r3, r7, #1
|
|
10003f3a: 079b lsls r3, r3, #30
|
|
10003f3c: 129b asrs r3, r3, #10
|
|
10003f3e: 3d80 subs r5, #128 @ 0x80
|
|
10003f40: 032d lsls r5, r5, #12
|
|
|
|
10003f42 <l8_3>:
|
|
10003f42: 1b2f subs r7, r5, r4
|
|
10003f44: 1b66 subs r6, r4, r5
|
|
10003f46: d458 bmi.n 10003ffa <da_ygtx>
|
|
10003f48: 46a4 mov ip, r4
|
|
10003f4a: 2e20 cmp r6, #32
|
|
10003f4c: da46 bge.n 10003fdc <da_xrgty>
|
|
10003f4e: 3720 adds r7, #32
|
|
10003f50: 0014 movs r4, r2
|
|
10003f52: 40bc lsls r4, r7
|
|
|
|
10003f54 <da_xgty0>:
|
|
10003f54: 001d movs r5, r3
|
|
10003f56: 40bd lsls r5, r7
|
|
10003f58: 40f2 lsrs r2, r6
|
|
10003f5a: 4133 asrs r3, r6
|
|
10003f5c: 432a orrs r2, r5
|
|
|
|
10003f5e <da_add>:
|
|
10003f5e: 1880 adds r0, r0, r2
|
|
10003f60: 4159 adcs r1, r3
|
|
|
|
10003f62 <da_pack>:
|
|
10003f62: 0fcb lsrs r3, r1, #31
|
|
10003f64: d005 beq.n 10003f72 <da_pack+0x10>
|
|
10003f66: 43c9 mvns r1, r1
|
|
10003f68: 43c0 mvns r0, r0
|
|
10003f6a: 2200 movs r2, #0
|
|
10003f6c: 4264 negs r4, r4
|
|
10003f6e: 4150 adcs r0, r2
|
|
10003f70: 4151 adcs r1, r2
|
|
10003f72: 4662 mov r2, ip
|
|
10003f74: 0d4d lsrs r5, r1, #21
|
|
10003f76: d128 bne.n 10003fca <da_0>
|
|
10003f78: 0d0d lsrs r5, r1, #20
|
|
10003f7a: d107 bne.n 10003f8c <da_1>
|
|
10003f7c: 2800 cmp r0, #0
|
|
10003f7e: d01f beq.n 10003fc0 <da_5>
|
|
|
|
10003f80 <da_2>:
|
|
10003f80: 1924 adds r4, r4, r4
|
|
10003f82: 4140 adcs r0, r0
|
|
10003f84: 4149 adcs r1, r1
|
|
10003f86: 3a01 subs r2, #1
|
|
10003f88: 0d0d lsrs r5, r1, #20
|
|
10003f8a: d0f9 beq.n 10003f80 <da_2>
|
|
|
|
10003f8c <da_1>:
|
|
10003f8c: 0064 lsls r4, r4, #1
|
|
10003f8e: d306 bcc.n 10003f9e <da_3>
|
|
|
|
10003f90 <da_4>:
|
|
10003f90: 3001 adds r0, #1
|
|
10003f92: d300 bcc.n 10003f96 <da_4+0x6>
|
|
10003f94: 3101 adds r1, #1
|
|
10003f96: 2c00 cmp r4, #0
|
|
10003f98: d101 bne.n 10003f9e <da_3>
|
|
10003f9a: 0840 lsrs r0, r0, #1
|
|
10003f9c: 0040 lsls r0, r0, #1
|
|
|
|
10003f9e <da_3>:
|
|
10003f9e: 3a01 subs r2, #1
|
|
10003fa0: d40b bmi.n 10003fba <da_6>
|
|
10003fa2: 1c94 adds r4, r2, #2
|
|
10003fa4: 0ae4 lsrs r4, r4, #11
|
|
10003fa6: d104 bne.n 10003fb2 <da_7>
|
|
10003fa8: 0512 lsls r2, r2, #20
|
|
10003faa: 4411 add r1, r2
|
|
10003fac: 07db lsls r3, r3, #31
|
|
10003fae: 4419 add r1, r3
|
|
10003fb0: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003fb2 <da_7>:
|
|
10003fb2: 07d9 lsls r1, r3, #31
|
|
10003fb4: 4b20 ldr r3, [pc, #128] @ (10004038 <da_xmgty+0x4>)
|
|
10003fb6: 4319 orrs r1, r3
|
|
10003fb8: e000 b.n 10003fbc <da_6+0x2>
|
|
|
|
10003fba <da_6>:
|
|
10003fba: 07d9 lsls r1, r3, #31
|
|
10003fbc: 2000 movs r0, #0
|
|
10003fbe: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003fc0 <da_5>:
|
|
10003fc0: 2900 cmp r1, #0
|
|
10003fc2: d1dd bne.n 10003f80 <da_2>
|
|
10003fc4: 2c00 cmp r4, #0
|
|
10003fc6: d1db bne.n 10003f80 <da_2>
|
|
10003fc8: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003fca <da_0>:
|
|
10003fca: 3201 adds r2, #1
|
|
10003fcc: 07c6 lsls r6, r0, #31
|
|
10003fce: 0840 lsrs r0, r0, #1
|
|
10003fd0: 07cd lsls r5, r1, #31
|
|
10003fd2: 4328 orrs r0, r5
|
|
10003fd4: 0849 lsrs r1, r1, #1
|
|
10003fd6: 2e00 cmp r6, #0
|
|
10003fd8: d0e1 beq.n 10003f9e <da_3>
|
|
10003fda: e7d9 b.n 10003f90 <da_4>
|
|
|
|
10003fdc <da_xrgty>:
|
|
10003fdc: 2e3c cmp r6, #60 @ 0x3c
|
|
10003fde: da29 bge.n 10004034 <da_xmgty>
|
|
10003fe0: 3e20 subs r6, #32
|
|
10003fe2: 3740 adds r7, #64 @ 0x40
|
|
10003fe4: 0014 movs r4, r2
|
|
10003fe6: 40bc lsls r4, r7
|
|
10003fe8: d000 beq.n 10003fec <da_xrgty+0x10>
|
|
10003fea: 2401 movs r4, #1
|
|
10003fec: 40f2 lsrs r2, r6
|
|
10003fee: 4314 orrs r4, r2
|
|
10003ff0: 001a movs r2, r3
|
|
10003ff2: 40bb lsls r3, r7
|
|
10003ff4: 431c orrs r4, r3
|
|
10003ff6: 17d3 asrs r3, r2, #31
|
|
10003ff8: e7ac b.n 10003f54 <da_xgty0>
|
|
|
|
10003ffa <da_ygtx>:
|
|
10003ffa: 46ac mov ip, r5
|
|
10003ffc: 2f20 cmp r7, #32
|
|
10003ffe: da08 bge.n 10004012 <da_yrgtx>
|
|
10004000: 3620 adds r6, #32
|
|
10004002: 0004 movs r4, r0
|
|
10004004: 40b4 lsls r4, r6
|
|
|
|
10004006 <da_ygtx0>:
|
|
10004006: 000d movs r5, r1
|
|
10004008: 40b5 lsls r5, r6
|
|
1000400a: 40f8 lsrs r0, r7
|
|
1000400c: 4139 asrs r1, r7
|
|
1000400e: 4328 orrs r0, r5
|
|
10004010: e7a5 b.n 10003f5e <da_add>
|
|
|
|
10004012 <da_yrgtx>:
|
|
10004012: 2f3c cmp r7, #60 @ 0x3c
|
|
10004014: da0c bge.n 10004030 <da_ymgtx>
|
|
10004016: 3f20 subs r7, #32
|
|
10004018: 3640 adds r6, #64 @ 0x40
|
|
1000401a: 0004 movs r4, r0
|
|
1000401c: 40b4 lsls r4, r6
|
|
1000401e: d000 beq.n 10004022 <da_yrgtx+0x10>
|
|
10004020: 2401 movs r4, #1
|
|
10004022: 40f8 lsrs r0, r7
|
|
10004024: 4304 orrs r4, r0
|
|
10004026: 0008 movs r0, r1
|
|
10004028: 40b1 lsls r1, r6
|
|
1000402a: 430c orrs r4, r1
|
|
1000402c: 17c1 asrs r1, r0, #31
|
|
1000402e: e7ea b.n 10004006 <da_ygtx0>
|
|
|
|
10004030 <da_ymgtx>:
|
|
10004030: 0010 movs r0, r2
|
|
10004032: 0019 movs r1, r3
|
|
|
|
10004034 <da_xmgty>:
|
|
10004034: 2400 movs r4, #0
|
|
10004036: e794 b.n 10003f62 <da_pack>
|
|
10004038: 7ff00000 .word 0x7ff00000
|
|
|
|
1000403c <dmul_shim>:
|
|
1000403c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000403e: 0d0c lsrs r4, r1, #20
|
|
10004040: 1e66 subs r6, r4, #1
|
|
10004042: 0536 lsls r6, r6, #20
|
|
10004044: 1b89 subs r1, r1, r6
|
|
10004046: 0ae6 lsrs r6, r4, #11
|
|
10004048: 0564 lsls r4, r4, #21
|
|
1000404a: 0d64 lsrs r4, r4, #21
|
|
1000404c: d002 beq.n 10004054 <l11_1>
|
|
1000404e: 1c65 adds r5, r4, #1
|
|
10004050: 0aed lsrs r5, r5, #11
|
|
10004052: d004 beq.n 1000405e <l11_2>
|
|
|
|
10004054 <l11_1>:
|
|
10004054: 2000 movs r0, #0
|
|
10004056: 2101 movs r1, #1
|
|
10004058: 0509 lsls r1, r1, #20
|
|
1000405a: 3c80 subs r4, #128 @ 0x80
|
|
1000405c: 0324 lsls r4, r4, #12
|
|
|
|
1000405e <l11_2>:
|
|
1000405e: 46a4 mov ip, r4
|
|
10004060: 0d1c lsrs r4, r3, #20
|
|
10004062: 1e67 subs r7, r4, #1
|
|
10004064: 053f lsls r7, r7, #20
|
|
10004066: 1bdb subs r3, r3, r7
|
|
10004068: 0ae7 lsrs r7, r4, #11
|
|
1000406a: 0564 lsls r4, r4, #21
|
|
1000406c: 0d64 lsrs r4, r4, #21
|
|
1000406e: d002 beq.n 10004076 <l12_1>
|
|
10004070: 1c65 adds r5, r4, #1
|
|
10004072: 0aed lsrs r5, r5, #11
|
|
10004074: d004 beq.n 10004080 <l12_2>
|
|
|
|
10004076 <l12_1>:
|
|
10004076: 2200 movs r2, #0
|
|
10004078: 2301 movs r3, #1
|
|
1000407a: 051b lsls r3, r3, #20
|
|
1000407c: 3c80 subs r4, #128 @ 0x80
|
|
1000407e: 0324 lsls r4, r4, #12
|
|
|
|
10004080 <l12_2>:
|
|
10004080: 4077 eors r7, r6
|
|
10004082: 4464 add r4, ip
|
|
10004084: b497 push {r0, r1, r2, r4, r7}
|
|
10004086: b284 uxth r4, r0
|
|
10004088: b296 uxth r6, r2
|
|
1000408a: 4374 muls r4, r6
|
|
1000408c: 0c07 lsrs r7, r0, #16
|
|
1000408e: 437e muls r6, r7
|
|
10004090: 0c15 lsrs r5, r2, #16
|
|
10004092: 436f muls r7, r5
|
|
10004094: b280 uxth r0, r0
|
|
10004096: 4368 muls r0, r5
|
|
10004098: 1836 adds r6, r6, r0
|
|
1000409a: d302 bcc.n 100040a2 <l13_1>
|
|
1000409c: 2001 movs r0, #1
|
|
1000409e: 0400 lsls r0, r0, #16
|
|
100040a0: 183f adds r7, r7, r0
|
|
|
|
100040a2 <l13_1>:
|
|
100040a2: 0430 lsls r0, r6, #16
|
|
100040a4: 0c35 lsrs r5, r6, #16
|
|
100040a6: 1900 adds r0, r0, r4
|
|
100040a8: 417d adcs r5, r7
|
|
100040aa: 4684 mov ip, r0
|
|
100040ac: b288 uxth r0, r1
|
|
100040ae: b29a uxth r2, r3
|
|
100040b0: 4350 muls r0, r2
|
|
100040b2: 0c0c lsrs r4, r1, #16
|
|
100040b4: 4362 muls r2, r4
|
|
100040b6: 0c1f lsrs r7, r3, #16
|
|
100040b8: 437c muls r4, r7
|
|
100040ba: b28e uxth r6, r1
|
|
100040bc: 437e muls r6, r7
|
|
100040be: 1992 adds r2, r2, r6
|
|
100040c0: d302 bcc.n 100040c8 <l14_1>
|
|
100040c2: 2601 movs r6, #1
|
|
100040c4: 0436 lsls r6, r6, #16
|
|
100040c6: 19a4 adds r4, r4, r6
|
|
|
|
100040c8 <l14_1>:
|
|
100040c8: 0416 lsls r6, r2, #16
|
|
100040ca: 0c17 lsrs r7, r2, #16
|
|
100040cc: 1836 adds r6, r6, r0
|
|
100040ce: 4167 adcs r7, r4
|
|
100040d0: bc01 pop {r0}
|
|
100040d2: b281 uxth r1, r0
|
|
100040d4: b29a uxth r2, r3
|
|
100040d6: 4351 muls r1, r2
|
|
100040d8: 0c04 lsrs r4, r0, #16
|
|
100040da: 4362 muls r2, r4
|
|
100040dc: 0c1b lsrs r3, r3, #16
|
|
100040de: 435c muls r4, r3
|
|
100040e0: b280 uxth r0, r0
|
|
100040e2: 4358 muls r0, r3
|
|
100040e4: 1812 adds r2, r2, r0
|
|
100040e6: d302 bcc.n 100040ee <l15_1>
|
|
100040e8: 2001 movs r0, #1
|
|
100040ea: 0400 lsls r0, r0, #16
|
|
100040ec: 1824 adds r4, r4, r0
|
|
|
|
100040ee <l15_1>:
|
|
100040ee: 0410 lsls r0, r2, #16
|
|
100040f0: 0c13 lsrs r3, r2, #16
|
|
100040f2: 1840 adds r0, r0, r1
|
|
100040f4: 4163 adcs r3, r4
|
|
100040f6: 182d adds r5, r5, r0
|
|
100040f8: 415e adcs r6, r3
|
|
100040fa: 2000 movs r0, #0
|
|
100040fc: 4147 adcs r7, r0
|
|
100040fe: bc06 pop {r1, r2}
|
|
10004100: b288 uxth r0, r1
|
|
10004102: b293 uxth r3, r2
|
|
10004104: 4358 muls r0, r3
|
|
10004106: 0c0c lsrs r4, r1, #16
|
|
10004108: 4363 muls r3, r4
|
|
1000410a: 0c12 lsrs r2, r2, #16
|
|
1000410c: 4354 muls r4, r2
|
|
1000410e: b289 uxth r1, r1
|
|
10004110: 4351 muls r1, r2
|
|
10004112: 185b adds r3, r3, r1
|
|
10004114: d302 bcc.n 1000411c <l16_1>
|
|
10004116: 2101 movs r1, #1
|
|
10004118: 0409 lsls r1, r1, #16
|
|
1000411a: 1864 adds r4, r4, r1
|
|
|
|
1000411c <l16_1>:
|
|
1000411c: 0419 lsls r1, r3, #16
|
|
1000411e: 0c1a lsrs r2, r3, #16
|
|
10004120: 1809 adds r1, r1, r0
|
|
10004122: 4162 adcs r2, r4
|
|
10004124: 186d adds r5, r5, r1
|
|
10004126: 4156 adcs r6, r2
|
|
10004128: 2000 movs r0, #0
|
|
1000412a: 4147 adcs r7, r0
|
|
1000412c: bc18 pop {r3, r4}
|
|
1000412e: 02f9 lsls r1, r7, #11
|
|
10004130: 0d72 lsrs r2, r6, #21
|
|
10004132: 4311 orrs r1, r2
|
|
10004134: 02f0 lsls r0, r6, #11
|
|
10004136: 0d6a lsrs r2, r5, #21
|
|
10004138: 4310 orrs r0, r2
|
|
1000413a: 02ed lsls r5, r5, #11
|
|
1000413c: 0d0a lsrs r2, r1, #20
|
|
1000413e: d103 bne.n 10004148 <l16_1+0x2c>
|
|
10004140: 196d adds r5, r5, r5
|
|
10004142: 4140 adcs r0, r0
|
|
10004144: 4149 adcs r1, r1
|
|
10004146: 3b01 subs r3, #1
|
|
10004148: 4e12 ldr r6, [pc, #72] @ (10004194 <dm_1+0xa>)
|
|
1000414a: 1b9b subs r3, r3, r6
|
|
1000414c: 0076 lsls r6, r6, #1
|
|
1000414e: 42b3 cmp r3, r6
|
|
10004150: d20e bcs.n 10004170 <dm_0>
|
|
10004152: 006d lsls r5, r5, #1
|
|
10004154: d307 bcc.n 10004166 <l16_1+0x4a>
|
|
10004156: 3001 adds r0, #1
|
|
10004158: 2600 movs r6, #0
|
|
1000415a: 4171 adcs r1, r6
|
|
1000415c: 4666 mov r6, ip
|
|
1000415e: 4335 orrs r5, r6
|
|
10004160: d101 bne.n 10004166 <l16_1+0x4a>
|
|
10004162: 0840 lsrs r0, r0, #1
|
|
10004164: 0040 lsls r0, r0, #1
|
|
10004166: 051b lsls r3, r3, #20
|
|
10004168: 18c9 adds r1, r1, r3
|
|
|
|
1000416a <dm_2>:
|
|
1000416a: 07e4 lsls r4, r4, #31
|
|
1000416c: 4421 add r1, r4
|
|
1000416e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10004170 <dm_0>:
|
|
10004170: da0b bge.n 1000418a <dm_1>
|
|
10004172: 3301 adds r3, #1
|
|
10004174: d106 bne.n 10004184 <dm_0+0x14>
|
|
10004176: 3001 adds r0, #1
|
|
10004178: d104 bne.n 10004184 <dm_0+0x14>
|
|
1000417a: 3101 adds r1, #1
|
|
1000417c: 0d4f lsrs r7, r1, #21
|
|
1000417e: d001 beq.n 10004184 <dm_0+0x14>
|
|
10004180: 0849 lsrs r1, r1, #1
|
|
10004182: e7f2 b.n 1000416a <dm_2>
|
|
10004184: 07e1 lsls r1, r4, #31
|
|
10004186: 2000 movs r0, #0
|
|
10004188: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
1000418a <dm_1>:
|
|
1000418a: 3601 adds r6, #1
|
|
1000418c: 0531 lsls r1, r6, #20
|
|
1000418e: 2000 movs r0, #0
|
|
10004190: e7eb b.n 1000416a <dm_2>
|
|
10004192: 0000 .short 0x0000
|
|
10004194: 000003ff .word 0x000003ff
|
|
|
|
10004198 <ddiv_shim>:
|
|
10004198: b5f0 push {r4, r5, r6, r7, lr}
|
|
|
|
1000419a <ddiv0>:
|
|
1000419a: 0d1c lsrs r4, r3, #20
|
|
1000419c: 1e67 subs r7, r4, #1
|
|
1000419e: 053f lsls r7, r7, #20
|
|
100041a0: 1bdb subs r3, r3, r7
|
|
100041a2: 0ae7 lsrs r7, r4, #11
|
|
100041a4: 0564 lsls r4, r4, #21
|
|
100041a6: 0d64 lsrs r4, r4, #21
|
|
100041a8: d002 beq.n 100041b0 <l19_1>
|
|
100041aa: 1c66 adds r6, r4, #1
|
|
100041ac: 0af6 lsrs r6, r6, #11
|
|
100041ae: d004 beq.n 100041ba <l19_2>
|
|
|
|
100041b0 <l19_1>:
|
|
100041b0: 2200 movs r2, #0
|
|
100041b2: 2301 movs r3, #1
|
|
100041b4: 051b lsls r3, r3, #20
|
|
100041b6: 3c80 subs r4, #128 @ 0x80
|
|
100041b8: 0324 lsls r4, r4, #12
|
|
|
|
100041ba <l19_2>:
|
|
100041ba: 25d0 movs r5, #208 @ 0xd0
|
|
100041bc: 062d lsls r5, r5, #24
|
|
100041be: 2600 movs r6, #0
|
|
100041c0: 43f6 mvns r6, r6
|
|
100041c2: 662e str r6, [r5, #96] @ 0x60
|
|
100041c4: 091e lsrs r6, r3, #4
|
|
100041c6: 666e str r6, [r5, #100] @ 0x64
|
|
100041c8: 0fce lsrs r6, r1, #31
|
|
100041ca: 19f6 adds r6, r6, r7
|
|
100041cc: 46b4 mov ip, r6
|
|
100041ce: 0049 lsls r1, r1, #1
|
|
100041d0: 0d4f lsrs r7, r1, #21
|
|
100041d2: d002 beq.n 100041da <l19_2+0x20>
|
|
100041d4: 1c7e adds r6, r7, #1
|
|
100041d6: 0af6 lsrs r6, r6, #11
|
|
100041d8: d003 beq.n 100041e2 <l19_2+0x28>
|
|
100041da: 2000 movs r0, #0
|
|
100041dc: 2100 movs r1, #0
|
|
100041de: 3f40 subs r7, #64 @ 0x40
|
|
100041e0: 033f lsls r7, r7, #12
|
|
100041e2: 1b3e subs r6, r7, r4
|
|
100041e4: 00b6 lsls r6, r6, #2
|
|
100041e6: 44b4 add ip, r6
|
|
100041e8: 3f01 subs r7, #1
|
|
100041ea: 057f lsls r7, r7, #21
|
|
100041ec: 1bc9 subs r1, r1, r7
|
|
100041ee: 0849 lsrs r1, r1, #1
|
|
100041f0: 6f2e ldr r6, [r5, #112] @ 0x70
|
|
100041f2: 3601 adds r6, #1
|
|
100041f4: 0876 lsrs r6, r6, #1
|
|
100041f6: 029c lsls r4, r3, #10
|
|
100041f8: 0d95 lsrs r5, r2, #22
|
|
100041fa: 4325 orrs r5, r4
|
|
100041fc: 4375 muls r5, r6
|
|
100041fe: 13ed asrs r5, r5, #15
|
|
10004200: 4375 muls r5, r6
|
|
10004202: 13ad asrs r5, r5, #14
|
|
10004204: 3501 adds r5, #1
|
|
10004206: 106d asrs r5, r5, #1
|
|
10004208: 03f6 lsls r6, r6, #15
|
|
1000420a: 1b76 subs r6, r6, r5
|
|
1000420c: b40c push {r2, r3}
|
|
1000420e: 02cc lsls r4, r1, #11
|
|
10004210: 0d45 lsrs r5, r0, #21
|
|
10004212: 432c orrs r4, r5
|
|
10004214: b2a2 uxth r2, r4
|
|
10004216: b2b3 uxth r3, r6
|
|
10004218: 435a muls r2, r3
|
|
1000421a: 0c27 lsrs r7, r4, #16
|
|
1000421c: 437b muls r3, r7
|
|
1000421e: 0c35 lsrs r5, r6, #16
|
|
10004220: 436f muls r7, r5
|
|
10004222: b2a4 uxth r4, r4
|
|
10004224: 436c muls r4, r5
|
|
10004226: 191b adds r3, r3, r4
|
|
10004228: d302 bcc.n 10004230 <l20_1>
|
|
1000422a: 2401 movs r4, #1
|
|
1000422c: 0424 lsls r4, r4, #16
|
|
1000422e: 193f adds r7, r7, r4
|
|
|
|
10004230 <l20_1>:
|
|
10004230: 041c lsls r4, r3, #16
|
|
10004232: 0c1d lsrs r5, r3, #16
|
|
10004234: 18a4 adds r4, r4, r2
|
|
10004236: 417d adcs r5, r7
|
|
10004238: 1924 adds r4, r4, r4
|
|
1000423a: 416d adcs r5, r5
|
|
1000423c: 9a00 ldr r2, [sp, #0]
|
|
1000423e: b291 uxth r1, r2
|
|
10004240: b2ac uxth r4, r5
|
|
10004242: 4361 muls r1, r4
|
|
10004244: 0c17 lsrs r7, r2, #16
|
|
10004246: 437c muls r4, r7
|
|
10004248: 0c2b lsrs r3, r5, #16
|
|
1000424a: 435f muls r7, r3
|
|
1000424c: b292 uxth r2, r2
|
|
1000424e: 435a muls r2, r3
|
|
10004250: 18a4 adds r4, r4, r2
|
|
10004252: d302 bcc.n 1000425a <l21_1>
|
|
10004254: 2201 movs r2, #1
|
|
10004256: 0412 lsls r2, r2, #16
|
|
10004258: 18bf adds r7, r7, r2
|
|
|
|
1000425a <l21_1>:
|
|
1000425a: 0422 lsls r2, r4, #16
|
|
1000425c: 0c23 lsrs r3, r4, #16
|
|
1000425e: 1852 adds r2, r2, r1
|
|
10004260: 417b adcs r3, r7
|
|
10004262: 9c01 ldr r4, [sp, #4]
|
|
10004264: 436c muls r4, r5
|
|
10004266: 191b adds r3, r3, r4
|
|
10004268: 0e52 lsrs r2, r2, #25
|
|
1000426a: 01d9 lsls r1, r3, #7
|
|
1000426c: 430a orrs r2, r1
|
|
1000426e: 0144 lsls r4, r0, #5
|
|
10004270: 1aa0 subs r0, r4, r2
|
|
10004272: b281 uxth r1, r0
|
|
10004274: b2b2 uxth r2, r6
|
|
10004276: 4351 muls r1, r2
|
|
10004278: 1403 asrs r3, r0, #16
|
|
1000427a: 435a muls r2, r3
|
|
1000427c: 0c36 lsrs r6, r6, #16
|
|
1000427e: 4373 muls r3, r6
|
|
10004280: b287 uxth r7, r0
|
|
10004282: 4377 muls r7, r6
|
|
10004284: 17d6 asrs r6, r2, #31
|
|
10004286: 19d2 adds r2, r2, r7
|
|
10004288: 2700 movs r7, #0
|
|
1000428a: 417e adcs r6, r7
|
|
1000428c: 0436 lsls r6, r6, #16
|
|
1000428e: 199b adds r3, r3, r6
|
|
10004290: 0417 lsls r7, r2, #16
|
|
10004292: 0c16 lsrs r6, r2, #16
|
|
10004294: 187f adds r7, r7, r1
|
|
10004296: 415e adcs r6, r3
|
|
10004298: 1673 asrs r3, r6, #25
|
|
1000429a: 18ed adds r5, r5, r3
|
|
1000429c: 01f3 lsls r3, r6, #7
|
|
1000429e: 2600 movs r6, #0
|
|
100042a0: 3380 adds r3, #128 @ 0x80
|
|
100042a2: 4175 adcs r5, r6
|
|
100042a4: 0fa9 lsrs r1, r5, #30
|
|
100042a6: d106 bne.n 100042b6 <dd_0>
|
|
100042a8: 0064 lsls r4, r4, #1
|
|
100042aa: 0a69 lsrs r1, r5, #9
|
|
100042ac: 05e8 lsls r0, r5, #23
|
|
100042ae: 0a5b lsrs r3, r3, #9
|
|
100042b0: 4318 orrs r0, r3
|
|
100042b2: d209 bcs.n 100042c8 <dd_1>
|
|
100042b4: e02f b.n 10004316 <dd_2>
|
|
|
|
100042b6 <dd_0>:
|
|
100042b6: 2204 movs r2, #4
|
|
100042b8: 4494 add ip, r2
|
|
100042ba: 3380 adds r3, #128 @ 0x80
|
|
100042bc: 4175 adcs r5, r6
|
|
100042be: 0aa9 lsrs r1, r5, #10
|
|
100042c0: 05a8 lsls r0, r5, #22
|
|
100042c2: 0a9b lsrs r3, r3, #10
|
|
100042c4: 4318 orrs r0, r3
|
|
100042c6: d326 bcc.n 10004316 <dd_2>
|
|
|
|
100042c8 <dd_1>:
|
|
100042c8: 4140 adcs r0, r0
|
|
100042ca: 4149 adcs r1, r1
|
|
100042cc: 0424 lsls r4, r4, #16
|
|
100042ce: 9a00 ldr r2, [sp, #0]
|
|
100042d0: 9b01 ldr r3, [sp, #4]
|
|
100042d2: 000d movs r5, r1
|
|
100042d4: 4355 muls r5, r2
|
|
100042d6: 1b64 subs r4, r4, r5
|
|
100042d8: 4343 muls r3, r0
|
|
100042da: 1ae4 subs r4, r4, r3
|
|
100042dc: b295 uxth r5, r2
|
|
100042de: b286 uxth r6, r0
|
|
100042e0: 4375 muls r5, r6
|
|
100042e2: 0c17 lsrs r7, r2, #16
|
|
100042e4: 437e muls r6, r7
|
|
100042e6: 0c03 lsrs r3, r0, #16
|
|
100042e8: 435f muls r7, r3
|
|
100042ea: b292 uxth r2, r2
|
|
100042ec: 435a muls r2, r3
|
|
100042ee: 18b6 adds r6, r6, r2
|
|
100042f0: d302 bcc.n 100042f8 <l23_1>
|
|
100042f2: 2201 movs r2, #1
|
|
100042f4: 0412 lsls r2, r2, #16
|
|
100042f6: 18bf adds r7, r7, r2
|
|
|
|
100042f8 <l23_1>:
|
|
100042f8: 0432 lsls r2, r6, #16
|
|
100042fa: 0c33 lsrs r3, r6, #16
|
|
100042fc: 1952 adds r2, r2, r5
|
|
100042fe: 417b adcs r3, r7
|
|
10004300: 4252 negs r2, r2
|
|
10004302: 419c sbcs r4, r3
|
|
10004304: 2c00 cmp r4, #0
|
|
10004306: d402 bmi.n 1000430e <l23_1+0x16>
|
|
10004308: 2200 movs r2, #0
|
|
1000430a: 3001 adds r0, #1
|
|
1000430c: 4151 adcs r1, r2
|
|
1000430e: 0840 lsrs r0, r0, #1
|
|
10004310: 07ca lsls r2, r1, #31
|
|
10004312: 4310 orrs r0, r2
|
|
10004314: 0849 lsrs r1, r1, #1
|
|
|
|
10004316 <dd_2>:
|
|
10004316: b002 add sp, #8
|
|
10004318: 4662 mov r2, ip
|
|
1000431a: 07d7 lsls r7, r2, #31
|
|
1000431c: 1092 asrs r2, r2, #2
|
|
1000431e: 4b08 ldr r3, [pc, #32] @ (10004340 <dd_4+0x6>)
|
|
10004320: 18d2 adds r2, r2, r3
|
|
10004322: 4b08 ldr r3, [pc, #32] @ (10004344 <dd_4+0xa>)
|
|
10004324: 429a cmp r2, r3
|
|
10004326: d203 bcs.n 10004330 <dd_3>
|
|
10004328: 0512 lsls r2, r2, #20
|
|
1000432a: 1889 adds r1, r1, r2
|
|
|
|
1000432c <dd_5>:
|
|
1000432c: 19c9 adds r1, r1, r7
|
|
1000432e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10004330 <dd_3>:
|
|
10004330: 2000 movs r0, #0
|
|
10004332: 2a00 cmp r2, #0
|
|
10004334: dc01 bgt.n 1000433a <dd_4>
|
|
10004336: 0039 movs r1, r7
|
|
10004338: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
1000433a <dd_4>:
|
|
1000433a: 3301 adds r3, #1
|
|
1000433c: 0519 lsls r1, r3, #20
|
|
1000433e: e7f5 b.n 1000432c <dd_5>
|
|
10004340: 000003fd .word 0x000003fd
|
|
10004344: 000007fe .word 0x000007fe
|
|
|
|
10004348 <double2uint_shim>:
|
|
10004348: 2200 movs r2, #0
|
|
|
|
1000434a <double2ufix_shim>:
|
|
1000434a: b500 push {lr}
|
|
1000434c: 3220 adds r2, #32
|
|
1000434e: f000 f804 bl 1000435a <double2ufix64_shim>
|
|
10004352: 0008 movs r0, r1
|
|
10004354: bd00 pop {pc}
|
|
...
|
|
|
|
10004358 <double2uint64_shim>:
|
|
10004358: 2200 movs r2, #0
|
|
|
|
1000435a <double2ufix64_shim>:
|
|
1000435a: 150b asrs r3, r1, #20
|
|
1000435c: d40a bmi.n 10004374 <ret_dzero>
|
|
|
|
1000435e <d2fix>:
|
|
1000435e: b510 push {r4, lr}
|
|
10004360: 4694 mov ip, r2
|
|
10004362: f000 f831 bl 100043c8 <dunpacks>
|
|
10004366: 1414 asrs r4, r2, #16
|
|
10004368: 3401 adds r4, #1
|
|
1000436a: da00 bge.n 1000436e <d2fix+0x10>
|
|
1000436c: 2100 movs r1, #0
|
|
1000436e: 17cb asrs r3, r1, #31
|
|
10004370: 4c14 ldr r4, [pc, #80] @ (100043c4 <d2fix_a+0x4a>)
|
|
10004372: 4720 bx r4
|
|
|
|
10004374 <ret_dzero>:
|
|
10004374: 2000 movs r0, #0
|
|
10004376: 2100 movs r1, #0
|
|
10004378: 4770 bx lr
|
|
|
|
1000437a <d2fix_a>:
|
|
1000437a: 4462 add r2, ip
|
|
1000437c: 3a34 subs r2, #52 @ 0x34
|
|
1000437e: d40c bmi.n 1000439a <d2fix_a+0x20>
|
|
10004380: 2a0c cmp r2, #12
|
|
10004382: da07 bge.n 10004394 <d2fix_a+0x1a>
|
|
10004384: 0004 movs r4, r0
|
|
10004386: 4091 lsls r1, r2
|
|
10004388: 4090 lsls r0, r2
|
|
1000438a: 4252 negs r2, r2
|
|
1000438c: 3220 adds r2, #32
|
|
1000438e: 40d4 lsrs r4, r2
|
|
10004390: 4321 orrs r1, r4
|
|
10004392: bd10 pop {r4, pc}
|
|
10004394: 43d8 mvns r0, r3
|
|
10004396: 43d9 mvns r1, r3
|
|
10004398: bd10 pop {r4, pc}
|
|
1000439a: 3220 adds r2, #32
|
|
1000439c: d407 bmi.n 100043ae <d2fix_a+0x34>
|
|
1000439e: 460c mov r4, r1
|
|
100043a0: 4094 lsls r4, r2
|
|
100043a2: 4252 negs r2, r2
|
|
100043a4: 3220 adds r2, #32
|
|
100043a6: 4111 asrs r1, r2
|
|
100043a8: 40d0 lsrs r0, r2
|
|
100043aa: 4320 orrs r0, r4
|
|
100043ac: bd10 pop {r4, pc}
|
|
100043ae: 0008 movs r0, r1
|
|
100043b0: 17c9 asrs r1, r1, #31
|
|
100043b2: 3220 adds r2, #32
|
|
100043b4: d403 bmi.n 100043be <d2fix_a+0x44>
|
|
100043b6: 4252 negs r2, r2
|
|
100043b8: 3220 adds r2, #32
|
|
100043ba: 4110 asrs r0, r2
|
|
100043bc: bd10 pop {r4, pc}
|
|
100043be: 0018 movs r0, r3
|
|
100043c0: 0019 movs r1, r3
|
|
100043c2: bd10 pop {r4, pc}
|
|
100043c4: 1000437b .word 0x1000437b
|
|
|
|
100043c8 <dunpacks>:
|
|
100043c8: 0d0a lsrs r2, r1, #20
|
|
100043ca: 0fcc lsrs r4, r1, #31
|
|
100043cc: 1e53 subs r3, r2, #1
|
|
100043ce: 051b lsls r3, r3, #20
|
|
100043d0: 1ac9 subs r1, r1, r3
|
|
100043d2: 0552 lsls r2, r2, #21
|
|
100043d4: d303 bcc.n 100043de <l59_1>
|
|
100043d6: 43c9 mvns r1, r1
|
|
100043d8: 4240 negs r0, r0
|
|
100043da: d300 bcc.n 100043de <l59_1>
|
|
100043dc: 3101 adds r1, #1
|
|
|
|
100043de <l59_1>:
|
|
100043de: 0d52 lsrs r2, r2, #21
|
|
100043e0: d003 beq.n 100043ea <l59_2>
|
|
100043e2: 1c53 adds r3, r2, #1
|
|
100043e4: 0adb lsrs r3, r3, #11
|
|
100043e6: d007 beq.n 100043f8 <l59_3>
|
|
100043e8: 1b12 subs r2, r2, r4
|
|
|
|
100043ea <l59_2>:
|
|
100043ea: 2000 movs r0, #0
|
|
100043ec: 0064 lsls r4, r4, #1
|
|
100043ee: 1c61 adds r1, r4, #1
|
|
100043f0: 0789 lsls r1, r1, #30
|
|
100043f2: 1289 asrs r1, r1, #10
|
|
100043f4: 3a80 subs r2, #128 @ 0x80
|
|
100043f6: 0312 lsls r2, r2, #12
|
|
|
|
100043f8 <l59_3>:
|
|
100043f8: 4b01 ldr r3, [pc, #4] @ (10004400 <l59_3+0x8>)
|
|
100043fa: 1ad2 subs r2, r2, r3
|
|
100043fc: 4770 bx lr
|
|
100043fe: 0000 .short 0x0000
|
|
10004400: 000003ff .word 0x000003ff
|
|
|
|
10004404 <__wrap___aeabi_lmul>:
|
|
10004404: 4351 muls r1, r2
|
|
10004406: 4343 muls r3, r0
|
|
10004408: 18c9 adds r1, r1, r3
|
|
1000440a: 468c mov ip, r1
|
|
1000440c: 0c11 lsrs r1, r2, #16
|
|
1000440e: b283 uxth r3, r0
|
|
10004410: 434b muls r3, r1
|
|
10004412: b410 push {r4}
|
|
10004414: 0c04 lsrs r4, r0, #16
|
|
10004416: 4361 muls r1, r4
|
|
10004418: b292 uxth r2, r2
|
|
1000441a: b280 uxth r0, r0
|
|
1000441c: 4350 muls r0, r2
|
|
1000441e: 4362 muls r2, r4
|
|
10004420: 041c lsls r4, r3, #16
|
|
10004422: 0c1b lsrs r3, r3, #16
|
|
10004424: 1900 adds r0, r0, r4
|
|
10004426: bc10 pop {r4}
|
|
10004428: 4159 adcs r1, r3
|
|
1000442a: 0413 lsls r3, r2, #16
|
|
1000442c: 0c12 lsrs r2, r2, #16
|
|
1000442e: 18c0 adds r0, r0, r3
|
|
10004430: 4151 adcs r1, r2
|
|
10004432: 4461 add r1, ip
|
|
10004434: 4770 bx lr
|
|
...
|
|
|
|
10004438 <__wrap___aeabi_frsub>:
|
|
10004438: 4048 eors r0, r1
|
|
1000443a: 4041 eors r1, r0
|
|
1000443c: 4048 eors r0, r1
|
|
|
|
1000443e <__wrap___aeabi_fsub>:
|
|
1000443e: 2300 movs r3, #0
|
|
10004440: 469c mov ip, r3
|
|
10004442: 4b11 ldr r3, [pc, #68] @ (10004488 <__wrap___aeabi_fmul+0xa>)
|
|
10004444: 685b ldr r3, [r3, #4]
|
|
10004446: 4718 bx r3
|
|
|
|
10004448 <__wrap___aeabi_fadd>:
|
|
10004448: 2300 movs r3, #0
|
|
1000444a: 469c mov ip, r3
|
|
1000444c: 4b0e ldr r3, [pc, #56] @ (10004488 <__wrap___aeabi_fmul+0xa>)
|
|
1000444e: 681b ldr r3, [r3, #0]
|
|
10004450: 4718 bx r3
|
|
|
|
10004452 <__wrap___aeabi_fdiv>:
|
|
10004452: 4a0e ldr r2, [pc, #56] @ (1000448c <__wrap___aeabi_fmul+0xe>)
|
|
10004454: 6f93 ldr r3, [r2, #120] @ 0x78
|
|
10004456: 089b lsrs r3, r3, #2
|
|
10004458: d204 bcs.n 10004464 <fdiv_save_state>
|
|
|
|
1000445a <fdiv_shim_call>:
|
|
1000445a: 2300 movs r3, #0
|
|
1000445c: 469c mov ip, r3
|
|
1000445e: 4b0a ldr r3, [pc, #40] @ (10004488 <__wrap___aeabi_fmul+0xa>)
|
|
10004460: 68db ldr r3, [r3, #12]
|
|
10004462: 4718 bx r3
|
|
|
|
10004464 <fdiv_save_state>:
|
|
10004464: b5f0 push {r4, r5, r6, r7, lr}
|
|
10004466: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
10004468: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
1000446a: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
1000446c: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
1000446e: f7ff fff4 bl 1000445a <fdiv_shim_call>
|
|
10004472: 4a06 ldr r2, [pc, #24] @ (1000448c <__wrap___aeabi_fmul+0xe>)
|
|
10004474: 6614 str r4, [r2, #96] @ 0x60
|
|
10004476: 6655 str r5, [r2, #100] @ 0x64
|
|
10004478: 6757 str r7, [r2, #116] @ 0x74
|
|
1000447a: 6716 str r6, [r2, #112] @ 0x70
|
|
1000447c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
1000447e <__wrap___aeabi_fmul>:
|
|
1000447e: 2300 movs r3, #0
|
|
10004480: 469c mov ip, r3
|
|
10004482: 4b01 ldr r3, [pc, #4] @ (10004488 <__wrap___aeabi_fmul+0xa>)
|
|
10004484: 689b ldr r3, [r3, #8]
|
|
10004486: 4718 bx r3
|
|
10004488: 20000c6c .word 0x20000c6c
|
|
1000448c: d0000000 .word 0xd0000000
|
|
|
|
10004490 <__wrap___aeabi_ui2f>:
|
|
10004490: 1a49 subs r1, r1, r1
|
|
10004492: 2800 cmp r0, #0
|
|
10004494: d108 bne.n 100044a8 <__aeabi_i2f_main>
|
|
10004496: 4608 mov r0, r1
|
|
10004498: 4770 bx lr
|
|
...
|
|
|
|
1000449c <__wrap___aeabi_i2f>:
|
|
1000449c: 0fc1 lsrs r1, r0, #31
|
|
1000449e: 07c9 lsls r1, r1, #31
|
|
100044a0: d500 bpl.n 100044a4 <__wrap___aeabi_i2f+0x8>
|
|
100044a2: 4240 negs r0, r0
|
|
100044a4: 2800 cmp r0, #0
|
|
100044a6: d017 beq.n 100044d8 <__aeabi_i2f_main+0x30>
|
|
|
|
100044a8 <__aeabi_i2f_main>:
|
|
100044a8: 46f4 mov ip, lr
|
|
100044aa: b403 push {r0, r1}
|
|
100044ac: 4b0b ldr r3, [pc, #44] @ (100044dc <__aeabi_i2f_main+0x34>)
|
|
100044ae: 681b ldr r3, [r3, #0]
|
|
100044b0: 4798 blx r3
|
|
100044b2: bc06 pop {r1, r2}
|
|
100044b4: 4081 lsls r1, r0
|
|
100044b6: 389e subs r0, #158 @ 0x9e
|
|
100044b8: 4240 negs r0, r0
|
|
100044ba: 3180 adds r1, #128 @ 0x80
|
|
100044bc: d207 bcs.n 100044ce <__aeabi_i2f_main+0x26>
|
|
100044be: 060b lsls r3, r1, #24
|
|
100044c0: d007 beq.n 100044d2 <__aeabi_i2f_main+0x2a>
|
|
100044c2: 0049 lsls r1, r1, #1
|
|
100044c4: 0a49 lsrs r1, r1, #9
|
|
100044c6: 05c0 lsls r0, r0, #23
|
|
100044c8: 4310 orrs r0, r2
|
|
100044ca: 4308 orrs r0, r1
|
|
100044cc: 4760 bx ip
|
|
100044ce: 3001 adds r0, #1
|
|
100044d0: e7f8 b.n 100044c4 <__aeabi_i2f_main+0x1c>
|
|
100044d2: 0a49 lsrs r1, r1, #9
|
|
100044d4: 0289 lsls r1, r1, #10
|
|
100044d6: e7f5 b.n 100044c4 <__aeabi_i2f_main+0x1c>
|
|
100044d8: 4770 bx lr
|
|
100044da: 0000 .short 0x0000
|
|
100044dc: 20000c68 .word 0x20000c68
|
|
|
|
100044e0 <__wrap___aeabi_f2uiz>:
|
|
100044e0: 2300 movs r3, #0
|
|
100044e2: 469c mov ip, r3
|
|
100044e4: 4b01 ldr r3, [pc, #4] @ (100044ec <__wrap___aeabi_f2uiz+0xc>)
|
|
100044e6: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
100044e8: 4718 bx r3
|
|
100044ea: 0000 .short 0x0000
|
|
100044ec: 20000c6c .word 0x20000c6c
|
|
|
|
100044f0 <__aeabi_float_init>:
|
|
100044f0: b570 push {r4, r5, r6, lr}
|
|
100044f2: 2313 movs r3, #19
|
|
100044f4: 781e ldrb r6, [r3, #0]
|
|
100044f6: 482a ldr r0, [pc, #168] @ (100045a0 <__aeabi_float_init+0xb0>)
|
|
100044f8: f7ff f8fa bl 100036f0 <rom_data_lookup>
|
|
100044fc: 0005 movs r5, r0
|
|
100044fe: 2e01 cmp r6, #1
|
|
10004500: d011 beq.n 10004526 <__aeabi_float_init+0x36>
|
|
10004502: 2e01 cmp r6, #1
|
|
10004504: dd09 ble.n 1000451a <__aeabi_float_init+0x2a>
|
|
10004506: 1eab subs r3, r5, #2
|
|
10004508: 781b ldrb r3, [r3, #0]
|
|
1000450a: 009b lsls r3, r3, #2
|
|
1000450c: 2b7f cmp r3, #127 @ 0x7f
|
|
1000450e: dd40 ble.n 10004592 <__aeabi_float_init+0xa2>
|
|
10004510: 4824 ldr r0, [pc, #144] @ (100045a4 <__aeabi_float_init+0xb4>)
|
|
10004512: 2280 movs r2, #128 @ 0x80
|
|
10004514: 0029 movs r1, r5
|
|
10004516: f000 f8af bl 10004678 <__wrap___aeabi_memcpy>
|
|
1000451a: 4823 ldr r0, [pc, #140] @ (100045a8 <__aeabi_float_init+0xb8>)
|
|
1000451c: f7ff f8e0 bl 100036e0 <rom_func_lookup>
|
|
10004520: 4b22 ldr r3, [pc, #136] @ (100045ac <__aeabi_float_init+0xbc>)
|
|
10004522: 6018 str r0, [r3, #0]
|
|
10004524: bd70 pop {r4, r5, r6, pc}
|
|
10004526: 481f ldr r0, [pc, #124] @ (100045a4 <__aeabi_float_init+0xb4>)
|
|
10004528: 2254 movs r2, #84 @ 0x54
|
|
1000452a: 0029 movs r1, r5
|
|
1000452c: f000 f8a4 bl 10004678 <__wrap___aeabi_memcpy>
|
|
10004530: 4b1f ldr r3, [pc, #124] @ (100045b0 <__aeabi_float_init+0xc0>)
|
|
10004532: 881a ldrh r2, [r3, #0]
|
|
10004534: 4b1f ldr r3, [pc, #124] @ (100045b4 <__aeabi_float_init+0xc4>)
|
|
10004536: 429a cmp r2, r3
|
|
10004538: d11c bne.n 10004574 <__aeabi_float_init+0x84>
|
|
1000453a: 23a7 movs r3, #167 @ 0xa7
|
|
1000453c: 019b lsls r3, r3, #6
|
|
1000453e: 881a ldrh r2, [r3, #0]
|
|
10004540: 4b1d ldr r3, [pc, #116] @ (100045b8 <__aeabi_float_init+0xc8>)
|
|
10004542: 429a cmp r2, r3
|
|
10004544: d116 bne.n 10004574 <__aeabi_float_init+0x84>
|
|
10004546: 4b1d ldr r3, [pc, #116] @ (100045bc <__aeabi_float_init+0xcc>)
|
|
10004548: 881a ldrh r2, [r3, #0]
|
|
1000454a: 4b1d ldr r3, [pc, #116] @ (100045c0 <__aeabi_float_init+0xd0>)
|
|
1000454c: 429a cmp r2, r3
|
|
1000454e: d111 bne.n 10004574 <__aeabi_float_init+0x84>
|
|
10004550: 4b1c ldr r3, [pc, #112] @ (100045c4 <__aeabi_float_init+0xd4>)
|
|
10004552: 881a ldrh r2, [r3, #0]
|
|
10004554: 2394 movs r3, #148 @ 0x94
|
|
10004556: 019b lsls r3, r3, #6
|
|
10004558: 429a cmp r2, r3
|
|
1000455a: d10b bne.n 10004574 <__aeabi_float_init+0x84>
|
|
1000455c: 4b1a ldr r3, [pc, #104] @ (100045c8 <__aeabi_float_init+0xd8>)
|
|
1000455e: 881a ldrh r2, [r3, #0]
|
|
10004560: 4b1a ldr r3, [pc, #104] @ (100045cc <__aeabi_float_init+0xdc>)
|
|
10004562: 429a cmp r2, r3
|
|
10004564: d106 bne.n 10004574 <__aeabi_float_init+0x84>
|
|
10004566: 4b1a ldr r3, [pc, #104] @ (100045d0 <__aeabi_float_init+0xe0>)
|
|
10004568: 681a ldr r2, [r3, #0]
|
|
1000456a: 4b1a ldr r3, [pc, #104] @ (100045d4 <__aeabi_float_init+0xe4>)
|
|
1000456c: 429a cmp r2, r3
|
|
1000456e: d101 bne.n 10004574 <__aeabi_float_init+0x84>
|
|
10004570: 2315 movs r3, #21
|
|
10004572: e007 b.n 10004584 <__aeabi_float_init+0x94>
|
|
10004574: 4818 ldr r0, [pc, #96] @ (100045d8 <__aeabi_float_init+0xe8>)
|
|
10004576: f7fd ffb7 bl 100024e8 <panic>
|
|
1000457a: 4c18 ldr r4, [pc, #96] @ (100045dc <__aeabi_float_init+0xec>)
|
|
1000457c: 4a09 ldr r2, [pc, #36] @ (100045a4 <__aeabi_float_init+0xb4>)
|
|
1000457e: 0099 lsls r1, r3, #2
|
|
10004580: 508c str r4, [r1, r2]
|
|
10004582: 3301 adds r3, #1
|
|
10004584: 2b1f cmp r3, #31
|
|
10004586: d9f8 bls.n 1000457a <__aeabi_float_init+0x8a>
|
|
10004588: 4b14 ldr r3, [pc, #80] @ (100045dc <__aeabi_float_init+0xec>)
|
|
1000458a: 4a06 ldr r2, [pc, #24] @ (100045a4 <__aeabi_float_init+0xb4>)
|
|
1000458c: 6213 str r3, [r2, #32]
|
|
1000458e: 61d3 str r3, [r2, #28]
|
|
10004590: e7b7 b.n 10004502 <__aeabi_float_init+0x12>
|
|
10004592: 4b13 ldr r3, [pc, #76] @ (100045e0 <__aeabi_float_init+0xf0>)
|
|
10004594: 4a13 ldr r2, [pc, #76] @ (100045e4 <__aeabi_float_init+0xf4>)
|
|
10004596: 4814 ldr r0, [pc, #80] @ (100045e8 <__aeabi_float_init+0xf8>)
|
|
10004598: 2142 movs r1, #66 @ 0x42
|
|
1000459a: f7fd ff0d bl 100023b8 <__assert_func>
|
|
1000459e: 46c0 nop @ (mov r8, r8)
|
|
100045a0: 00004653 .word 0x00004653
|
|
100045a4: 20000c6c .word 0x20000c6c
|
|
100045a8: 0000334c .word 0x0000334c
|
|
100045ac: 20000c68 .word 0x20000c68
|
|
100045b0: 000029ee .word 0x000029ee
|
|
100045b4: 00000fc4 .word 0x00000fc4
|
|
100045b8: 00000dc2 .word 0x00000dc2
|
|
100045bc: 00002b96 .word 0x00002b96
|
|
100045c0: 0000b5c0 .word 0x0000b5c0
|
|
100045c4: 00002b18 .word 0x00002b18
|
|
100045c8: 00002acc .word 0x00002acc
|
|
100045cc: 0000b510 .word 0x0000b510
|
|
100045d0: 00002cfc .word 0x00002cfc
|
|
100045d4: 6487ed51 .word 0x6487ed51
|
|
100045d8: 10006334 .word 0x10006334
|
|
100045dc: 100045ed .word 0x100045ed
|
|
100045e0: 100066c8 .word 0x100066c8
|
|
100045e4: 1000674c .word 0x1000674c
|
|
100045e8: 100066fc .word 0x100066fc
|
|
|
|
100045ec <float_table_shim_on_use_helper>:
|
|
100045ec: b507 push {r0, r1, r2, lr}
|
|
100045ee: 4660 mov r0, ip
|
|
100045f0: 2800 cmp r0, #0
|
|
100045f2: d100 bne.n 100045f6 <float_table_shim_on_use_helper+0xa>
|
|
100045f4: be00 bkpt 0x0000
|
|
100045f6: 8801 ldrh r1, [r0, #0]
|
|
100045f8: 0a0a lsrs r2, r1, #8
|
|
100045fa: 3002 adds r0, #2
|
|
100045fc: 2adf cmp r2, #223 @ 0xdf
|
|
100045fe: d1fa bne.n 100045f6 <float_table_shim_on_use_helper+0xa>
|
|
10004600: b2c9 uxtb r1, r1
|
|
10004602: 0882 lsrs r2, r0, #2
|
|
10004604: d304 bcc.n 10004610 <float_table_shim_on_use_helper+0x24>
|
|
10004606: 8802 ldrh r2, [r0, #0]
|
|
10004608: 8840 ldrh r0, [r0, #2]
|
|
1000460a: 0400 lsls r0, r0, #16
|
|
1000460c: 4310 orrs r0, r2
|
|
1000460e: e000 b.n 10004612 <float_table_shim_on_use_helper+0x26>
|
|
10004610: 6800 ldr r0, [r0, #0]
|
|
10004612: 4a02 ldr r2, [pc, #8] @ (1000461c <float_table_shim_on_use_helper+0x30>)
|
|
10004614: 5050 str r0, [r2, r1]
|
|
10004616: 9003 str r0, [sp, #12]
|
|
10004618: bd07 pop {r0, r1, r2, pc}
|
|
1000461a: 0000 .short 0x0000
|
|
1000461c: 20000c6c .word 0x20000c6c
|
|
|
|
10004620 <check_alloc>:
|
|
10004620: b510 push {r4, lr}
|
|
10004622: 2800 cmp r0, #0
|
|
10004624: d004 beq.n 10004630 <check_alloc+0x10>
|
|
10004626: 1840 adds r0, r0, r1
|
|
10004628: 4b03 ldr r3, [pc, #12] @ (10004638 <check_alloc+0x18>)
|
|
1000462a: 4298 cmp r0, r3
|
|
1000462c: d800 bhi.n 10004630 <check_alloc+0x10>
|
|
1000462e: bd10 pop {r4, pc}
|
|
10004630: 4802 ldr r0, [pc, #8] @ (1000463c <check_alloc+0x1c>)
|
|
10004632: f7fd ff59 bl 100024e8 <panic>
|
|
10004636: 46c0 nop @ (mov r8, r8)
|
|
10004638: 20040000 .word 0x20040000
|
|
1000463c: 10006760 .word 0x10006760
|
|
|
|
10004640 <__wrap_malloc>:
|
|
10004640: b570 push {r4, r5, r6, lr}
|
|
10004642: 0005 movs r5, r0
|
|
10004644: f000 fc50 bl 10004ee8 <malloc>
|
|
10004648: 0004 movs r4, r0
|
|
1000464a: 0029 movs r1, r5
|
|
1000464c: f7ff ffe8 bl 10004620 <check_alloc>
|
|
10004650: 0020 movs r0, r4
|
|
10004652: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10004654 <__wrap_free>:
|
|
10004654: b510 push {r4, lr}
|
|
10004656: f000 fc51 bl 10004efc <free>
|
|
1000465a: bd10 pop {r4, pc}
|
|
|
|
1000465c <__aeabi_mem_init>:
|
|
1000465c: 4801 ldr r0, [pc, #4] @ (10004664 <__aeabi_mem_init+0x8>)
|
|
1000465e: 2104 movs r1, #4
|
|
10004660: 4b01 ldr r3, [pc, #4] @ (10004668 <__aeabi_mem_init+0xc>)
|
|
10004662: 4718 bx r3
|
|
10004664: 200002c0 .word 0x200002c0
|
|
10004668: 10003701 .word 0x10003701
|
|
|
|
1000466c <__wrap_memset>:
|
|
1000466c: 4b01 ldr r3, [pc, #4] @ (10004674 <__wrap_memset+0x8>)
|
|
1000466e: 681b ldr r3, [r3, #0]
|
|
10004670: 4718 bx r3
|
|
10004672: 0000 .short 0x0000
|
|
10004674: 200002c0 .word 0x200002c0
|
|
|
|
10004678 <__wrap___aeabi_memcpy>:
|
|
10004678: 4b01 ldr r3, [pc, #4] @ (10004680 <__wrap___aeabi_memcpy+0x8>)
|
|
1000467a: 685b ldr r3, [r3, #4]
|
|
1000467c: 4718 bx r3
|
|
1000467e: 0000 .short 0x0000
|
|
10004680: 200002c0 .word 0x200002c0
|
|
|
|
10004684 <stdio_out_chars_no_crlf>:
|
|
10004684: b510 push {r4, lr}
|
|
10004686: 0003 movs r3, r0
|
|
10004688: 0008 movs r0, r1
|
|
1000468a: 0011 movs r1, r2
|
|
1000468c: 681b ldr r3, [r3, #0]
|
|
1000468e: 4798 blx r3
|
|
10004690: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10004694 <stdio_out_chars_crlf>:
|
|
10004694: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10004696: 0007 movs r7, r0
|
|
10004698: 000d movs r5, r1
|
|
1000469a: 0016 movs r6, r2
|
|
1000469c: 7d43 ldrb r3, [r0, #21]
|
|
1000469e: 2b00 cmp r3, #0
|
|
100046a0: d002 beq.n 100046a8 <stdio_out_chars_crlf+0x14>
|
|
100046a2: 2400 movs r4, #0
|
|
100046a4: 2000 movs r0, #0
|
|
100046a6: e00c b.n 100046c2 <stdio_out_chars_crlf+0x2e>
|
|
100046a8: 6803 ldr r3, [r0, #0]
|
|
100046aa: 0011 movs r1, r2
|
|
100046ac: 0028 movs r0, r5
|
|
100046ae: 4798 blx r3
|
|
100046b0: e02d b.n 1000470e <stdio_out_chars_crlf+0x7a>
|
|
100046b2: 7d3b ldrb r3, [r7, #20]
|
|
100046b4: e010 b.n 100046d8 <stdio_out_chars_crlf+0x44>
|
|
100046b6: 683b ldr r3, [r7, #0]
|
|
100046b8: 4815 ldr r0, [pc, #84] @ (10004710 <stdio_out_chars_crlf+0x7c>)
|
|
100046ba: 2102 movs r1, #2
|
|
100046bc: 4798 blx r3
|
|
100046be: 1c60 adds r0, r4, #1
|
|
100046c0: 3401 adds r4, #1
|
|
100046c2: 42b4 cmp r4, r6
|
|
100046c4: da14 bge.n 100046f0 <stdio_out_chars_crlf+0x5c>
|
|
100046c6: 2c00 cmp r4, #0
|
|
100046c8: ddf3 ble.n 100046b2 <stdio_out_chars_crlf+0x1e>
|
|
100046ca: 192b adds r3, r5, r4
|
|
100046cc: 3b01 subs r3, #1
|
|
100046ce: 781b ldrb r3, [r3, #0]
|
|
100046d0: 3b0d subs r3, #13
|
|
100046d2: 425a negs r2, r3
|
|
100046d4: 4153 adcs r3, r2
|
|
100046d6: b2db uxtb r3, r3
|
|
100046d8: 5d2a ldrb r2, [r5, r4]
|
|
100046da: 2a0a cmp r2, #10
|
|
100046dc: d1f0 bne.n 100046c0 <stdio_out_chars_crlf+0x2c>
|
|
100046de: 2b00 cmp r3, #0
|
|
100046e0: d1ee bne.n 100046c0 <stdio_out_chars_crlf+0x2c>
|
|
100046e2: 42a0 cmp r0, r4
|
|
100046e4: dae7 bge.n 100046b6 <stdio_out_chars_crlf+0x22>
|
|
100046e6: 683b ldr r3, [r7, #0]
|
|
100046e8: 1a21 subs r1, r4, r0
|
|
100046ea: 1828 adds r0, r5, r0
|
|
100046ec: 4798 blx r3
|
|
100046ee: e7e2 b.n 100046b6 <stdio_out_chars_crlf+0x22>
|
|
100046f0: 42b0 cmp r0, r6
|
|
100046f2: da03 bge.n 100046fc <stdio_out_chars_crlf+0x68>
|
|
100046f4: 683b ldr r3, [r7, #0]
|
|
100046f6: 1a31 subs r1, r6, r0
|
|
100046f8: 1828 adds r0, r5, r0
|
|
100046fa: 4798 blx r3
|
|
100046fc: 2e00 cmp r6, #0
|
|
100046fe: dd06 ble.n 1000470e <stdio_out_chars_crlf+0x7a>
|
|
10004700: 19ad adds r5, r5, r6
|
|
10004702: 3d01 subs r5, #1
|
|
10004704: 782b ldrb r3, [r5, #0]
|
|
10004706: 3b0d subs r3, #13
|
|
10004708: 425a negs r2, r3
|
|
1000470a: 4153 adcs r3, r2
|
|
1000470c: 753b strb r3, [r7, #20]
|
|
1000470e: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10004710: 100067d0 .word 0x100067d0
|
|
|
|
10004714 <stdio_stack_buffer_flush>:
|
|
10004714: b570 push {r4, r5, r6, lr}
|
|
10004716: 0005 movs r5, r0
|
|
10004718: 6803 ldr r3, [r0, #0]
|
|
1000471a: 2b00 cmp r3, #0
|
|
1000471c: d016 beq.n 1000474c <stdio_stack_buffer_flush+0x38>
|
|
1000471e: 4b0c ldr r3, [pc, #48] @ (10004750 <stdio_stack_buffer_flush+0x3c>)
|
|
10004720: 681c ldr r4, [r3, #0]
|
|
10004722: e005 b.n 10004730 <stdio_stack_buffer_flush+0x1c>
|
|
10004724: 0029 movs r1, r5
|
|
10004726: c904 ldmia r1!, {r2}
|
|
10004728: 0020 movs r0, r4
|
|
1000472a: f7ff ffb3 bl 10004694 <stdio_out_chars_crlf>
|
|
1000472e: 6924 ldr r4, [r4, #16]
|
|
10004730: 2c00 cmp r4, #0
|
|
10004732: d009 beq.n 10004748 <stdio_stack_buffer_flush+0x34>
|
|
10004734: 6823 ldr r3, [r4, #0]
|
|
10004736: 2b00 cmp r3, #0
|
|
10004738: d0f9 beq.n 1000472e <stdio_stack_buffer_flush+0x1a>
|
|
1000473a: 4b06 ldr r3, [pc, #24] @ (10004754 <stdio_stack_buffer_flush+0x40>)
|
|
1000473c: 681b ldr r3, [r3, #0]
|
|
1000473e: 2b00 cmp r3, #0
|
|
10004740: d0f0 beq.n 10004724 <stdio_stack_buffer_flush+0x10>
|
|
10004742: 42a3 cmp r3, r4
|
|
10004744: d1f3 bne.n 1000472e <stdio_stack_buffer_flush+0x1a>
|
|
10004746: e7ed b.n 10004724 <stdio_stack_buffer_flush+0x10>
|
|
10004748: 2300 movs r3, #0
|
|
1000474a: 602b str r3, [r5, #0]
|
|
1000474c: bd70 pop {r4, r5, r6, pc}
|
|
1000474e: 46c0 nop @ (mov r8, r8)
|
|
10004750: 20000b48 .word 0x20000b48
|
|
10004754: 20000b50 .word 0x20000b50
|
|
|
|
10004758 <stdio_buffered_printer>:
|
|
10004758: b570 push {r4, r5, r6, lr}
|
|
1000475a: 0005 movs r5, r0
|
|
1000475c: 000c movs r4, r1
|
|
1000475e: 680b ldr r3, [r1, #0]
|
|
10004760: 2b80 cmp r3, #128 @ 0x80
|
|
10004762: d005 beq.n 10004770 <stdio_buffered_printer+0x18>
|
|
10004764: 6823 ldr r3, [r4, #0]
|
|
10004766: 1c5a adds r2, r3, #1
|
|
10004768: 6022 str r2, [r4, #0]
|
|
1000476a: 18e4 adds r4, r4, r3
|
|
1000476c: 7125 strb r5, [r4, #4]
|
|
1000476e: bd70 pop {r4, r5, r6, pc}
|
|
10004770: 0008 movs r0, r1
|
|
10004772: f7ff ffcf bl 10004714 <stdio_stack_buffer_flush>
|
|
10004776: e7f5 b.n 10004764 <stdio_buffered_printer+0xc>
|
|
|
|
10004778 <update_us_since_boot>:
|
|
10004778: b510 push {r4, lr}
|
|
1000477a: 2b00 cmp r3, #0
|
|
1000477c: db02 blt.n 10004784 <update_us_since_boot+0xc>
|
|
1000477e: 6002 str r2, [r0, #0]
|
|
10004780: 6043 str r3, [r0, #4]
|
|
10004782: bd10 pop {r4, pc}
|
|
10004784: 4b02 ldr r3, [pc, #8] @ (10004790 <update_us_since_boot+0x18>)
|
|
10004786: 4a03 ldr r2, [pc, #12] @ (10004794 <update_us_since_boot+0x1c>)
|
|
10004788: 4803 ldr r0, [pc, #12] @ (10004798 <update_us_since_boot+0x20>)
|
|
1000478a: 213f movs r1, #63 @ 0x3f
|
|
1000478c: f7fd fe14 bl 100023b8 <__assert_func>
|
|
10004790: 100058fc .word 0x100058fc
|
|
10004794: 100067d4 .word 0x100067d4
|
|
10004798: 10005918 .word 0x10005918
|
|
|
|
1000479c <get_absolute_time>:
|
|
1000479c: b510 push {r4, lr}
|
|
1000479e: b082 sub sp, #8
|
|
100047a0: 0004 movs r4, r0
|
|
100047a2: f7fd f939 bl 10001a18 <time_us_64>
|
|
100047a6: 0002 movs r2, r0
|
|
100047a8: 000b movs r3, r1
|
|
100047aa: 4668 mov r0, sp
|
|
100047ac: f7ff ffe4 bl 10004778 <update_us_since_boot>
|
|
100047b0: 9a00 ldr r2, [sp, #0]
|
|
100047b2: 9b01 ldr r3, [sp, #4]
|
|
100047b4: 6022 str r2, [r4, #0]
|
|
100047b6: 6063 str r3, [r4, #4]
|
|
100047b8: 0020 movs r0, r4
|
|
100047ba: b002 add sp, #8
|
|
100047bc: bd10 pop {r4, pc}
|
|
...
|
|
|
|
100047c0 <delayed_by_ms>:
|
|
100047c0: b570 push {r4, r5, r6, lr}
|
|
100047c2: b082 sub sp, #8
|
|
100047c4: 0006 movs r6, r0
|
|
100047c6: 0014 movs r4, r2
|
|
100047c8: 001d movs r5, r3
|
|
100047ca: 22fa movs r2, #250 @ 0xfa
|
|
100047cc: 0092 lsls r2, r2, #2
|
|
100047ce: 2300 movs r3, #0
|
|
100047d0: 9806 ldr r0, [sp, #24]
|
|
100047d2: 2100 movs r1, #0
|
|
100047d4: f7ff fe16 bl 10004404 <__wrap___aeabi_lmul>
|
|
100047d8: 0002 movs r2, r0
|
|
100047da: 000b movs r3, r1
|
|
100047dc: 1912 adds r2, r2, r4
|
|
100047de: 416b adcs r3, r5
|
|
100047e0: 2b00 cmp r3, #0
|
|
100047e2: db09 blt.n 100047f8 <delayed_by_ms+0x38>
|
|
100047e4: 4668 mov r0, sp
|
|
100047e6: f7ff ffc7 bl 10004778 <update_us_since_boot>
|
|
100047ea: 9a00 ldr r2, [sp, #0]
|
|
100047ec: 9b01 ldr r3, [sp, #4]
|
|
100047ee: 6032 str r2, [r6, #0]
|
|
100047f0: 6073 str r3, [r6, #4]
|
|
100047f2: 0030 movs r0, r6
|
|
100047f4: b002 add sp, #8
|
|
100047f6: bd70 pop {r4, r5, r6, pc}
|
|
100047f8: 2201 movs r2, #1
|
|
100047fa: 4252 negs r2, r2
|
|
100047fc: 4b00 ldr r3, [pc, #0] @ (10004800 <delayed_by_ms+0x40>)
|
|
100047fe: e7f1 b.n 100047e4 <delayed_by_ms+0x24>
|
|
10004800: 7fffffff .word 0x7fffffff
|
|
|
|
10004804 <make_timeout_time_ms>:
|
|
10004804: b530 push {r4, r5, lr}
|
|
10004806: b085 sub sp, #20
|
|
10004808: 0004 movs r4, r0
|
|
1000480a: 000d movs r5, r1
|
|
1000480c: a802 add r0, sp, #8
|
|
1000480e: f7ff ffc5 bl 1000479c <get_absolute_time>
|
|
10004812: 9a02 ldr r2, [sp, #8]
|
|
10004814: 9b03 ldr r3, [sp, #12]
|
|
10004816: 9500 str r5, [sp, #0]
|
|
10004818: 0020 movs r0, r4
|
|
1000481a: f7ff ffd1 bl 100047c0 <delayed_by_ms>
|
|
1000481e: 0020 movs r0, r4
|
|
10004820: b005 add sp, #20
|
|
10004822: bd30 pop {r4, r5, pc}
|
|
|
|
10004824 <stdout_serialize_begin>:
|
|
10004824: b500 push {lr}
|
|
10004826: b083 sub sp, #12
|
|
10004828: 21fa movs r1, #250 @ 0xfa
|
|
1000482a: 0089 lsls r1, r1, #2
|
|
1000482c: 4668 mov r0, sp
|
|
1000482e: f7ff ffe9 bl 10004804 <make_timeout_time_ms>
|
|
10004832: 9a00 ldr r2, [sp, #0]
|
|
10004834: 9b01 ldr r3, [sp, #4]
|
|
10004836: 4802 ldr r0, [pc, #8] @ (10004840 <stdout_serialize_begin+0x1c>)
|
|
10004838: f001 f802 bl 10005840 <__mutex_try_enter_block_until_veneer>
|
|
1000483c: b003 add sp, #12
|
|
1000483e: bd00 pop {pc}
|
|
10004840: 20000820 .word 0x20000820
|
|
|
|
10004844 <stdout_serialize_end>:
|
|
10004844: b510 push {r4, lr}
|
|
10004846: 4802 ldr r0, [pc, #8] @ (10004850 <stdout_serialize_end+0xc>)
|
|
10004848: f000 ffe2 bl 10005810 <__mutex_exit_veneer>
|
|
1000484c: bd10 pop {r4, pc}
|
|
1000484e: 46c0 nop @ (mov r8, r8)
|
|
10004850: 20000820 .word 0x20000820
|
|
|
|
10004854 <stdio_put_string>:
|
|
10004854: b5f0 push {r4, r5, r6, r7, lr}
|
|
10004856: 46ce mov lr, r9
|
|
10004858: 4647 mov r7, r8
|
|
1000485a: b580 push {r7, lr}
|
|
1000485c: b083 sub sp, #12
|
|
1000485e: 0006 movs r6, r0
|
|
10004860: 000d movs r5, r1
|
|
10004862: 4690 mov r8, r2
|
|
10004864: 001c movs r4, r3
|
|
10004866: f7ff ffdd bl 10004824 <stdout_serialize_begin>
|
|
1000486a: 4681 mov r9, r0
|
|
1000486c: 1c6b adds r3, r5, #1
|
|
1000486e: d005 beq.n 1000487c <stdio_put_string+0x28>
|
|
10004870: 2c00 cmp r4, #0
|
|
10004872: d008 beq.n 10004886 <stdio_put_string+0x32>
|
|
10004874: 4f19 ldr r7, [pc, #100] @ (100048dc <stdio_put_string+0x88>)
|
|
10004876: 4b1a ldr r3, [pc, #104] @ (100048e0 <stdio_put_string+0x8c>)
|
|
10004878: 681c ldr r4, [r3, #0]
|
|
1000487a: e007 b.n 1000488c <stdio_put_string+0x38>
|
|
1000487c: 0030 movs r0, r6
|
|
1000487e: f000 fe53 bl 10005528 <strlen>
|
|
10004882: 0005 movs r5, r0
|
|
10004884: e7f4 b.n 10004870 <stdio_put_string+0x1c>
|
|
10004886: 4f17 ldr r7, [pc, #92] @ (100048e4 <stdio_put_string+0x90>)
|
|
10004888: e7f5 b.n 10004876 <stdio_put_string+0x22>
|
|
1000488a: 6924 ldr r4, [r4, #16]
|
|
1000488c: 2c00 cmp r4, #0
|
|
1000488e: d017 beq.n 100048c0 <stdio_put_string+0x6c>
|
|
10004890: 6823 ldr r3, [r4, #0]
|
|
10004892: 2b00 cmp r3, #0
|
|
10004894: d0f9 beq.n 1000488a <stdio_put_string+0x36>
|
|
10004896: 4b14 ldr r3, [pc, #80] @ (100048e8 <stdio_put_string+0x94>)
|
|
10004898: 681b ldr r3, [r3, #0]
|
|
1000489a: 2b00 cmp r3, #0
|
|
1000489c: d001 beq.n 100048a2 <stdio_put_string+0x4e>
|
|
1000489e: 42a3 cmp r3, r4
|
|
100048a0: d1f3 bne.n 1000488a <stdio_put_string+0x36>
|
|
100048a2: 002a movs r2, r5
|
|
100048a4: 0031 movs r1, r6
|
|
100048a6: 0020 movs r0, r4
|
|
100048a8: 47b8 blx r7
|
|
100048aa: 4643 mov r3, r8
|
|
100048ac: 2b00 cmp r3, #0
|
|
100048ae: d0ec beq.n 1000488a <stdio_put_string+0x36>
|
|
100048b0: 466b mov r3, sp
|
|
100048b2: 1dd9 adds r1, r3, #7
|
|
100048b4: 230a movs r3, #10
|
|
100048b6: 700b strb r3, [r1, #0]
|
|
100048b8: 2201 movs r2, #1
|
|
100048ba: 0020 movs r0, r4
|
|
100048bc: 47b8 blx r7
|
|
100048be: e7e4 b.n 1000488a <stdio_put_string+0x36>
|
|
100048c0: 464b mov r3, r9
|
|
100048c2: 2b00 cmp r3, #0
|
|
100048c4: d107 bne.n 100048d6 <stdio_put_string+0x82>
|
|
100048c6: 1e6b subs r3, r5, #1
|
|
100048c8: 419d sbcs r5, r3
|
|
100048ca: b2e8 uxtb r0, r5
|
|
100048cc: b003 add sp, #12
|
|
100048ce: bcc0 pop {r6, r7}
|
|
100048d0: 46b9 mov r9, r7
|
|
100048d2: 46b0 mov r8, r6
|
|
100048d4: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100048d6: f7ff ffb5 bl 10004844 <stdout_serialize_end>
|
|
100048da: e7f4 b.n 100048c6 <stdio_put_string+0x72>
|
|
100048dc: 10004685 .word 0x10004685
|
|
100048e0: 20000b48 .word 0x20000b48
|
|
100048e4: 10004695 .word 0x10004695
|
|
100048e8: 20000b50 .word 0x20000b50
|
|
|
|
100048ec <stdio_set_driver_enabled>:
|
|
100048ec: 4a09 ldr r2, [pc, #36] @ (10004914 <stdio_set_driver_enabled+0x28>)
|
|
100048ee: e001 b.n 100048f4 <stdio_set_driver_enabled+0x8>
|
|
100048f0: 3310 adds r3, #16
|
|
100048f2: 001a movs r2, r3
|
|
100048f4: 6813 ldr r3, [r2, #0]
|
|
100048f6: 2b00 cmp r3, #0
|
|
100048f8: d008 beq.n 1000490c <stdio_set_driver_enabled+0x20>
|
|
100048fa: 4283 cmp r3, r0
|
|
100048fc: d1f8 bne.n 100048f0 <stdio_set_driver_enabled+0x4>
|
|
100048fe: 2900 cmp r1, #0
|
|
10004900: d107 bne.n 10004912 <stdio_set_driver_enabled+0x26>
|
|
10004902: 6903 ldr r3, [r0, #16]
|
|
10004904: 6013 str r3, [r2, #0]
|
|
10004906: 2300 movs r3, #0
|
|
10004908: 6103 str r3, [r0, #16]
|
|
1000490a: e002 b.n 10004912 <stdio_set_driver_enabled+0x26>
|
|
1000490c: 2900 cmp r1, #0
|
|
1000490e: d000 beq.n 10004912 <stdio_set_driver_enabled+0x26>
|
|
10004910: 6010 str r0, [r2, #0]
|
|
10004912: 4770 bx lr
|
|
10004914: 20000b48 .word 0x20000b48
|
|
|
|
10004918 <stdio_flush>:
|
|
10004918: b510 push {r4, lr}
|
|
1000491a: 4b06 ldr r3, [pc, #24] @ (10004934 <stdio_flush+0x1c>)
|
|
1000491c: 681c ldr r4, [r3, #0]
|
|
1000491e: e001 b.n 10004924 <stdio_flush+0xc>
|
|
10004920: 4798 blx r3
|
|
10004922: 6924 ldr r4, [r4, #16]
|
|
10004924: 2c00 cmp r4, #0
|
|
10004926: d003 beq.n 10004930 <stdio_flush+0x18>
|
|
10004928: 6863 ldr r3, [r4, #4]
|
|
1000492a: 2b00 cmp r3, #0
|
|
1000492c: d1f8 bne.n 10004920 <stdio_flush+0x8>
|
|
1000492e: e7f8 b.n 10004922 <stdio_flush+0xa>
|
|
10004930: bd10 pop {r4, pc}
|
|
10004932: 46c0 nop @ (mov r8, r8)
|
|
10004934: 20000b48 .word 0x20000b48
|
|
|
|
10004938 <__wrap_puts>:
|
|
10004938: b570 push {r4, r5, r6, lr}
|
|
1000493a: 0005 movs r5, r0
|
|
1000493c: f000 fdf4 bl 10005528 <strlen>
|
|
10004940: 0004 movs r4, r0
|
|
10004942: 2300 movs r3, #0
|
|
10004944: 2201 movs r2, #1
|
|
10004946: 0001 movs r1, r0
|
|
10004948: 0028 movs r0, r5
|
|
1000494a: f7ff ff83 bl 10004854 <stdio_put_string>
|
|
1000494e: f7ff ffe3 bl 10004918 <stdio_flush>
|
|
10004952: 0020 movs r0, r4
|
|
10004954: bd70 pop {r4, r5, r6, pc}
|
|
...
|
|
|
|
10004958 <__wrap_vprintf>:
|
|
10004958: b570 push {r4, r5, r6, lr}
|
|
1000495a: b0a2 sub sp, #136 @ 0x88
|
|
1000495c: 0004 movs r4, r0
|
|
1000495e: 000e movs r6, r1
|
|
10004960: f7ff ff60 bl 10004824 <stdout_serialize_begin>
|
|
10004964: 0005 movs r5, r0
|
|
10004966: 2300 movs r3, #0
|
|
10004968: 9301 str r3, [sp, #4]
|
|
1000496a: 480a ldr r0, [pc, #40] @ (10004994 <__wrap_vprintf+0x3c>)
|
|
1000496c: 0033 movs r3, r6
|
|
1000496e: 0022 movs r2, r4
|
|
10004970: a901 add r1, sp, #4
|
|
10004972: f7fe fe9d bl 100036b0 <vfctprintf>
|
|
10004976: 0004 movs r4, r0
|
|
10004978: a801 add r0, sp, #4
|
|
1000497a: f7ff fecb bl 10004714 <stdio_stack_buffer_flush>
|
|
1000497e: f7ff ffcb bl 10004918 <stdio_flush>
|
|
10004982: 2d00 cmp r5, #0
|
|
10004984: d102 bne.n 1000498c <__wrap_vprintf+0x34>
|
|
10004986: 0020 movs r0, r4
|
|
10004988: b022 add sp, #136 @ 0x88
|
|
1000498a: bd70 pop {r4, r5, r6, pc}
|
|
1000498c: f7ff ff5a bl 10004844 <stdout_serialize_end>
|
|
10004990: e7f9 b.n 10004986 <__wrap_vprintf+0x2e>
|
|
10004992: 46c0 nop @ (mov r8, r8)
|
|
10004994: 10004759 .word 0x10004759
|
|
|
|
10004998 <__wrap_printf>:
|
|
10004998: b40f push {r0, r1, r2, r3}
|
|
1000499a: b500 push {lr}
|
|
1000499c: b083 sub sp, #12
|
|
1000499e: a904 add r1, sp, #16
|
|
100049a0: c901 ldmia r1!, {r0}
|
|
100049a2: 9101 str r1, [sp, #4]
|
|
100049a4: f7ff ffd8 bl 10004958 <__wrap_vprintf>
|
|
100049a8: b003 add sp, #12
|
|
100049aa: bc08 pop {r3}
|
|
100049ac: b004 add sp, #16
|
|
100049ae: 4718 bx r3
|
|
|
|
100049b0 <stdio_init_all>:
|
|
100049b0: b510 push {r4, lr}
|
|
100049b2: f000 f8ff bl 10004bb4 <stdio_uart_init>
|
|
100049b6: 2001 movs r0, #1
|
|
100049b8: bd10 pop {r4, pc}
|
|
...
|
|
|
|
100049bc <uart_putc>:
|
|
100049bc: b510 push {r4, lr}
|
|
100049be: b082 sub sp, #8
|
|
100049c0: 000c movs r4, r1
|
|
100049c2: 4b14 ldr r3, [pc, #80] @ (10004a14 <uart_putc+0x58>)
|
|
100049c4: 18c3 adds r3, r0, r3
|
|
100049c6: 425a negs r2, r3
|
|
100049c8: 4153 adcs r3, r2
|
|
100049ca: 4a13 ldr r2, [pc, #76] @ (10004a18 <uart_putc+0x5c>)
|
|
100049cc: 005b lsls r3, r3, #1
|
|
100049ce: 5e9b ldrsh r3, [r3, r2]
|
|
100049d0: 428b cmp r3, r1
|
|
100049d2: d004 beq.n 100049de <uart_putc+0x22>
|
|
100049d4: 466b mov r3, sp
|
|
100049d6: 1dda adds r2, r3, #7
|
|
100049d8: 7014 strb r4, [r2, #0]
|
|
100049da: 2100 movs r1, #0
|
|
100049dc: e015 b.n 10004a0a <uart_putc+0x4e>
|
|
100049de: 466b mov r3, sp
|
|
100049e0: 1dda adds r2, r3, #7
|
|
100049e2: 230d movs r3, #13
|
|
100049e4: 7013 strb r3, [r2, #0]
|
|
100049e6: 2100 movs r1, #0
|
|
100049e8: 2900 cmp r1, #0
|
|
100049ea: d1f3 bne.n 100049d4 <uart_putc+0x18>
|
|
100049ec: 6983 ldr r3, [r0, #24]
|
|
100049ee: 069b lsls r3, r3, #26
|
|
100049f0: d4fc bmi.n 100049ec <uart_putc+0x30>
|
|
100049f2: 7813 ldrb r3, [r2, #0]
|
|
100049f4: 6003 str r3, [r0, #0]
|
|
100049f6: 3101 adds r1, #1
|
|
100049f8: 3201 adds r2, #1
|
|
100049fa: e7f5 b.n 100049e8 <uart_putc+0x2c>
|
|
100049fc: 6983 ldr r3, [r0, #24]
|
|
100049fe: 069b lsls r3, r3, #26
|
|
10004a00: d4fc bmi.n 100049fc <uart_putc+0x40>
|
|
10004a02: 7813 ldrb r3, [r2, #0]
|
|
10004a04: 6003 str r3, [r0, #0]
|
|
10004a06: 3101 adds r1, #1
|
|
10004a08: 3201 adds r2, #1
|
|
10004a0a: 2900 cmp r1, #0
|
|
10004a0c: d0f6 beq.n 100049fc <uart_putc+0x40>
|
|
10004a0e: b002 add sp, #8
|
|
10004a10: bd10 pop {r4, pc}
|
|
10004a12: 46c0 nop @ (mov r8, r8)
|
|
10004a14: bffc8000 .word 0xbffc8000
|
|
10004a18: 20000da4 .word 0x20000da4
|
|
|
|
10004a1c <uart_getc>:
|
|
10004a1c: b082 sub sp, #8
|
|
10004a1e: 2200 movs r2, #0
|
|
10004a20: 466b mov r3, sp
|
|
10004a22: 1dd9 adds r1, r3, #7
|
|
10004a24: e006 b.n 10004a34 <uart_getc+0x18>
|
|
10004a26: 6983 ldr r3, [r0, #24]
|
|
10004a28: 06db lsls r3, r3, #27
|
|
10004a2a: d4fc bmi.n 10004a26 <uart_getc+0xa>
|
|
10004a2c: 6803 ldr r3, [r0, #0]
|
|
10004a2e: 700b strb r3, [r1, #0]
|
|
10004a30: 3201 adds r2, #1
|
|
10004a32: 3101 adds r1, #1
|
|
10004a34: 2a00 cmp r2, #0
|
|
10004a36: d0f6 beq.n 10004a26 <uart_getc+0xa>
|
|
10004a38: 466b mov r3, sp
|
|
10004a3a: 79d8 ldrb r0, [r3, #7]
|
|
10004a3c: b002 add sp, #8
|
|
10004a3e: 4770 bx lr
|
|
|
|
10004a40 <stdio_uart_out_chars>:
|
|
10004a40: b570 push {r4, r5, r6, lr}
|
|
10004a42: 0006 movs r6, r0
|
|
10004a44: 000d movs r5, r1
|
|
10004a46: 2400 movs r4, #0
|
|
10004a48: e005 b.n 10004a56 <stdio_uart_out_chars+0x16>
|
|
10004a4a: 5d31 ldrb r1, [r6, r4]
|
|
10004a4c: 4b03 ldr r3, [pc, #12] @ (10004a5c <stdio_uart_out_chars+0x1c>)
|
|
10004a4e: 6818 ldr r0, [r3, #0]
|
|
10004a50: f7ff ffb4 bl 100049bc <uart_putc>
|
|
10004a54: 3401 adds r4, #1
|
|
10004a56: 42ac cmp r4, r5
|
|
10004a58: dbf7 blt.n 10004a4a <stdio_uart_out_chars+0xa>
|
|
10004a5a: bd70 pop {r4, r5, r6, pc}
|
|
10004a5c: 20000da8 .word 0x20000da8
|
|
|
|
10004a60 <stdio_uart_in_chars>:
|
|
10004a60: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10004a62: 0006 movs r6, r0
|
|
10004a64: 000d movs r5, r1
|
|
10004a66: 2700 movs r7, #0
|
|
10004a68: e005 b.n 10004a76 <stdio_uart_in_chars+0x16>
|
|
10004a6a: 1c7c adds r4, r7, #1
|
|
10004a6c: 19f7 adds r7, r6, r7
|
|
10004a6e: f7ff ffd5 bl 10004a1c <uart_getc>
|
|
10004a72: 7038 strb r0, [r7, #0]
|
|
10004a74: 0027 movs r7, r4
|
|
10004a76: 42af cmp r7, r5
|
|
10004a78: da04 bge.n 10004a84 <stdio_uart_in_chars+0x24>
|
|
10004a7a: 4a0e ldr r2, [pc, #56] @ (10004ab4 <stdio_uart_in_chars+0x54>)
|
|
10004a7c: 6810 ldr r0, [r2, #0]
|
|
10004a7e: 6982 ldr r2, [r0, #24]
|
|
10004a80: 06d2 lsls r2, r2, #27
|
|
10004a82: d5f2 bpl.n 10004a6a <stdio_uart_in_chars+0xa>
|
|
10004a84: 4a0c ldr r2, [pc, #48] @ (10004ab8 <stdio_uart_in_chars+0x58>)
|
|
10004a86: 6812 ldr r2, [r2, #0]
|
|
10004a88: 2a00 cmp r2, #0
|
|
10004a8a: d00c beq.n 10004aa6 <stdio_uart_in_chars+0x46>
|
|
10004a8c: 4a09 ldr r2, [pc, #36] @ (10004ab4 <stdio_uart_in_chars+0x54>)
|
|
10004a8e: 6812 ldr r2, [r2, #0]
|
|
10004a90: 2150 movs r1, #80 @ 0x50
|
|
10004a92: 6391 str r1, [r2, #56] @ 0x38
|
|
10004a94: 0010 movs r0, r2
|
|
10004a96: 3034 adds r0, #52 @ 0x34
|
|
10004a98: 6b52 ldr r2, [r2, #52] @ 0x34
|
|
10004a9a: 3918 subs r1, #24
|
|
10004a9c: 4011 ands r1, r2
|
|
10004a9e: 2280 movs r2, #128 @ 0x80
|
|
10004aa0: 0152 lsls r2, r2, #5
|
|
10004aa2: 4302 orrs r2, r0
|
|
10004aa4: 6011 str r1, [r2, #0]
|
|
10004aa6: 2f00 cmp r7, #0
|
|
10004aa8: d001 beq.n 10004aae <stdio_uart_in_chars+0x4e>
|
|
10004aaa: 0038 movs r0, r7
|
|
10004aac: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10004aae: 3f03 subs r7, #3
|
|
10004ab0: e7fb b.n 10004aaa <stdio_uart_in_chars+0x4a>
|
|
10004ab2: 46c0 nop @ (mov r8, r8)
|
|
10004ab4: 20000da8 .word 0x20000da8
|
|
10004ab8: 20000ad4 .word 0x20000ad4
|
|
|
|
10004abc <on_uart_rx>:
|
|
10004abc: b510 push {r4, lr}
|
|
10004abe: 4b06 ldr r3, [pc, #24] @ (10004ad8 <on_uart_rx+0x1c>)
|
|
10004ac0: 681b ldr r3, [r3, #0]
|
|
10004ac2: 2b00 cmp r3, #0
|
|
10004ac4: d006 beq.n 10004ad4 <on_uart_rx+0x18>
|
|
10004ac6: 4a05 ldr r2, [pc, #20] @ (10004adc <on_uart_rx+0x20>)
|
|
10004ac8: 6812 ldr r2, [r2, #0]
|
|
10004aca: 2100 movs r1, #0
|
|
10004acc: 6391 str r1, [r2, #56] @ 0x38
|
|
10004ace: 4a04 ldr r2, [pc, #16] @ (10004ae0 <on_uart_rx+0x24>)
|
|
10004ad0: 6810 ldr r0, [r2, #0]
|
|
10004ad2: 4798 blx r3
|
|
10004ad4: bd10 pop {r4, pc}
|
|
10004ad6: 46c0 nop @ (mov r8, r8)
|
|
10004ad8: 20000ad4 .word 0x20000ad4
|
|
10004adc: 20000da8 .word 0x20000da8
|
|
10004ae0: 20000ad8 .word 0x20000ad8
|
|
|
|
10004ae4 <stdio_uart_set_chars_available_callback>:
|
|
10004ae4: b570 push {r4, r5, r6, lr}
|
|
10004ae6: 0005 movs r5, r0
|
|
10004ae8: 000e movs r6, r1
|
|
10004aea: 4b1c ldr r3, [pc, #112] @ (10004b5c <stdio_uart_set_chars_available_callback+0x78>)
|
|
10004aec: 681a ldr r2, [r3, #0]
|
|
10004aee: 4b1c ldr r3, [pc, #112] @ (10004b60 <stdio_uart_set_chars_available_callback+0x7c>)
|
|
10004af0: 18d3 adds r3, r2, r3
|
|
10004af2: 4259 negs r1, r3
|
|
10004af4: 414b adcs r3, r1
|
|
10004af6: 3314 adds r3, #20
|
|
10004af8: 001c movs r4, r3
|
|
10004afa: 2800 cmp r0, #0
|
|
10004afc: d01e beq.n 10004b3c <stdio_uart_set_chars_available_callback+0x58>
|
|
10004afe: 4b19 ldr r3, [pc, #100] @ (10004b64 <stdio_uart_set_chars_available_callback+0x80>)
|
|
10004b00: 681b ldr r3, [r3, #0]
|
|
10004b02: 2b00 cmp r3, #0
|
|
10004b04: d004 beq.n 10004b10 <stdio_uart_set_chars_available_callback+0x2c>
|
|
10004b06: 4b17 ldr r3, [pc, #92] @ (10004b64 <stdio_uart_set_chars_available_callback+0x80>)
|
|
10004b08: 601d str r5, [r3, #0]
|
|
10004b0a: 4b17 ldr r3, [pc, #92] @ (10004b68 <stdio_uart_set_chars_available_callback+0x84>)
|
|
10004b0c: 601e str r6, [r3, #0]
|
|
10004b0e: bd70 pop {r4, r5, r6, pc}
|
|
10004b10: 4916 ldr r1, [pc, #88] @ (10004b6c <stdio_uart_set_chars_available_callback+0x88>)
|
|
10004b12: 0020 movs r0, r4
|
|
10004b14: f7fc f8c2 bl 10000c9c <irq_set_exclusive_handler>
|
|
10004b18: 2101 movs r1, #1
|
|
10004b1a: 0020 movs r0, r4
|
|
10004b1c: f7fc f8ae bl 10000c7c <irq_set_enabled>
|
|
10004b20: 4b0e ldr r3, [pc, #56] @ (10004b5c <stdio_uart_set_chars_available_callback+0x78>)
|
|
10004b22: 681b ldr r3, [r3, #0]
|
|
10004b24: 2250 movs r2, #80 @ 0x50
|
|
10004b26: 639a str r2, [r3, #56] @ 0x38
|
|
10004b28: 0019 movs r1, r3
|
|
10004b2a: 3134 adds r1, #52 @ 0x34
|
|
10004b2c: 6b5b ldr r3, [r3, #52] @ 0x34
|
|
10004b2e: 3a18 subs r2, #24
|
|
10004b30: 401a ands r2, r3
|
|
10004b32: 2380 movs r3, #128 @ 0x80
|
|
10004b34: 015b lsls r3, r3, #5
|
|
10004b36: 430b orrs r3, r1
|
|
10004b38: 601a str r2, [r3, #0]
|
|
10004b3a: e7e4 b.n 10004b06 <stdio_uart_set_chars_available_callback+0x22>
|
|
10004b3c: 4b09 ldr r3, [pc, #36] @ (10004b64 <stdio_uart_set_chars_available_callback+0x80>)
|
|
10004b3e: 681b ldr r3, [r3, #0]
|
|
10004b40: 2b00 cmp r3, #0
|
|
10004b42: d0e0 beq.n 10004b06 <stdio_uart_set_chars_available_callback+0x22>
|
|
10004b44: 2300 movs r3, #0
|
|
10004b46: 6393 str r3, [r2, #56] @ 0x38
|
|
10004b48: 2100 movs r1, #0
|
|
10004b4a: 0020 movs r0, r4
|
|
10004b4c: f7fc f896 bl 10000c7c <irq_set_enabled>
|
|
10004b50: 4906 ldr r1, [pc, #24] @ (10004b6c <stdio_uart_set_chars_available_callback+0x88>)
|
|
10004b52: 0020 movs r0, r4
|
|
10004b54: f7fc f8cc bl 10000cf0 <irq_remove_handler>
|
|
10004b58: e7d5 b.n 10004b06 <stdio_uart_set_chars_available_callback+0x22>
|
|
10004b5a: 46c0 nop @ (mov r8, r8)
|
|
10004b5c: 20000da8 .word 0x20000da8
|
|
10004b60: bffc8000 .word 0xbffc8000
|
|
10004b64: 20000ad4 .word 0x20000ad4
|
|
10004b68: 20000ad8 .word 0x20000ad8
|
|
10004b6c: 10004abd .word 0x10004abd
|
|
|
|
10004b70 <stdio_uart_init_full>:
|
|
10004b70: b570 push {r4, r5, r6, lr}
|
|
10004b72: 000d movs r5, r1
|
|
10004b74: 001c movs r4, r3
|
|
10004b76: 4b0d ldr r3, [pc, #52] @ (10004bac <stdio_uart_init_full+0x3c>)
|
|
10004b78: 6018 str r0, [r3, #0]
|
|
10004b7a: 2a00 cmp r2, #0
|
|
10004b7c: da0b bge.n 10004b96 <stdio_uart_init_full+0x26>
|
|
10004b7e: 2c00 cmp r4, #0
|
|
10004b80: da0e bge.n 10004ba0 <stdio_uart_init_full+0x30>
|
|
10004b82: 4b0a ldr r3, [pc, #40] @ (10004bac <stdio_uart_init_full+0x3c>)
|
|
10004b84: 6818 ldr r0, [r3, #0]
|
|
10004b86: 0029 movs r1, r5
|
|
10004b88: f7fd f9fa bl 10001f80 <uart_init>
|
|
10004b8c: 4808 ldr r0, [pc, #32] @ (10004bb0 <stdio_uart_init_full+0x40>)
|
|
10004b8e: 2101 movs r1, #1
|
|
10004b90: f7ff feac bl 100048ec <stdio_set_driver_enabled>
|
|
10004b94: bd70 pop {r4, r5, r6, pc}
|
|
10004b96: 2102 movs r1, #2
|
|
10004b98: 0010 movs r0, r2
|
|
10004b9a: f7fb ff3f bl 10000a1c <gpio_set_function>
|
|
10004b9e: e7ee b.n 10004b7e <stdio_uart_init_full+0xe>
|
|
10004ba0: 2102 movs r1, #2
|
|
10004ba2: 0020 movs r0, r4
|
|
10004ba4: f7fb ff3a bl 10000a1c <gpio_set_function>
|
|
10004ba8: e7eb b.n 10004b82 <stdio_uart_init_full+0x12>
|
|
10004baa: 46c0 nop @ (mov r8, r8)
|
|
10004bac: 20000da8 .word 0x20000da8
|
|
10004bb0: 200002d0 .word 0x200002d0
|
|
|
|
10004bb4 <stdio_uart_init>:
|
|
10004bb4: b510 push {r4, lr}
|
|
10004bb6: 4b06 ldr r3, [pc, #24] @ (10004bd0 <stdio_uart_init+0x1c>)
|
|
10004bb8: 781b ldrb r3, [r3, #0]
|
|
10004bba: 4b06 ldr r3, [pc, #24] @ (10004bd4 <stdio_uart_init+0x20>)
|
|
10004bbc: 781b ldrb r3, [r3, #0]
|
|
10004bbe: 21e1 movs r1, #225 @ 0xe1
|
|
10004bc0: 2301 movs r3, #1
|
|
10004bc2: 2200 movs r2, #0
|
|
10004bc4: 0249 lsls r1, r1, #9
|
|
10004bc6: 4804 ldr r0, [pc, #16] @ (10004bd8 <stdio_uart_init+0x24>)
|
|
10004bc8: f7ff ffd2 bl 10004b70 <stdio_uart_init_full>
|
|
10004bcc: bd10 pop {r4, pc}
|
|
10004bce: 46c0 nop @ (mov r8, r8)
|
|
10004bd0: 10006914 .word 0x10006914
|
|
10004bd4: 10006910 .word 0x10006910
|
|
10004bd8: 40034000 .word 0x40034000
|
|
|
|
10004bdc <pio_get_default_sm_config>:
|
|
10004bdc: b510 push {r4, lr}
|
|
10004bde: 0004 movs r4, r0
|
|
10004be0: 2210 movs r2, #16
|
|
10004be2: 2100 movs r1, #0
|
|
10004be4: f7ff fd42 bl 1000466c <__wrap_memset>
|
|
10004be8: 2380 movs r3, #128 @ 0x80
|
|
10004bea: 025b lsls r3, r3, #9
|
|
10004bec: 6023 str r3, [r4, #0]
|
|
10004bee: 23f8 movs r3, #248 @ 0xf8
|
|
10004bf0: 025b lsls r3, r3, #9
|
|
10004bf2: 6063 str r3, [r4, #4]
|
|
10004bf4: 2380 movs r3, #128 @ 0x80
|
|
10004bf6: 02db lsls r3, r3, #11
|
|
10004bf8: 60a3 str r3, [r4, #8]
|
|
10004bfa: 23c0 movs r3, #192 @ 0xc0
|
|
10004bfc: 031b lsls r3, r3, #12
|
|
10004bfe: 60a3 str r3, [r4, #8]
|
|
10004c00: 0020 movs r0, r4
|
|
10004c02: bd10 pop {r4, pc}
|
|
|
|
10004c04 <_pio_can_add_program_at_offset>:
|
|
10004c04: 2305 movs r3, #5
|
|
10004c06: 56cb ldrsb r3, [r1, r3]
|
|
10004c08: 2b00 cmp r3, #0
|
|
10004c0a: db01 blt.n 10004c10 <_pio_can_add_program_at_offset+0xc>
|
|
10004c0c: 4293 cmp r3, r2
|
|
10004c0e: d111 bne.n 10004c34 <_pio_can_add_program_at_offset+0x30>
|
|
10004c10: 4b09 ldr r3, [pc, #36] @ (10004c38 <_pio_can_add_program_at_offset+0x34>)
|
|
10004c12: 469c mov ip, r3
|
|
10004c14: 4460 add r0, ip
|
|
10004c16: 4243 negs r3, r0
|
|
10004c18: 4158 adcs r0, r3
|
|
10004c1a: 4b08 ldr r3, [pc, #32] @ (10004c3c <_pio_can_add_program_at_offset+0x38>)
|
|
10004c1c: 0080 lsls r0, r0, #2
|
|
10004c1e: 58c0 ldr r0, [r0, r3]
|
|
10004c20: 7909 ldrb r1, [r1, #4]
|
|
10004c22: 2301 movs r3, #1
|
|
10004c24: 408b lsls r3, r1
|
|
10004c26: 3b01 subs r3, #1
|
|
10004c28: 4093 lsls r3, r2
|
|
10004c2a: 4018 ands r0, r3
|
|
10004c2c: 4243 negs r3, r0
|
|
10004c2e: 4158 adcs r0, r3
|
|
10004c30: b2c0 uxtb r0, r0
|
|
10004c32: 4770 bx lr
|
|
10004c34: 2000 movs r0, #0
|
|
10004c36: e7fc b.n 10004c32 <_pio_can_add_program_at_offset+0x2e>
|
|
10004c38: afd00000 .word 0xafd00000
|
|
10004c3c: 20000abc .word 0x20000abc
|
|
|
|
10004c40 <_pio_find_offset_for_program>:
|
|
10004c40: b570 push {r4, r5, r6, lr}
|
|
10004c42: 790a ldrb r2, [r1, #4]
|
|
10004c44: 2a20 cmp r2, #32
|
|
10004c46: d819 bhi.n 10004c7c <_pio_find_offset_for_program+0x3c>
|
|
10004c48: 4b17 ldr r3, [pc, #92] @ (10004ca8 <_pio_find_offset_for_program+0x68>)
|
|
10004c4a: 469c mov ip, r3
|
|
10004c4c: 4460 add r0, ip
|
|
10004c4e: 4243 negs r3, r0
|
|
10004c50: 4158 adcs r0, r3
|
|
10004c52: 4b16 ldr r3, [pc, #88] @ (10004cac <_pio_find_offset_for_program+0x6c>)
|
|
10004c54: 0080 lsls r0, r0, #2
|
|
10004c56: 58c4 ldr r4, [r0, r3]
|
|
10004c58: 2301 movs r3, #1
|
|
10004c5a: 4093 lsls r3, r2
|
|
10004c5c: 3b01 subs r3, #1
|
|
10004c5e: 7949 ldrb r1, [r1, #5]
|
|
10004c60: b249 sxtb r1, r1
|
|
10004c62: 2900 cmp r1, #0
|
|
10004c64: db10 blt.n 10004c88 <_pio_find_offset_for_program+0x48>
|
|
10004c66: 0008 movs r0, r1
|
|
10004c68: 2520 movs r5, #32
|
|
10004c6a: 1aaa subs r2, r5, r2
|
|
10004c6c: 4291 cmp r1, r2
|
|
10004c6e: dc18 bgt.n 10004ca2 <_pio_find_offset_for_program+0x62>
|
|
10004c70: 408b lsls r3, r1
|
|
10004c72: 421c tst r4, r3
|
|
10004c74: d001 beq.n 10004c7a <_pio_find_offset_for_program+0x3a>
|
|
10004c76: 2001 movs r0, #1
|
|
10004c78: 4240 negs r0, r0
|
|
10004c7a: bd70 pop {r4, r5, r6, pc}
|
|
10004c7c: 4b0c ldr r3, [pc, #48] @ (10004cb0 <_pio_find_offset_for_program+0x70>)
|
|
10004c7e: 4a0d ldr r2, [pc, #52] @ (10004cb4 <_pio_find_offset_for_program+0x74>)
|
|
10004c80: 480d ldr r0, [pc, #52] @ (10004cb8 <_pio_find_offset_for_program+0x78>)
|
|
10004c82: 2140 movs r1, #64 @ 0x40
|
|
10004c84: f7fd fb98 bl 100023b8 <__assert_func>
|
|
10004c88: 2020 movs r0, #32
|
|
10004c8a: 1a80 subs r0, r0, r2
|
|
10004c8c: 2800 cmp r0, #0
|
|
10004c8e: db05 blt.n 10004c9c <_pio_find_offset_for_program+0x5c>
|
|
10004c90: 001a movs r2, r3
|
|
10004c92: 4082 lsls r2, r0
|
|
10004c94: 4214 tst r4, r2
|
|
10004c96: d0f0 beq.n 10004c7a <_pio_find_offset_for_program+0x3a>
|
|
10004c98: 3801 subs r0, #1
|
|
10004c9a: e7f7 b.n 10004c8c <_pio_find_offset_for_program+0x4c>
|
|
10004c9c: 2001 movs r0, #1
|
|
10004c9e: 4240 negs r0, r0
|
|
10004ca0: e7eb b.n 10004c7a <_pio_find_offset_for_program+0x3a>
|
|
10004ca2: 2001 movs r0, #1
|
|
10004ca4: 4240 negs r0, r0
|
|
10004ca6: e7e8 b.n 10004c7a <_pio_find_offset_for_program+0x3a>
|
|
10004ca8: afd00000 .word 0xafd00000
|
|
10004cac: 20000abc .word 0x20000abc
|
|
10004cb0: 1000682c .word 0x1000682c
|
|
10004cb4: 100068b4 .word 0x100068b4
|
|
10004cb8: 10006858 .word 0x10006858
|
|
|
|
10004cbc <_pio_add_program_at_offset>:
|
|
10004cbc: b570 push {r4, r5, r6, lr}
|
|
10004cbe: 0005 movs r5, r0
|
|
10004cc0: 000c movs r4, r1
|
|
10004cc2: 0016 movs r6, r2
|
|
10004cc4: f7ff ff9e bl 10004c04 <_pio_can_add_program_at_offset>
|
|
10004cc8: 2800 cmp r0, #0
|
|
10004cca: d001 beq.n 10004cd0 <_pio_add_program_at_offset+0x14>
|
|
10004ccc: 2100 movs r1, #0
|
|
10004cce: e008 b.n 10004ce2 <_pio_add_program_at_offset+0x26>
|
|
10004cd0: 4816 ldr r0, [pc, #88] @ (10004d2c <_pio_add_program_at_offset+0x70>)
|
|
10004cd2: f7fd fc09 bl 100024e8 <panic>
|
|
10004cd6: 199a adds r2, r3, r6
|
|
10004cd8: 198b adds r3, r1, r6
|
|
10004cda: 3312 adds r3, #18
|
|
10004cdc: 009b lsls r3, r3, #2
|
|
10004cde: 515a str r2, [r3, r5]
|
|
10004ce0: 3101 adds r1, #1
|
|
10004ce2: 7923 ldrb r3, [r4, #4]
|
|
10004ce4: 428b cmp r3, r1
|
|
10004ce6: d911 bls.n 10004d0c <_pio_add_program_at_offset+0x50>
|
|
10004ce8: 7822 ldrb r2, [r4, #0]
|
|
10004cea: 7863 ldrb r3, [r4, #1]
|
|
10004cec: 021b lsls r3, r3, #8
|
|
10004cee: 4313 orrs r3, r2
|
|
10004cf0: 78a2 ldrb r2, [r4, #2]
|
|
10004cf2: 0412 lsls r2, r2, #16
|
|
10004cf4: 431a orrs r2, r3
|
|
10004cf6: 78e3 ldrb r3, [r4, #3]
|
|
10004cf8: 061b lsls r3, r3, #24
|
|
10004cfa: 4313 orrs r3, r2
|
|
10004cfc: 004a lsls r2, r1, #1
|
|
10004cfe: 5a9b ldrh r3, [r3, r2]
|
|
10004d00: 2280 movs r2, #128 @ 0x80
|
|
10004d02: 0192 lsls r2, r2, #6
|
|
10004d04: 4293 cmp r3, r2
|
|
10004d06: d3e6 bcc.n 10004cd6 <_pio_add_program_at_offset+0x1a>
|
|
10004d08: 001a movs r2, r3
|
|
10004d0a: e7e5 b.n 10004cd8 <_pio_add_program_at_offset+0x1c>
|
|
10004d0c: 2201 movs r2, #1
|
|
10004d0e: 409a lsls r2, r3
|
|
10004d10: 0013 movs r3, r2
|
|
10004d12: 3b01 subs r3, #1
|
|
10004d14: 4a06 ldr r2, [pc, #24] @ (10004d30 <_pio_add_program_at_offset+0x74>)
|
|
10004d16: 4694 mov ip, r2
|
|
10004d18: 4465 add r5, ip
|
|
10004d1a: 426a negs r2, r5
|
|
10004d1c: 4155 adcs r5, r2
|
|
10004d1e: 4905 ldr r1, [pc, #20] @ (10004d34 <_pio_add_program_at_offset+0x78>)
|
|
10004d20: 00ad lsls r5, r5, #2
|
|
10004d22: 586a ldr r2, [r5, r1]
|
|
10004d24: 40b3 lsls r3, r6
|
|
10004d26: 4313 orrs r3, r2
|
|
10004d28: 506b str r3, [r5, r1]
|
|
10004d2a: bd70 pop {r4, r5, r6, pc}
|
|
10004d2c: 100068a0 .word 0x100068a0
|
|
10004d30: afd00000 .word 0xafd00000
|
|
10004d34: 20000abc .word 0x20000abc
|
|
|
|
10004d38 <pio_add_program>:
|
|
10004d38: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10004d3a: 0005 movs r5, r0
|
|
10004d3c: 000e movs r6, r1
|
|
10004d3e: f7fb fe9b bl 10000a78 <hw_claim_lock>
|
|
10004d42: 0007 movs r7, r0
|
|
10004d44: 0031 movs r1, r6
|
|
10004d46: 0028 movs r0, r5
|
|
10004d48: f7ff ff7a bl 10004c40 <_pio_find_offset_for_program>
|
|
10004d4c: 1e04 subs r4, r0, #0
|
|
10004d4e: db09 blt.n 10004d64 <pio_add_program+0x2c>
|
|
10004d50: 0002 movs r2, r0
|
|
10004d52: 0031 movs r1, r6
|
|
10004d54: 0028 movs r0, r5
|
|
10004d56: f7ff ffb1 bl 10004cbc <_pio_add_program_at_offset>
|
|
10004d5a: 0038 movs r0, r7
|
|
10004d5c: f7fb fe98 bl 10000a90 <hw_claim_unlock>
|
|
10004d60: 0020 movs r0, r4
|
|
10004d62: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10004d64: 4801 ldr r0, [pc, #4] @ (10004d6c <pio_add_program+0x34>)
|
|
10004d66: f7fd fbbf bl 100024e8 <panic>
|
|
10004d6a: 46c0 nop @ (mov r8, r8)
|
|
10004d6c: 100068a0 .word 0x100068a0
|
|
|
|
10004d70 <pio_sm_set_consecutive_pindirs>:
|
|
10004d70: b5f0 push {r4, r5, r6, r7, lr}
|
|
10004d72: 46c6 mov lr, r8
|
|
10004d74: b500 push {lr}
|
|
10004d76: ac06 add r4, sp, #24
|
|
10004d78: 7825 ldrb r5, [r4, #0]
|
|
10004d7a: 004c lsls r4, r1, #1
|
|
10004d7c: 1866 adds r6, r4, r1
|
|
10004d7e: 00f6 lsls r6, r6, #3
|
|
10004d80: 1986 adds r6, r0, r6
|
|
10004d82: 0037 movs r7, r6
|
|
10004d84: 37dc adds r7, #220 @ 0xdc
|
|
10004d86: 683f ldr r7, [r7, #0]
|
|
10004d88: 46bc mov ip, r7
|
|
10004d8a: 36cc adds r6, #204 @ 0xcc
|
|
10004d8c: 6836 ldr r6, [r6, #0]
|
|
10004d8e: 46b0 mov r8, r6
|
|
10004d90: 1864 adds r4, r4, r1
|
|
10004d92: 00e4 lsls r4, r4, #3
|
|
10004d94: 34c8 adds r4, #200 @ 0xc8
|
|
10004d96: 1904 adds r4, r0, r4
|
|
10004d98: 3404 adds r4, #4
|
|
10004d9a: 26c0 movs r6, #192 @ 0xc0
|
|
10004d9c: 01b6 lsls r6, r6, #6
|
|
10004d9e: 4334 orrs r4, r6
|
|
10004da0: 2680 movs r6, #128 @ 0x80
|
|
10004da2: 02b6 lsls r6, r6, #10
|
|
10004da4: 6026 str r6, [r4, #0]
|
|
10004da6: 2d00 cmp r5, #0
|
|
10004da8: d001 beq.n 10004dae <pio_sm_set_consecutive_pindirs+0x3e>
|
|
10004daa: 261f movs r6, #31
|
|
10004dac: e014 b.n 10004dd8 <pio_sm_set_consecutive_pindirs+0x68>
|
|
10004dae: 2600 movs r6, #0
|
|
10004db0: e012 b.n 10004dd8 <pio_sm_set_consecutive_pindirs+0x68>
|
|
10004db2: 0154 lsls r4, r2, #5
|
|
10004db4: 25a0 movs r5, #160 @ 0xa0
|
|
10004db6: 056d lsls r5, r5, #21
|
|
10004db8: 4325 orrs r5, r4
|
|
10004dba: 004c lsls r4, r1, #1
|
|
10004dbc: 1864 adds r4, r4, r1
|
|
10004dbe: 00e4 lsls r4, r4, #3
|
|
10004dc0: 1904 adds r4, r0, r4
|
|
10004dc2: 0027 movs r7, r4
|
|
10004dc4: 37dc adds r7, #220 @ 0xdc
|
|
10004dc6: 603d str r5, [r7, #0]
|
|
10004dc8: 4d11 ldr r5, [pc, #68] @ (10004e10 <pio_sm_set_consecutive_pindirs+0xa0>)
|
|
10004dca: 4335 orrs r5, r6
|
|
10004dcc: 34d8 adds r4, #216 @ 0xd8
|
|
10004dce: 6025 str r5, [r4, #0]
|
|
10004dd0: 3b05 subs r3, #5
|
|
10004dd2: 3205 adds r2, #5
|
|
10004dd4: 241f movs r4, #31
|
|
10004dd6: 4022 ands r2, r4
|
|
10004dd8: 2b05 cmp r3, #5
|
|
10004dda: d8ea bhi.n 10004db2 <pio_sm_set_consecutive_pindirs+0x42>
|
|
10004ddc: 069b lsls r3, r3, #26
|
|
10004dde: 0152 lsls r2, r2, #5
|
|
10004de0: 4313 orrs r3, r2
|
|
10004de2: 004c lsls r4, r1, #1
|
|
10004de4: 1862 adds r2, r4, r1
|
|
10004de6: 00d2 lsls r2, r2, #3
|
|
10004de8: 1882 adds r2, r0, r2
|
|
10004dea: 0015 movs r5, r2
|
|
10004dec: 35dc adds r5, #220 @ 0xdc
|
|
10004dee: 602b str r3, [r5, #0]
|
|
10004df0: 4b07 ldr r3, [pc, #28] @ (10004e10 <pio_sm_set_consecutive_pindirs+0xa0>)
|
|
10004df2: 4333 orrs r3, r6
|
|
10004df4: 32d8 adds r2, #216 @ 0xd8
|
|
10004df6: 6013 str r3, [r2, #0]
|
|
10004df8: 4663 mov r3, ip
|
|
10004dfa: 602b str r3, [r5, #0]
|
|
10004dfc: 1864 adds r4, r4, r1
|
|
10004dfe: 00e4 lsls r4, r4, #3
|
|
10004e00: 1900 adds r0, r0, r4
|
|
10004e02: 30cc adds r0, #204 @ 0xcc
|
|
10004e04: 4643 mov r3, r8
|
|
10004e06: 6003 str r3, [r0, #0]
|
|
10004e08: bc80 pop {r7}
|
|
10004e0a: 46b8 mov r8, r7
|
|
10004e0c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10004e0e: 46c0 nop @ (mov r8, r8)
|
|
10004e10: 0000e080 .word 0x0000e080
|
|
|
|
10004e14 <pio_sm_init>:
|
|
10004e14: b570 push {r4, r5, r6, lr}
|
|
10004e16: b084 sub sp, #16
|
|
10004e18: 0004 movs r4, r0
|
|
10004e1a: 000d movs r5, r1
|
|
10004e1c: 0016 movs r6, r2
|
|
10004e1e: 6802 ldr r2, [r0, #0]
|
|
10004e20: 2101 movs r1, #1
|
|
10004e22: 40a9 lsls r1, r5
|
|
10004e24: 438a bics r2, r1
|
|
10004e26: 6002 str r2, [r0, #0]
|
|
10004e28: 2b00 cmp r3, #0
|
|
10004e2a: d034 beq.n 10004e96 <pio_sm_init+0x82>
|
|
10004e2c: 6818 ldr r0, [r3, #0]
|
|
10004e2e: 0069 lsls r1, r5, #1
|
|
10004e30: 1949 adds r1, r1, r5
|
|
10004e32: 00c9 lsls r1, r1, #3
|
|
10004e34: 1861 adds r1, r4, r1
|
|
10004e36: 000a movs r2, r1
|
|
10004e38: 32c8 adds r2, #200 @ 0xc8
|
|
10004e3a: 6010 str r0, [r2, #0]
|
|
10004e3c: 6858 ldr r0, [r3, #4]
|
|
10004e3e: 3204 adds r2, #4
|
|
10004e40: 6010 str r0, [r2, #0]
|
|
10004e42: 6898 ldr r0, [r3, #8]
|
|
10004e44: 3204 adds r2, #4
|
|
10004e46: 6010 str r0, [r2, #0]
|
|
10004e48: 68db ldr r3, [r3, #12]
|
|
10004e4a: 31dc adds r1, #220 @ 0xdc
|
|
10004e4c: 600b str r3, [r1, #0]
|
|
10004e4e: 006a lsls r2, r5, #1
|
|
10004e50: 1953 adds r3, r2, r5
|
|
10004e52: 00db lsls r3, r3, #3
|
|
10004e54: 33d0 adds r3, #208 @ 0xd0
|
|
10004e56: 18e3 adds r3, r4, r3
|
|
10004e58: 2180 movs r1, #128 @ 0x80
|
|
10004e5a: 0149 lsls r1, r1, #5
|
|
10004e5c: 430b orrs r3, r1
|
|
10004e5e: 2180 movs r1, #128 @ 0x80
|
|
10004e60: 0609 lsls r1, r1, #24
|
|
10004e62: 6019 str r1, [r3, #0]
|
|
10004e64: 6019 str r1, [r3, #0]
|
|
10004e66: 4b16 ldr r3, [pc, #88] @ (10004ec0 <pio_sm_init+0xac>)
|
|
10004e68: 40ab lsls r3, r5
|
|
10004e6a: 60a3 str r3, [r4, #8]
|
|
10004e6c: 1d2b adds r3, r5, #4
|
|
10004e6e: 2101 movs r1, #1
|
|
10004e70: 0008 movs r0, r1
|
|
10004e72: 4098 lsls r0, r3
|
|
10004e74: 2380 movs r3, #128 @ 0x80
|
|
10004e76: 019b lsls r3, r3, #6
|
|
10004e78: 4323 orrs r3, r4
|
|
10004e7a: 6018 str r0, [r3, #0]
|
|
10004e7c: 0028 movs r0, r5
|
|
10004e7e: 3008 adds r0, #8
|
|
10004e80: 4081 lsls r1, r0
|
|
10004e82: 6019 str r1, [r3, #0]
|
|
10004e84: 231f movs r3, #31
|
|
10004e86: 4033 ands r3, r6
|
|
10004e88: 1952 adds r2, r2, r5
|
|
10004e8a: 00d2 lsls r2, r2, #3
|
|
10004e8c: 18a4 adds r4, r4, r2
|
|
10004e8e: 34d8 adds r4, #216 @ 0xd8
|
|
10004e90: 6023 str r3, [r4, #0]
|
|
10004e92: b004 add sp, #16
|
|
10004e94: bd70 pop {r4, r5, r6, pc}
|
|
10004e96: 4668 mov r0, sp
|
|
10004e98: f7ff fea0 bl 10004bdc <pio_get_default_sm_config>
|
|
10004e9c: 9900 ldr r1, [sp, #0]
|
|
10004e9e: 006b lsls r3, r5, #1
|
|
10004ea0: 195b adds r3, r3, r5
|
|
10004ea2: 00db lsls r3, r3, #3
|
|
10004ea4: 18e3 adds r3, r4, r3
|
|
10004ea6: 001a movs r2, r3
|
|
10004ea8: 32c8 adds r2, #200 @ 0xc8
|
|
10004eaa: 6011 str r1, [r2, #0]
|
|
10004eac: 9901 ldr r1, [sp, #4]
|
|
10004eae: 3204 adds r2, #4
|
|
10004eb0: 6011 str r1, [r2, #0]
|
|
10004eb2: 9902 ldr r1, [sp, #8]
|
|
10004eb4: 3204 adds r2, #4
|
|
10004eb6: 6011 str r1, [r2, #0]
|
|
10004eb8: 9a03 ldr r2, [sp, #12]
|
|
10004eba: 33dc adds r3, #220 @ 0xdc
|
|
10004ebc: 601a str r2, [r3, #0]
|
|
10004ebe: e7c6 b.n 10004e4e <pio_sm_init+0x3a>
|
|
10004ec0: 01010101 .word 0x01010101
|
|
|
|
10004ec4 <dma_claim_unused_channel>:
|
|
10004ec4: b510 push {r4, lr}
|
|
10004ec6: b082 sub sp, #8
|
|
10004ec8: 0001 movs r1, r0
|
|
10004eca: 4c05 ldr r4, [pc, #20] @ (10004ee0 <dma_claim_unused_channel+0x1c>)
|
|
10004ecc: 4b05 ldr r3, [pc, #20] @ (10004ee4 <dma_claim_unused_channel+0x20>)
|
|
10004ece: 9300 str r3, [sp, #0]
|
|
10004ed0: 230b movs r3, #11
|
|
10004ed2: 2200 movs r2, #0
|
|
10004ed4: 0020 movs r0, r4
|
|
10004ed6: f7fb fdfe bl 10000ad6 <hw_claim_unused_from_range>
|
|
10004eda: b002 add sp, #8
|
|
10004edc: bd10 pop {r4, pc}
|
|
10004ede: 46c0 nop @ (mov r8, r8)
|
|
10004ee0: 20000dac .word 0x20000dac
|
|
10004ee4: 100068d4 .word 0x100068d4
|
|
|
|
10004ee8 <malloc>:
|
|
10004ee8: b510 push {r4, lr}
|
|
10004eea: 4b03 ldr r3, [pc, #12] @ (10004ef8 <malloc+0x10>)
|
|
10004eec: 0001 movs r1, r0
|
|
10004eee: 6818 ldr r0, [r3, #0]
|
|
10004ef0: f000 f80e bl 10004f10 <_malloc_r>
|
|
10004ef4: bd10 pop {r4, pc}
|
|
10004ef6: 46c0 nop @ (mov r8, r8)
|
|
10004ef8: 200006f8 .word 0x200006f8
|
|
|
|
10004efc <free>:
|
|
10004efc: b510 push {r4, lr}
|
|
10004efe: 4b03 ldr r3, [pc, #12] @ (10004f0c <free+0x10>)
|
|
10004f00: 0001 movs r1, r0
|
|
10004f02: 6818 ldr r0, [r3, #0]
|
|
10004f04: f000 fb98 bl 10005638 <_free_r>
|
|
10004f08: bd10 pop {r4, pc}
|
|
10004f0a: 46c0 nop @ (mov r8, r8)
|
|
10004f0c: 200006f8 .word 0x200006f8
|
|
|
|
10004f10 <_malloc_r>:
|
|
10004f10: b5f0 push {r4, r5, r6, r7, lr}
|
|
10004f12: 464e mov r6, r9
|
|
10004f14: 4645 mov r5, r8
|
|
10004f16: 46de mov lr, fp
|
|
10004f18: 4657 mov r7, sl
|
|
10004f1a: b5e0 push {r5, r6, r7, lr}
|
|
10004f1c: 000d movs r5, r1
|
|
10004f1e: 350b adds r5, #11
|
|
10004f20: 0006 movs r6, r0
|
|
10004f22: b085 sub sp, #20
|
|
10004f24: 2d16 cmp r5, #22
|
|
10004f26: d827 bhi.n 10004f78 <_malloc_r+0x68>
|
|
10004f28: 2910 cmp r1, #16
|
|
10004f2a: d900 bls.n 10004f2e <_malloc_r+0x1e>
|
|
10004f2c: e0da b.n 100050e4 <_malloc_r+0x1d4>
|
|
10004f2e: f000 fad1 bl 100054d4 <__malloc_lock>
|
|
10004f32: 2510 movs r5, #16
|
|
10004f34: 2318 movs r3, #24
|
|
10004f36: 2102 movs r1, #2
|
|
10004f38: 4fc7 ldr r7, [pc, #796] @ (10005258 <_malloc_r+0x348>)
|
|
10004f3a: 18fb adds r3, r7, r3
|
|
10004f3c: 001a movs r2, r3
|
|
10004f3e: 685c ldr r4, [r3, #4]
|
|
10004f40: 3a08 subs r2, #8
|
|
10004f42: 4294 cmp r4, r2
|
|
10004f44: d100 bne.n 10004f48 <_malloc_r+0x38>
|
|
10004f46: e146 b.n 100051d6 <_malloc_r+0x2c6>
|
|
10004f48: 2203 movs r2, #3
|
|
10004f4a: 6863 ldr r3, [r4, #4]
|
|
10004f4c: 68a1 ldr r1, [r4, #8]
|
|
10004f4e: 4393 bics r3, r2
|
|
10004f50: 68e2 ldr r2, [r4, #12]
|
|
10004f52: 60ca str r2, [r1, #12]
|
|
10004f54: 6091 str r1, [r2, #8]
|
|
10004f56: 2101 movs r1, #1
|
|
10004f58: 18e3 adds r3, r4, r3
|
|
10004f5a: 685a ldr r2, [r3, #4]
|
|
10004f5c: 0030 movs r0, r6
|
|
10004f5e: 430a orrs r2, r1
|
|
10004f60: 605a str r2, [r3, #4]
|
|
10004f62: f000 fab9 bl 100054d8 <__malloc_unlock>
|
|
10004f66: 0020 movs r0, r4
|
|
10004f68: 3008 adds r0, #8
|
|
10004f6a: b005 add sp, #20
|
|
10004f6c: bcf0 pop {r4, r5, r6, r7}
|
|
10004f6e: 46bb mov fp, r7
|
|
10004f70: 46b2 mov sl, r6
|
|
10004f72: 46a9 mov r9, r5
|
|
10004f74: 46a0 mov r8, r4
|
|
10004f76: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10004f78: 2307 movs r3, #7
|
|
10004f7a: 439d bics r5, r3
|
|
10004f7c: d500 bpl.n 10004f80 <_malloc_r+0x70>
|
|
10004f7e: e0b1 b.n 100050e4 <_malloc_r+0x1d4>
|
|
10004f80: 42a9 cmp r1, r5
|
|
10004f82: d900 bls.n 10004f86 <_malloc_r+0x76>
|
|
10004f84: e0ae b.n 100050e4 <_malloc_r+0x1d4>
|
|
10004f86: f000 faa5 bl 100054d4 <__malloc_lock>
|
|
10004f8a: 23fc movs r3, #252 @ 0xfc
|
|
10004f8c: 005b lsls r3, r3, #1
|
|
10004f8e: 429d cmp r5, r3
|
|
10004f90: d200 bcs.n 10004f94 <_malloc_r+0x84>
|
|
10004f92: e19a b.n 100052ca <_malloc_r+0x3ba>
|
|
10004f94: 0a69 lsrs r1, r5, #9
|
|
10004f96: d100 bne.n 10004f9a <_malloc_r+0x8a>
|
|
10004f98: e0a8 b.n 100050ec <_malloc_r+0x1dc>
|
|
10004f9a: 2904 cmp r1, #4
|
|
10004f9c: d900 bls.n 10004fa0 <_malloc_r+0x90>
|
|
10004f9e: e14f b.n 10005240 <_malloc_r+0x330>
|
|
10004fa0: 2338 movs r3, #56 @ 0x38
|
|
10004fa2: 4698 mov r8, r3
|
|
10004fa4: 09a9 lsrs r1, r5, #6
|
|
10004fa6: 4488 add r8, r1
|
|
10004fa8: 3139 adds r1, #57 @ 0x39
|
|
10004faa: 00cb lsls r3, r1, #3
|
|
10004fac: 2208 movs r2, #8
|
|
10004fae: 4252 negs r2, r2
|
|
10004fb0: 4694 mov ip, r2
|
|
10004fb2: 4fa9 ldr r7, [pc, #676] @ (10005258 <_malloc_r+0x348>)
|
|
10004fb4: 18fb adds r3, r7, r3
|
|
10004fb6: 449c add ip, r3
|
|
10004fb8: 4663 mov r3, ip
|
|
10004fba: 68dc ldr r4, [r3, #12]
|
|
10004fbc: 45a4 cmp ip, r4
|
|
10004fbe: d014 beq.n 10004fea <_malloc_r+0xda>
|
|
10004fc0: 2303 movs r3, #3
|
|
10004fc2: 4699 mov r9, r3
|
|
10004fc4: 000b movs r3, r1
|
|
10004fc6: 4661 mov r1, ip
|
|
10004fc8: 469c mov ip, r3
|
|
10004fca: e007 b.n 10004fdc <_malloc_r+0xcc>
|
|
10004fcc: 68e0 ldr r0, [r4, #12]
|
|
10004fce: 2a00 cmp r2, #0
|
|
10004fd0: db00 blt.n 10004fd4 <_malloc_r+0xc4>
|
|
10004fd2: e0fa b.n 100051ca <_malloc_r+0x2ba>
|
|
10004fd4: 4281 cmp r1, r0
|
|
10004fd6: d100 bne.n 10004fda <_malloc_r+0xca>
|
|
10004fd8: e0fb b.n 100051d2 <_malloc_r+0x2c2>
|
|
10004fda: 0004 movs r4, r0
|
|
10004fdc: 464a mov r2, r9
|
|
10004fde: 6863 ldr r3, [r4, #4]
|
|
10004fe0: 4393 bics r3, r2
|
|
10004fe2: 1b5a subs r2, r3, r5
|
|
10004fe4: 2a0f cmp r2, #15
|
|
10004fe6: ddf1 ble.n 10004fcc <_malloc_r+0xbc>
|
|
10004fe8: 4641 mov r1, r8
|
|
10004fea: 003a movs r2, r7
|
|
10004fec: 693c ldr r4, [r7, #16]
|
|
10004fee: 3208 adds r2, #8
|
|
10004ff0: 4294 cmp r4, r2
|
|
10004ff2: d100 bne.n 10004ff6 <_malloc_r+0xe6>
|
|
10004ff4: e0d8 b.n 100051a8 <_malloc_r+0x298>
|
|
10004ff6: 2003 movs r0, #3
|
|
10004ff8: 6863 ldr r3, [r4, #4]
|
|
10004ffa: 4383 bics r3, r0
|
|
10004ffc: 1b58 subs r0, r3, r5
|
|
10004ffe: 280f cmp r0, #15
|
|
10005000: dd00 ble.n 10005004 <_malloc_r+0xf4>
|
|
10005002: e166 b.n 100052d2 <_malloc_r+0x3c2>
|
|
10005004: 613a str r2, [r7, #16]
|
|
10005006: 617a str r2, [r7, #20]
|
|
10005008: 2800 cmp r0, #0
|
|
1000500a: daa4 bge.n 10004f56 <_malloc_r+0x46>
|
|
1000500c: 687a ldr r2, [r7, #4]
|
|
1000500e: 4690 mov r8, r2
|
|
10005010: 2280 movs r2, #128 @ 0x80
|
|
10005012: 0092 lsls r2, r2, #2
|
|
10005014: 4293 cmp r3, r2
|
|
10005016: d300 bcc.n 1000501a <_malloc_r+0x10a>
|
|
10005018: e0e3 b.n 100051e2 <_malloc_r+0x2d2>
|
|
1000501a: 08da lsrs r2, r3, #3
|
|
1000501c: 0958 lsrs r0, r3, #5
|
|
1000501e: 2301 movs r3, #1
|
|
10005020: 4083 lsls r3, r0
|
|
10005022: 4640 mov r0, r8
|
|
10005024: 4318 orrs r0, r3
|
|
10005026: 4680 mov r8, r0
|
|
10005028: 00d3 lsls r3, r2, #3
|
|
1000502a: 19db adds r3, r3, r7
|
|
1000502c: 689a ldr r2, [r3, #8]
|
|
1000502e: 6078 str r0, [r7, #4]
|
|
10005030: 60e3 str r3, [r4, #12]
|
|
10005032: 60a2 str r2, [r4, #8]
|
|
10005034: 609c str r4, [r3, #8]
|
|
10005036: 60d4 str r4, [r2, #12]
|
|
10005038: 2001 movs r0, #1
|
|
1000503a: 108b asrs r3, r1, #2
|
|
1000503c: 4098 lsls r0, r3
|
|
1000503e: 4540 cmp r0, r8
|
|
10005040: d85c bhi.n 100050fc <_malloc_r+0x1ec>
|
|
10005042: 4643 mov r3, r8
|
|
10005044: 4203 tst r3, r0
|
|
10005046: d10a bne.n 1000505e <_malloc_r+0x14e>
|
|
10005048: 2303 movs r3, #3
|
|
1000504a: 4399 bics r1, r3
|
|
1000504c: 4643 mov r3, r8
|
|
1000504e: 0040 lsls r0, r0, #1
|
|
10005050: 3104 adds r1, #4
|
|
10005052: 4203 tst r3, r0
|
|
10005054: d103 bne.n 1000505e <_malloc_r+0x14e>
|
|
10005056: 0040 lsls r0, r0, #1
|
|
10005058: 3104 adds r1, #4
|
|
1000505a: 4203 tst r3, r0
|
|
1000505c: d0fb beq.n 10005056 <_malloc_r+0x146>
|
|
1000505e: 2303 movs r3, #3
|
|
10005060: 46b3 mov fp, r6
|
|
10005062: 469c mov ip, r3
|
|
10005064: 000e movs r6, r1
|
|
10005066: 46b8 mov r8, r7
|
|
10005068: 9001 str r0, [sp, #4]
|
|
1000506a: 00f0 lsls r0, r6, #3
|
|
1000506c: 4440 add r0, r8
|
|
1000506e: 0001 movs r1, r0
|
|
10005070: 46b2 mov sl, r6
|
|
10005072: 68cb ldr r3, [r1, #12]
|
|
10005074: e00b b.n 1000508e <_malloc_r+0x17e>
|
|
10005076: 4664 mov r4, ip
|
|
10005078: 685a ldr r2, [r3, #4]
|
|
1000507a: 001f movs r7, r3
|
|
1000507c: 43a2 bics r2, r4
|
|
1000507e: 68db ldr r3, [r3, #12]
|
|
10005080: 1b54 subs r4, r2, r5
|
|
10005082: 2c0f cmp r4, #15
|
|
10005084: dd00 ble.n 10005088 <_malloc_r+0x178>
|
|
10005086: e0f3 b.n 10005270 <_malloc_r+0x360>
|
|
10005088: 2c00 cmp r4, #0
|
|
1000508a: db00 blt.n 1000508e <_malloc_r+0x17e>
|
|
1000508c: e10d b.n 100052aa <_malloc_r+0x39a>
|
|
1000508e: 4299 cmp r1, r3
|
|
10005090: d1f1 bne.n 10005076 <_malloc_r+0x166>
|
|
10005092: 2301 movs r3, #1
|
|
10005094: 4699 mov r9, r3
|
|
10005096: 44ca add sl, r9
|
|
10005098: 4653 mov r3, sl
|
|
1000509a: 3108 adds r1, #8
|
|
1000509c: 079b lsls r3, r3, #30
|
|
1000509e: d1e8 bne.n 10005072 <_malloc_r+0x162>
|
|
100050a0: 2203 movs r2, #3
|
|
100050a2: e005 b.n 100050b0 <_malloc_r+0x1a0>
|
|
100050a4: 6803 ldr r3, [r0, #0]
|
|
100050a6: 3808 subs r0, #8
|
|
100050a8: 3e01 subs r6, #1
|
|
100050aa: 4283 cmp r3, r0
|
|
100050ac: d000 beq.n 100050b0 <_malloc_r+0x1a0>
|
|
100050ae: e20a b.n 100054c6 <_malloc_r+0x5b6>
|
|
100050b0: 4232 tst r2, r6
|
|
100050b2: d1f7 bne.n 100050a4 <_malloc_r+0x194>
|
|
100050b4: 4643 mov r3, r8
|
|
100050b6: 9a01 ldr r2, [sp, #4]
|
|
100050b8: 685b ldr r3, [r3, #4]
|
|
100050ba: 4393 bics r3, r2
|
|
100050bc: 4642 mov r2, r8
|
|
100050be: 6053 str r3, [r2, #4]
|
|
100050c0: 9a01 ldr r2, [sp, #4]
|
|
100050c2: 0052 lsls r2, r2, #1
|
|
100050c4: 9201 str r2, [sp, #4]
|
|
100050c6: 429a cmp r2, r3
|
|
100050c8: d816 bhi.n 100050f8 <_malloc_r+0x1e8>
|
|
100050ca: 2a00 cmp r2, #0
|
|
100050cc: d106 bne.n 100050dc <_malloc_r+0x1cc>
|
|
100050ce: e013 b.n 100050f8 <_malloc_r+0x1e8>
|
|
100050d0: 2204 movs r2, #4
|
|
100050d2: 4691 mov r9, r2
|
|
100050d4: 9a01 ldr r2, [sp, #4]
|
|
100050d6: 44ca add sl, r9
|
|
100050d8: 0052 lsls r2, r2, #1
|
|
100050da: 9201 str r2, [sp, #4]
|
|
100050dc: 4213 tst r3, r2
|
|
100050de: d0f7 beq.n 100050d0 <_malloc_r+0x1c0>
|
|
100050e0: 4656 mov r6, sl
|
|
100050e2: e7c2 b.n 1000506a <_malloc_r+0x15a>
|
|
100050e4: 230c movs r3, #12
|
|
100050e6: 2000 movs r0, #0
|
|
100050e8: 6033 str r3, [r6, #0]
|
|
100050ea: e73e b.n 10004f6a <_malloc_r+0x5a>
|
|
100050ec: 2380 movs r3, #128 @ 0x80
|
|
100050ee: 223f movs r2, #63 @ 0x3f
|
|
100050f0: 2140 movs r1, #64 @ 0x40
|
|
100050f2: 4690 mov r8, r2
|
|
100050f4: 009b lsls r3, r3, #2
|
|
100050f6: e759 b.n 10004fac <_malloc_r+0x9c>
|
|
100050f8: 465e mov r6, fp
|
|
100050fa: 4647 mov r7, r8
|
|
100050fc: 2203 movs r2, #3
|
|
100050fe: 68bc ldr r4, [r7, #8]
|
|
10005100: 6863 ldr r3, [r4, #4]
|
|
10005102: 4393 bics r3, r2
|
|
10005104: 4699 mov r9, r3
|
|
10005106: 42ab cmp r3, r5
|
|
10005108: d302 bcc.n 10005110 <_malloc_r+0x200>
|
|
1000510a: 1b5b subs r3, r3, r5
|
|
1000510c: 2b0f cmp r3, #15
|
|
1000510e: dc4e bgt.n 100051ae <_malloc_r+0x29e>
|
|
10005110: 0023 movs r3, r4
|
|
10005112: 444b add r3, r9
|
|
10005114: 9302 str r3, [sp, #8]
|
|
10005116: 4b51 ldr r3, [pc, #324] @ (1000525c <_malloc_r+0x34c>)
|
|
10005118: 2008 movs r0, #8
|
|
1000511a: 681b ldr r3, [r3, #0]
|
|
1000511c: 3310 adds r3, #16
|
|
1000511e: 195b adds r3, r3, r5
|
|
10005120: 9301 str r3, [sp, #4]
|
|
10005122: f000 f9f3 bl 1000550c <sysconf>
|
|
10005126: 494e ldr r1, [pc, #312] @ (10005260 <_malloc_r+0x350>)
|
|
10005128: 9003 str r0, [sp, #12]
|
|
1000512a: 680b ldr r3, [r1, #0]
|
|
1000512c: 468b mov fp, r1
|
|
1000512e: 3301 adds r3, #1
|
|
10005130: d006 beq.n 10005140 <_malloc_r+0x230>
|
|
10005132: 4684 mov ip, r0
|
|
10005134: 9b01 ldr r3, [sp, #4]
|
|
10005136: 4242 negs r2, r0
|
|
10005138: 3b01 subs r3, #1
|
|
1000513a: 4463 add r3, ip
|
|
1000513c: 4013 ands r3, r2
|
|
1000513e: 9301 str r3, [sp, #4]
|
|
10005140: 0030 movs r0, r6
|
|
10005142: 9901 ldr r1, [sp, #4]
|
|
10005144: f000 f9ca bl 100054dc <_sbrk_r>
|
|
10005148: 0003 movs r3, r0
|
|
1000514a: 4680 mov r8, r0
|
|
1000514c: 3301 adds r3, #1
|
|
1000514e: d100 bne.n 10005152 <_malloc_r+0x242>
|
|
10005150: e0dd b.n 1000530e <_malloc_r+0x3fe>
|
|
10005152: 9b02 ldr r3, [sp, #8]
|
|
10005154: 4283 cmp r3, r0
|
|
10005156: d900 bls.n 1000515a <_malloc_r+0x24a>
|
|
10005158: e0d7 b.n 1000530a <_malloc_r+0x3fa>
|
|
1000515a: 9a01 ldr r2, [sp, #4]
|
|
1000515c: 4b41 ldr r3, [pc, #260] @ (10005264 <_malloc_r+0x354>)
|
|
1000515e: 4694 mov ip, r2
|
|
10005160: 6819 ldr r1, [r3, #0]
|
|
10005162: 469a mov sl, r3
|
|
10005164: 4461 add r1, ip
|
|
10005166: 9a03 ldr r2, [sp, #12]
|
|
10005168: 6019 str r1, [r3, #0]
|
|
1000516a: 9b02 ldr r3, [sp, #8]
|
|
1000516c: 0008 movs r0, r1
|
|
1000516e: 3a01 subs r2, #1
|
|
10005170: 4543 cmp r3, r8
|
|
10005172: d000 beq.n 10005176 <_malloc_r+0x266>
|
|
10005174: e0ea b.n 1000534c <_malloc_r+0x43c>
|
|
10005176: 4643 mov r3, r8
|
|
10005178: 4213 tst r3, r2
|
|
1000517a: d000 beq.n 1000517e <_malloc_r+0x26e>
|
|
1000517c: e0e6 b.n 1000534c <_malloc_r+0x43c>
|
|
1000517e: 68bb ldr r3, [r7, #8]
|
|
10005180: 4698 mov r8, r3
|
|
10005182: 4663 mov r3, ip
|
|
10005184: 444b add r3, r9
|
|
10005186: 001a movs r2, r3
|
|
10005188: 2301 movs r3, #1
|
|
1000518a: 431a orrs r2, r3
|
|
1000518c: 4643 mov r3, r8
|
|
1000518e: 605a str r2, [r3, #4]
|
|
10005190: 4b35 ldr r3, [pc, #212] @ (10005268 <_malloc_r+0x358>)
|
|
10005192: 6818 ldr r0, [r3, #0]
|
|
10005194: 4288 cmp r0, r1
|
|
10005196: d200 bcs.n 1000519a <_malloc_r+0x28a>
|
|
10005198: 6019 str r1, [r3, #0]
|
|
1000519a: 4b34 ldr r3, [pc, #208] @ (1000526c <_malloc_r+0x35c>)
|
|
1000519c: 6818 ldr r0, [r3, #0]
|
|
1000519e: 4288 cmp r0, r1
|
|
100051a0: d200 bcs.n 100051a4 <_malloc_r+0x294>
|
|
100051a2: 6019 str r1, [r3, #0]
|
|
100051a4: 4644 mov r4, r8
|
|
100051a6: e0b4 b.n 10005312 <_malloc_r+0x402>
|
|
100051a8: 687b ldr r3, [r7, #4]
|
|
100051aa: 4698 mov r8, r3
|
|
100051ac: e744 b.n 10005038 <_malloc_r+0x128>
|
|
100051ae: 2201 movs r2, #1
|
|
100051b0: 0029 movs r1, r5
|
|
100051b2: 4313 orrs r3, r2
|
|
100051b4: 4311 orrs r1, r2
|
|
100051b6: 1965 adds r5, r4, r5
|
|
100051b8: 6061 str r1, [r4, #4]
|
|
100051ba: 0030 movs r0, r6
|
|
100051bc: 60bd str r5, [r7, #8]
|
|
100051be: 606b str r3, [r5, #4]
|
|
100051c0: f000 f98a bl 100054d8 <__malloc_unlock>
|
|
100051c4: 0020 movs r0, r4
|
|
100051c6: 3008 adds r0, #8
|
|
100051c8: e6cf b.n 10004f6a <_malloc_r+0x5a>
|
|
100051ca: 68a2 ldr r2, [r4, #8]
|
|
100051cc: 60d0 str r0, [r2, #12]
|
|
100051ce: 6082 str r2, [r0, #8]
|
|
100051d0: e6c1 b.n 10004f56 <_malloc_r+0x46>
|
|
100051d2: 4661 mov r1, ip
|
|
100051d4: e709 b.n 10004fea <_malloc_r+0xda>
|
|
100051d6: 68dc ldr r4, [r3, #12]
|
|
100051d8: 3102 adds r1, #2
|
|
100051da: 42a3 cmp r3, r4
|
|
100051dc: d100 bne.n 100051e0 <_malloc_r+0x2d0>
|
|
100051de: e704 b.n 10004fea <_malloc_r+0xda>
|
|
100051e0: e6b2 b.n 10004f48 <_malloc_r+0x38>
|
|
100051e2: 0a5a lsrs r2, r3, #9
|
|
100051e4: 2a04 cmp r2, #4
|
|
100051e6: d800 bhi.n 100051ea <_malloc_r+0x2da>
|
|
100051e8: e088 b.n 100052fc <_malloc_r+0x3ec>
|
|
100051ea: 2a14 cmp r2, #20
|
|
100051ec: d900 bls.n 100051f0 <_malloc_r+0x2e0>
|
|
100051ee: e10f b.n 10005410 <_malloc_r+0x500>
|
|
100051f0: 0010 movs r0, r2
|
|
100051f2: 305b adds r0, #91 @ 0x5b
|
|
100051f4: 4682 mov sl, r0
|
|
100051f6: 325c adds r2, #92 @ 0x5c
|
|
100051f8: 00d2 lsls r2, r2, #3
|
|
100051fa: 2008 movs r0, #8
|
|
100051fc: 4240 negs r0, r0
|
|
100051fe: 4684 mov ip, r0
|
|
10005200: 18ba adds r2, r7, r2
|
|
10005202: 4494 add ip, r2
|
|
10005204: 4662 mov r2, ip
|
|
10005206: 6892 ldr r2, [r2, #8]
|
|
10005208: 300b adds r0, #11
|
|
1000520a: 4681 mov r9, r0
|
|
1000520c: 4594 cmp ip, r2
|
|
1000520e: d100 bne.n 10005212 <_malloc_r+0x302>
|
|
10005210: e0e5 b.n 100053de <_malloc_r+0x4ce>
|
|
10005212: 0008 movs r0, r1
|
|
10005214: 46a2 mov sl, r4
|
|
10005216: 4661 mov r1, ip
|
|
10005218: 4684 mov ip, r0
|
|
1000521a: e002 b.n 10005222 <_malloc_r+0x312>
|
|
1000521c: 6892 ldr r2, [r2, #8]
|
|
1000521e: 4291 cmp r1, r2
|
|
10005220: d004 beq.n 1000522c <_malloc_r+0x31c>
|
|
10005222: 464c mov r4, r9
|
|
10005224: 6850 ldr r0, [r2, #4]
|
|
10005226: 43a0 bics r0, r4
|
|
10005228: 4298 cmp r0, r3
|
|
1000522a: d8f7 bhi.n 1000521c <_malloc_r+0x30c>
|
|
1000522c: 68d3 ldr r3, [r2, #12]
|
|
1000522e: 4661 mov r1, ip
|
|
10005230: 4654 mov r4, sl
|
|
10005232: 469c mov ip, r3
|
|
10005234: 4663 mov r3, ip
|
|
10005236: 60a2 str r2, [r4, #8]
|
|
10005238: 60e3 str r3, [r4, #12]
|
|
1000523a: 609c str r4, [r3, #8]
|
|
1000523c: 60d4 str r4, [r2, #12]
|
|
1000523e: e6fb b.n 10005038 <_malloc_r+0x128>
|
|
10005240: 2914 cmp r1, #20
|
|
10005242: d973 bls.n 1000532c <_malloc_r+0x41c>
|
|
10005244: 2954 cmp r1, #84 @ 0x54
|
|
10005246: d900 bls.n 1000524a <_malloc_r+0x33a>
|
|
10005248: e0eb b.n 10005422 <_malloc_r+0x512>
|
|
1000524a: 236e movs r3, #110 @ 0x6e
|
|
1000524c: 4698 mov r8, r3
|
|
1000524e: 0b29 lsrs r1, r5, #12
|
|
10005250: 4488 add r8, r1
|
|
10005252: 316f adds r1, #111 @ 0x6f
|
|
10005254: 00cb lsls r3, r1, #3
|
|
10005256: e6a9 b.n 10004fac <_malloc_r+0x9c>
|
|
10005258: 200002f0 .word 0x200002f0
|
|
1000525c: 2000098c .word 0x2000098c
|
|
10005260: 200002e8 .word 0x200002e8
|
|
10005264: 2000095c .word 0x2000095c
|
|
10005268: 20000984 .word 0x20000984
|
|
1000526c: 20000988 .word 0x20000988
|
|
10005270: 46ba mov sl, r7
|
|
10005272: 2001 movs r0, #1
|
|
10005274: 4651 mov r1, sl
|
|
10005276: 4684 mov ip, r0
|
|
10005278: 1949 adds r1, r1, r5
|
|
1000527a: 4305 orrs r5, r0
|
|
1000527c: 4650 mov r0, sl
|
|
1000527e: 6045 str r5, [r0, #4]
|
|
10005280: 6885 ldr r5, [r0, #8]
|
|
10005282: 4647 mov r7, r8
|
|
10005284: 4660 mov r0, ip
|
|
10005286: 60eb str r3, [r5, #12]
|
|
10005288: 465e mov r6, fp
|
|
1000528a: 609d str r5, [r3, #8]
|
|
1000528c: 4653 mov r3, sl
|
|
1000528e: 6139 str r1, [r7, #16]
|
|
10005290: 6179 str r1, [r7, #20]
|
|
10005292: 4320 orrs r0, r4
|
|
10005294: 3708 adds r7, #8
|
|
10005296: 6048 str r0, [r1, #4]
|
|
10005298: 60cf str r7, [r1, #12]
|
|
1000529a: 0030 movs r0, r6
|
|
1000529c: 608f str r7, [r1, #8]
|
|
1000529e: 509c str r4, [r3, r2]
|
|
100052a0: f000 f91a bl 100054d8 <__malloc_unlock>
|
|
100052a4: 4650 mov r0, sl
|
|
100052a6: 3008 adds r0, #8
|
|
100052a8: e65f b.n 10004f6a <_malloc_r+0x5a>
|
|
100052aa: 46ba mov sl, r7
|
|
100052ac: 2001 movs r0, #1
|
|
100052ae: 465e mov r6, fp
|
|
100052b0: 4452 add r2, sl
|
|
100052b2: 6851 ldr r1, [r2, #4]
|
|
100052b4: 4301 orrs r1, r0
|
|
100052b6: 6051 str r1, [r2, #4]
|
|
100052b8: 68ba ldr r2, [r7, #8]
|
|
100052ba: 0030 movs r0, r6
|
|
100052bc: 60d3 str r3, [r2, #12]
|
|
100052be: 609a str r2, [r3, #8]
|
|
100052c0: f000 f90a bl 100054d8 <__malloc_unlock>
|
|
100052c4: 0038 movs r0, r7
|
|
100052c6: 3008 adds r0, #8
|
|
100052c8: e64f b.n 10004f6a <_malloc_r+0x5a>
|
|
100052ca: 002b movs r3, r5
|
|
100052cc: 08e9 lsrs r1, r5, #3
|
|
100052ce: 3308 adds r3, #8
|
|
100052d0: e632 b.n 10004f38 <_malloc_r+0x28>
|
|
100052d2: 1961 adds r1, r4, r5
|
|
100052d4: 4688 mov r8, r1
|
|
100052d6: 2101 movs r1, #1
|
|
100052d8: 468c mov ip, r1
|
|
100052da: 430d orrs r5, r1
|
|
100052dc: 4641 mov r1, r8
|
|
100052de: 6065 str r5, [r4, #4]
|
|
100052e0: 6139 str r1, [r7, #16]
|
|
100052e2: 6179 str r1, [r7, #20]
|
|
100052e4: 60ca str r2, [r1, #12]
|
|
100052e6: 608a str r2, [r1, #8]
|
|
100052e8: 4662 mov r2, ip
|
|
100052ea: 4302 orrs r2, r0
|
|
100052ec: 604a str r2, [r1, #4]
|
|
100052ee: 50e0 str r0, [r4, r3]
|
|
100052f0: 0030 movs r0, r6
|
|
100052f2: f000 f8f1 bl 100054d8 <__malloc_unlock>
|
|
100052f6: 0020 movs r0, r4
|
|
100052f8: 3008 adds r0, #8
|
|
100052fa: e636 b.n 10004f6a <_malloc_r+0x5a>
|
|
100052fc: 099a lsrs r2, r3, #6
|
|
100052fe: 0010 movs r0, r2
|
|
10005300: 3239 adds r2, #57 @ 0x39
|
|
10005302: 3038 adds r0, #56 @ 0x38
|
|
10005304: 4682 mov sl, r0
|
|
10005306: 00d2 lsls r2, r2, #3
|
|
10005308: e777 b.n 100051fa <_malloc_r+0x2ea>
|
|
1000530a: 42bc cmp r4, r7
|
|
1000530c: d014 beq.n 10005338 <_malloc_r+0x428>
|
|
1000530e: 68bc ldr r4, [r7, #8]
|
|
10005310: 6862 ldr r2, [r4, #4]
|
|
10005312: 2303 movs r3, #3
|
|
10005314: 439a bics r2, r3
|
|
10005316: 1b53 subs r3, r2, r5
|
|
10005318: 42aa cmp r2, r5
|
|
1000531a: d302 bcc.n 10005322 <_malloc_r+0x412>
|
|
1000531c: 2b0f cmp r3, #15
|
|
1000531e: dd00 ble.n 10005322 <_malloc_r+0x412>
|
|
10005320: e745 b.n 100051ae <_malloc_r+0x29e>
|
|
10005322: 0030 movs r0, r6
|
|
10005324: f000 f8d8 bl 100054d8 <__malloc_unlock>
|
|
10005328: 2000 movs r0, #0
|
|
1000532a: e61e b.n 10004f6a <_malloc_r+0x5a>
|
|
1000532c: 235b movs r3, #91 @ 0x5b
|
|
1000532e: 4698 mov r8, r3
|
|
10005330: 4488 add r8, r1
|
|
10005332: 315c adds r1, #92 @ 0x5c
|
|
10005334: 00cb lsls r3, r1, #3
|
|
10005336: e639 b.n 10004fac <_malloc_r+0x9c>
|
|
10005338: 4b64 ldr r3, [pc, #400] @ (100054cc <_malloc_r+0x5bc>)
|
|
1000533a: 469a mov sl, r3
|
|
1000533c: 6818 ldr r0, [r3, #0]
|
|
1000533e: 9b01 ldr r3, [sp, #4]
|
|
10005340: 469c mov ip, r3
|
|
10005342: 4653 mov r3, sl
|
|
10005344: 4460 add r0, ip
|
|
10005346: 6018 str r0, [r3, #0]
|
|
10005348: 9b03 ldr r3, [sp, #12]
|
|
1000534a: 1e5a subs r2, r3, #1
|
|
1000534c: 465b mov r3, fp
|
|
1000534e: 681b ldr r3, [r3, #0]
|
|
10005350: 3301 adds r3, #1
|
|
10005352: d071 beq.n 10005438 <_malloc_r+0x528>
|
|
10005354: 4643 mov r3, r8
|
|
10005356: 9902 ldr r1, [sp, #8]
|
|
10005358: 1a5b subs r3, r3, r1
|
|
1000535a: 4651 mov r1, sl
|
|
1000535c: 181b adds r3, r3, r0
|
|
1000535e: 600b str r3, [r1, #0]
|
|
10005360: 2307 movs r3, #7
|
|
10005362: 4641 mov r1, r8
|
|
10005364: 4640 mov r0, r8
|
|
10005366: 4019 ands r1, r3
|
|
10005368: 9102 str r1, [sp, #8]
|
|
1000536a: 4218 tst r0, r3
|
|
1000536c: d040 beq.n 100053f0 <_malloc_r+0x4e0>
|
|
1000536e: 9803 ldr r0, [sp, #12]
|
|
10005370: 3301 adds r3, #1
|
|
10005372: 4684 mov ip, r0
|
|
10005374: 1a5b subs r3, r3, r1
|
|
10005376: 9901 ldr r1, [sp, #4]
|
|
10005378: 4498 add r8, r3
|
|
1000537a: 4441 add r1, r8
|
|
1000537c: 9101 str r1, [sp, #4]
|
|
1000537e: 4463 add r3, ip
|
|
10005380: 4011 ands r1, r2
|
|
10005382: 1a5b subs r3, r3, r1
|
|
10005384: 401a ands r2, r3
|
|
10005386: 0011 movs r1, r2
|
|
10005388: 0030 movs r0, r6
|
|
1000538a: 4693 mov fp, r2
|
|
1000538c: f000 f8a6 bl 100054dc <_sbrk_r>
|
|
10005390: 1c43 adds r3, r0, #1
|
|
10005392: d078 beq.n 10005486 <_malloc_r+0x576>
|
|
10005394: 4643 mov r3, r8
|
|
10005396: 1ac0 subs r0, r0, r3
|
|
10005398: 0003 movs r3, r0
|
|
1000539a: 445b add r3, fp
|
|
1000539c: 9301 str r3, [sp, #4]
|
|
1000539e: 4653 mov r3, sl
|
|
100053a0: 6819 ldr r1, [r3, #0]
|
|
100053a2: 2001 movs r0, #1
|
|
100053a4: 4459 add r1, fp
|
|
100053a6: 6019 str r1, [r3, #0]
|
|
100053a8: 4643 mov r3, r8
|
|
100053aa: 9a01 ldr r2, [sp, #4]
|
|
100053ac: 60bb str r3, [r7, #8]
|
|
100053ae: 4302 orrs r2, r0
|
|
100053b0: 605a str r2, [r3, #4]
|
|
100053b2: 42bc cmp r4, r7
|
|
100053b4: d100 bne.n 100053b8 <_malloc_r+0x4a8>
|
|
100053b6: e6eb b.n 10005190 <_malloc_r+0x280>
|
|
100053b8: 464b mov r3, r9
|
|
100053ba: 2b0f cmp r3, #15
|
|
100053bc: d940 bls.n 10005440 <_malloc_r+0x530>
|
|
100053be: 2207 movs r2, #7
|
|
100053c0: 3b0c subs r3, #12
|
|
100053c2: 4393 bics r3, r2
|
|
100053c4: 6862 ldr r2, [r4, #4]
|
|
100053c6: 4002 ands r2, r0
|
|
100053c8: 2005 movs r0, #5
|
|
100053ca: 431a orrs r2, r3
|
|
100053cc: 6062 str r2, [r4, #4]
|
|
100053ce: 18e2 adds r2, r4, r3
|
|
100053d0: 6050 str r0, [r2, #4]
|
|
100053d2: 6090 str r0, [r2, #8]
|
|
100053d4: 2b0f cmp r3, #15
|
|
100053d6: d84b bhi.n 10005470 <_malloc_r+0x560>
|
|
100053d8: 4643 mov r3, r8
|
|
100053da: 685a ldr r2, [r3, #4]
|
|
100053dc: e6d8 b.n 10005190 <_malloc_r+0x280>
|
|
100053de: 4653 mov r3, sl
|
|
100053e0: 1098 asrs r0, r3, #2
|
|
100053e2: 2301 movs r3, #1
|
|
100053e4: 4083 lsls r3, r0
|
|
100053e6: 4640 mov r0, r8
|
|
100053e8: 4318 orrs r0, r3
|
|
100053ea: 4680 mov r8, r0
|
|
100053ec: 6078 str r0, [r7, #4]
|
|
100053ee: e721 b.n 10005234 <_malloc_r+0x324>
|
|
100053f0: 9b01 ldr r3, [sp, #4]
|
|
100053f2: 9903 ldr r1, [sp, #12]
|
|
100053f4: 4443 add r3, r8
|
|
100053f6: 4013 ands r3, r2
|
|
100053f8: 1acb subs r3, r1, r3
|
|
100053fa: 401a ands r2, r3
|
|
100053fc: 0011 movs r1, r2
|
|
100053fe: 0030 movs r0, r6
|
|
10005400: 4693 mov fp, r2
|
|
10005402: f000 f86b bl 100054dc <_sbrk_r>
|
|
10005406: 1c43 adds r3, r0, #1
|
|
10005408: d1c4 bne.n 10005394 <_malloc_r+0x484>
|
|
1000540a: 2300 movs r3, #0
|
|
1000540c: 469b mov fp, r3
|
|
1000540e: e7c6 b.n 1000539e <_malloc_r+0x48e>
|
|
10005410: 2a54 cmp r2, #84 @ 0x54
|
|
10005412: d818 bhi.n 10005446 <_malloc_r+0x536>
|
|
10005414: 0b1a lsrs r2, r3, #12
|
|
10005416: 0010 movs r0, r2
|
|
10005418: 326f adds r2, #111 @ 0x6f
|
|
1000541a: 306e adds r0, #110 @ 0x6e
|
|
1000541c: 4682 mov sl, r0
|
|
1000541e: 00d2 lsls r2, r2, #3
|
|
10005420: e6eb b.n 100051fa <_malloc_r+0x2ea>
|
|
10005422: 23aa movs r3, #170 @ 0xaa
|
|
10005424: 005b lsls r3, r3, #1
|
|
10005426: 4299 cmp r1, r3
|
|
10005428: d818 bhi.n 1000545c <_malloc_r+0x54c>
|
|
1000542a: 3bdd subs r3, #221 @ 0xdd
|
|
1000542c: 4698 mov r8, r3
|
|
1000542e: 0be9 lsrs r1, r5, #15
|
|
10005430: 4488 add r8, r1
|
|
10005432: 3178 adds r1, #120 @ 0x78
|
|
10005434: 00cb lsls r3, r1, #3
|
|
10005436: e5b9 b.n 10004fac <_malloc_r+0x9c>
|
|
10005438: 465b mov r3, fp
|
|
1000543a: 4641 mov r1, r8
|
|
1000543c: 6019 str r1, [r3, #0]
|
|
1000543e: e78f b.n 10005360 <_malloc_r+0x450>
|
|
10005440: 4643 mov r3, r8
|
|
10005442: 6058 str r0, [r3, #4]
|
|
10005444: e76d b.n 10005322 <_malloc_r+0x412>
|
|
10005446: 20aa movs r0, #170 @ 0xaa
|
|
10005448: 0040 lsls r0, r0, #1
|
|
1000544a: 4282 cmp r2, r0
|
|
1000544c: d826 bhi.n 1000549c <_malloc_r+0x58c>
|
|
1000544e: 0bda lsrs r2, r3, #15
|
|
10005450: 0010 movs r0, r2
|
|
10005452: 3278 adds r2, #120 @ 0x78
|
|
10005454: 3077 adds r0, #119 @ 0x77
|
|
10005456: 4682 mov sl, r0
|
|
10005458: 00d2 lsls r2, r2, #3
|
|
1000545a: e6ce b.n 100051fa <_malloc_r+0x2ea>
|
|
1000545c: 4b1c ldr r3, [pc, #112] @ (100054d0 <_malloc_r+0x5c0>)
|
|
1000545e: 4299 cmp r1, r3
|
|
10005460: d826 bhi.n 100054b0 <_malloc_r+0x5a0>
|
|
10005462: 237c movs r3, #124 @ 0x7c
|
|
10005464: 4698 mov r8, r3
|
|
10005466: 0ca9 lsrs r1, r5, #18
|
|
10005468: 4488 add r8, r1
|
|
1000546a: 317d adds r1, #125 @ 0x7d
|
|
1000546c: 00cb lsls r3, r1, #3
|
|
1000546e: e59d b.n 10004fac <_malloc_r+0x9c>
|
|
10005470: 0021 movs r1, r4
|
|
10005472: 0030 movs r0, r6
|
|
10005474: 3108 adds r1, #8
|
|
10005476: f000 f8df bl 10005638 <_free_r>
|
|
1000547a: 4653 mov r3, sl
|
|
1000547c: 6819 ldr r1, [r3, #0]
|
|
1000547e: 68bb ldr r3, [r7, #8]
|
|
10005480: 4698 mov r8, r3
|
|
10005482: 685a ldr r2, [r3, #4]
|
|
10005484: e684 b.n 10005190 <_malloc_r+0x280>
|
|
10005486: 9a01 ldr r2, [sp, #4]
|
|
10005488: 9b02 ldr r3, [sp, #8]
|
|
1000548a: 4694 mov ip, r2
|
|
1000548c: 4642 mov r2, r8
|
|
1000548e: 3b08 subs r3, #8
|
|
10005490: 4463 add r3, ip
|
|
10005492: 1a9b subs r3, r3, r2
|
|
10005494: 9301 str r3, [sp, #4]
|
|
10005496: 2300 movs r3, #0
|
|
10005498: 469b mov fp, r3
|
|
1000549a: e780 b.n 1000539e <_malloc_r+0x48e>
|
|
1000549c: 480c ldr r0, [pc, #48] @ (100054d0 <_malloc_r+0x5c0>)
|
|
1000549e: 4282 cmp r2, r0
|
|
100054a0: d80c bhi.n 100054bc <_malloc_r+0x5ac>
|
|
100054a2: 0c9a lsrs r2, r3, #18
|
|
100054a4: 0010 movs r0, r2
|
|
100054a6: 327d adds r2, #125 @ 0x7d
|
|
100054a8: 307c adds r0, #124 @ 0x7c
|
|
100054aa: 4682 mov sl, r0
|
|
100054ac: 00d2 lsls r2, r2, #3
|
|
100054ae: e6a4 b.n 100051fa <_malloc_r+0x2ea>
|
|
100054b0: 23fe movs r3, #254 @ 0xfe
|
|
100054b2: 227e movs r2, #126 @ 0x7e
|
|
100054b4: 217f movs r1, #127 @ 0x7f
|
|
100054b6: 4690 mov r8, r2
|
|
100054b8: 009b lsls r3, r3, #2
|
|
100054ba: e577 b.n 10004fac <_malloc_r+0x9c>
|
|
100054bc: 22fe movs r2, #254 @ 0xfe
|
|
100054be: 207e movs r0, #126 @ 0x7e
|
|
100054c0: 0092 lsls r2, r2, #2
|
|
100054c2: 4682 mov sl, r0
|
|
100054c4: e699 b.n 100051fa <_malloc_r+0x2ea>
|
|
100054c6: 4643 mov r3, r8
|
|
100054c8: 685b ldr r3, [r3, #4]
|
|
100054ca: e5f9 b.n 100050c0 <_malloc_r+0x1b0>
|
|
100054cc: 2000095c .word 0x2000095c
|
|
100054d0: 00000554 .word 0x00000554
|
|
|
|
100054d4 <__malloc_lock>:
|
|
100054d4: 4770 bx lr
|
|
100054d6: 46c0 nop @ (mov r8, r8)
|
|
|
|
100054d8 <__malloc_unlock>:
|
|
100054d8: 4770 bx lr
|
|
100054da: 46c0 nop @ (mov r8, r8)
|
|
|
|
100054dc <_sbrk_r>:
|
|
100054dc: 2300 movs r3, #0
|
|
100054de: b570 push {r4, r5, r6, lr}
|
|
100054e0: 4c06 ldr r4, [pc, #24] @ (100054fc <_sbrk_r+0x20>)
|
|
100054e2: 0005 movs r5, r0
|
|
100054e4: 0008 movs r0, r1
|
|
100054e6: 6023 str r3, [r4, #0]
|
|
100054e8: f7fc ff46 bl 10002378 <_sbrk>
|
|
100054ec: 1c43 adds r3, r0, #1
|
|
100054ee: d000 beq.n 100054f2 <_sbrk_r+0x16>
|
|
100054f0: bd70 pop {r4, r5, r6, pc}
|
|
100054f2: 6823 ldr r3, [r4, #0]
|
|
100054f4: 2b00 cmp r3, #0
|
|
100054f6: d0fb beq.n 100054f0 <_sbrk_r+0x14>
|
|
100054f8: 602b str r3, [r5, #0]
|
|
100054fa: e7f9 b.n 100054f0 <_sbrk_r+0x14>
|
|
100054fc: 20000b4c .word 0x20000b4c
|
|
|
|
10005500 <__errno>:
|
|
10005500: 4b01 ldr r3, [pc, #4] @ (10005508 <__errno+0x8>)
|
|
10005502: 6818 ldr r0, [r3, #0]
|
|
10005504: 4770 bx lr
|
|
10005506: 46c0 nop @ (mov r8, r8)
|
|
10005508: 200006f8 .word 0x200006f8
|
|
|
|
1000550c <sysconf>:
|
|
1000550c: 2380 movs r3, #128 @ 0x80
|
|
1000550e: b510 push {r4, lr}
|
|
10005510: 015b lsls r3, r3, #5
|
|
10005512: 2808 cmp r0, #8
|
|
10005514: d101 bne.n 1000551a <sysconf+0xe>
|
|
10005516: 0018 movs r0, r3
|
|
10005518: bd10 pop {r4, pc}
|
|
1000551a: f7ff fff1 bl 10005500 <__errno>
|
|
1000551e: 2316 movs r3, #22
|
|
10005520: 6003 str r3, [r0, #0]
|
|
10005522: 3b17 subs r3, #23
|
|
10005524: e7f7 b.n 10005516 <sysconf+0xa>
|
|
10005526: 46c0 nop @ (mov r8, r8)
|
|
|
|
10005528 <strlen>:
|
|
10005528: b510 push {r4, lr}
|
|
1000552a: 0783 lsls r3, r0, #30
|
|
1000552c: d00a beq.n 10005544 <strlen+0x1c>
|
|
1000552e: 0003 movs r3, r0
|
|
10005530: 2103 movs r1, #3
|
|
10005532: e002 b.n 1000553a <strlen+0x12>
|
|
10005534: 3301 adds r3, #1
|
|
10005536: 420b tst r3, r1
|
|
10005538: d005 beq.n 10005546 <strlen+0x1e>
|
|
1000553a: 781a ldrb r2, [r3, #0]
|
|
1000553c: 2a00 cmp r2, #0
|
|
1000553e: d1f9 bne.n 10005534 <strlen+0xc>
|
|
10005540: 1a18 subs r0, r3, r0
|
|
10005542: bd10 pop {r4, pc}
|
|
10005544: 0003 movs r3, r0
|
|
10005546: 6819 ldr r1, [r3, #0]
|
|
10005548: 4a0c ldr r2, [pc, #48] @ (1000557c <strlen+0x54>)
|
|
1000554a: 4c0d ldr r4, [pc, #52] @ (10005580 <strlen+0x58>)
|
|
1000554c: 188a adds r2, r1, r2
|
|
1000554e: 438a bics r2, r1
|
|
10005550: 4222 tst r2, r4
|
|
10005552: d10f bne.n 10005574 <strlen+0x4c>
|
|
10005554: 6859 ldr r1, [r3, #4]
|
|
10005556: 4a09 ldr r2, [pc, #36] @ (1000557c <strlen+0x54>)
|
|
10005558: 3304 adds r3, #4
|
|
1000555a: 188a adds r2, r1, r2
|
|
1000555c: 438a bics r2, r1
|
|
1000555e: 4222 tst r2, r4
|
|
10005560: d108 bne.n 10005574 <strlen+0x4c>
|
|
10005562: 6859 ldr r1, [r3, #4]
|
|
10005564: 4a05 ldr r2, [pc, #20] @ (1000557c <strlen+0x54>)
|
|
10005566: 3304 adds r3, #4
|
|
10005568: 188a adds r2, r1, r2
|
|
1000556a: 438a bics r2, r1
|
|
1000556c: 4222 tst r2, r4
|
|
1000556e: d0f1 beq.n 10005554 <strlen+0x2c>
|
|
10005570: e000 b.n 10005574 <strlen+0x4c>
|
|
10005572: 3301 adds r3, #1
|
|
10005574: 781a ldrb r2, [r3, #0]
|
|
10005576: 2a00 cmp r2, #0
|
|
10005578: d1fb bne.n 10005572 <strlen+0x4a>
|
|
1000557a: e7e1 b.n 10005540 <strlen+0x18>
|
|
1000557c: fefefeff .word 0xfefefeff
|
|
10005580: 80808080 .word 0x80808080
|
|
|
|
10005584 <_malloc_trim_r>:
|
|
10005584: b5f0 push {r4, r5, r6, r7, lr}
|
|
10005586: 46c6 mov lr, r8
|
|
10005588: 0006 movs r6, r0
|
|
1000558a: b500 push {lr}
|
|
1000558c: 2008 movs r0, #8
|
|
1000558e: 000d movs r5, r1
|
|
10005590: f7ff ffbc bl 1000550c <sysconf>
|
|
10005594: 0004 movs r4, r0
|
|
10005596: 0030 movs r0, r6
|
|
10005598: f7ff ff9c bl 100054d4 <__malloc_lock>
|
|
1000559c: 4b23 ldr r3, [pc, #140] @ (1000562c <_malloc_trim_r+0xa8>)
|
|
1000559e: 0021 movs r1, r4
|
|
100055a0: 4698 mov r8, r3
|
|
100055a2: 689b ldr r3, [r3, #8]
|
|
100055a4: 685f ldr r7, [r3, #4]
|
|
100055a6: 2303 movs r3, #3
|
|
100055a8: 439f bics r7, r3
|
|
100055aa: 0038 movs r0, r7
|
|
100055ac: 3811 subs r0, #17
|
|
100055ae: 1b40 subs r0, r0, r5
|
|
100055b0: 1900 adds r0, r0, r4
|
|
100055b2: f7fe f8e9 bl 10003788 <__wrap___aeabi_uidiv>
|
|
100055b6: 1e45 subs r5, r0, #1
|
|
100055b8: 4365 muls r5, r4
|
|
100055ba: 42ac cmp r4, r5
|
|
100055bc: dc08 bgt.n 100055d0 <_malloc_trim_r+0x4c>
|
|
100055be: 2100 movs r1, #0
|
|
100055c0: 0030 movs r0, r6
|
|
100055c2: f7ff ff8b bl 100054dc <_sbrk_r>
|
|
100055c6: 4643 mov r3, r8
|
|
100055c8: 689b ldr r3, [r3, #8]
|
|
100055ca: 19db adds r3, r3, r7
|
|
100055cc: 4298 cmp r0, r3
|
|
100055ce: d006 beq.n 100055de <_malloc_trim_r+0x5a>
|
|
100055d0: 0030 movs r0, r6
|
|
100055d2: f7ff ff81 bl 100054d8 <__malloc_unlock>
|
|
100055d6: 2000 movs r0, #0
|
|
100055d8: bc80 pop {r7}
|
|
100055da: 46b8 mov r8, r7
|
|
100055dc: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100055de: 0030 movs r0, r6
|
|
100055e0: 4269 negs r1, r5
|
|
100055e2: f7ff ff7b bl 100054dc <_sbrk_r>
|
|
100055e6: 3001 adds r0, #1
|
|
100055e8: d00e beq.n 10005608 <_malloc_trim_r+0x84>
|
|
100055ea: 2201 movs r2, #1
|
|
100055ec: 4643 mov r3, r8
|
|
100055ee: 1b7f subs r7, r7, r5
|
|
100055f0: 689b ldr r3, [r3, #8]
|
|
100055f2: 4317 orrs r7, r2
|
|
100055f4: 4a0e ldr r2, [pc, #56] @ (10005630 <_malloc_trim_r+0xac>)
|
|
100055f6: 605f str r7, [r3, #4]
|
|
100055f8: 6813 ldr r3, [r2, #0]
|
|
100055fa: 0030 movs r0, r6
|
|
100055fc: 1b5b subs r3, r3, r5
|
|
100055fe: 6013 str r3, [r2, #0]
|
|
10005600: f7ff ff6a bl 100054d8 <__malloc_unlock>
|
|
10005604: 2001 movs r0, #1
|
|
10005606: e7e7 b.n 100055d8 <_malloc_trim_r+0x54>
|
|
10005608: 2100 movs r1, #0
|
|
1000560a: 0030 movs r0, r6
|
|
1000560c: f7ff ff66 bl 100054dc <_sbrk_r>
|
|
10005610: 4643 mov r3, r8
|
|
10005612: 689a ldr r2, [r3, #8]
|
|
10005614: 1a83 subs r3, r0, r2
|
|
10005616: 2b0f cmp r3, #15
|
|
10005618: ddda ble.n 100055d0 <_malloc_trim_r+0x4c>
|
|
1000561a: 4c06 ldr r4, [pc, #24] @ (10005634 <_malloc_trim_r+0xb0>)
|
|
1000561c: 4904 ldr r1, [pc, #16] @ (10005630 <_malloc_trim_r+0xac>)
|
|
1000561e: 6824 ldr r4, [r4, #0]
|
|
10005620: 1b00 subs r0, r0, r4
|
|
10005622: 6008 str r0, [r1, #0]
|
|
10005624: 2101 movs r1, #1
|
|
10005626: 430b orrs r3, r1
|
|
10005628: 6053 str r3, [r2, #4]
|
|
1000562a: e7d1 b.n 100055d0 <_malloc_trim_r+0x4c>
|
|
1000562c: 200002f0 .word 0x200002f0
|
|
10005630: 2000095c .word 0x2000095c
|
|
10005634: 200002e8 .word 0x200002e8
|
|
|
|
10005638 <_free_r>:
|
|
10005638: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
1000563a: 46ce mov lr, r9
|
|
1000563c: 4647 mov r7, r8
|
|
1000563e: 0005 movs r5, r0
|
|
10005640: 000c movs r4, r1
|
|
10005642: b580 push {r7, lr}
|
|
10005644: 2900 cmp r1, #0
|
|
10005646: d057 beq.n 100056f8 <_free_r+0xc0>
|
|
10005648: f7ff ff44 bl 100054d4 <__malloc_lock>
|
|
1000564c: 2301 movs r3, #1
|
|
1000564e: 0021 movs r1, r4
|
|
10005650: 469c mov ip, r3
|
|
10005652: 3908 subs r1, #8
|
|
10005654: 6848 ldr r0, [r1, #4]
|
|
10005656: 4662 mov r2, ip
|
|
10005658: 0003 movs r3, r0
|
|
1000565a: 2403 movs r4, #3
|
|
1000565c: 4393 bics r3, r2
|
|
1000565e: 18cf adds r7, r1, r3
|
|
10005660: 687a ldr r2, [r7, #4]
|
|
10005662: 4e65 ldr r6, [pc, #404] @ (100057f8 <_free_r+0x1c0>)
|
|
10005664: 43a2 bics r2, r4
|
|
10005666: 68b4 ldr r4, [r6, #8]
|
|
10005668: 42bc cmp r4, r7
|
|
1000566a: d100 bne.n 1000566e <_free_r+0x36>
|
|
1000566c: e070 b.n 10005750 <_free_r+0x118>
|
|
1000566e: 18bc adds r4, r7, r2
|
|
10005670: 46a1 mov r9, r4
|
|
10005672: 4664 mov r4, ip
|
|
10005674: 607a str r2, [r7, #4]
|
|
10005676: 4204 tst r4, r0
|
|
10005678: d121 bne.n 100056be <_free_r+0x86>
|
|
1000567a: 6808 ldr r0, [r1, #0]
|
|
1000567c: 1a09 subs r1, r1, r0
|
|
1000567e: 181b adds r3, r3, r0
|
|
10005680: 6888 ldr r0, [r1, #8]
|
|
10005682: 4680 mov r8, r0
|
|
10005684: 4648 mov r0, r9
|
|
10005686: 6840 ldr r0, [r0, #4]
|
|
10005688: 4020 ands r0, r4
|
|
1000568a: 0034 movs r4, r6
|
|
1000568c: 3408 adds r4, #8
|
|
1000568e: 4681 mov r9, r0
|
|
10005690: 45a0 cmp r8, r4
|
|
10005692: d051 beq.n 10005738 <_free_r+0x100>
|
|
10005694: 4640 mov r0, r8
|
|
10005696: 68cc ldr r4, [r1, #12]
|
|
10005698: 60c4 str r4, [r0, #12]
|
|
1000569a: 60a0 str r0, [r4, #8]
|
|
1000569c: 4648 mov r0, r9
|
|
1000569e: 2800 cmp r0, #0
|
|
100056a0: d111 bne.n 100056c6 <_free_r+0x8e>
|
|
100056a2: 189b adds r3, r3, r2
|
|
100056a4: 4855 ldr r0, [pc, #340] @ (100057fc <_free_r+0x1c4>)
|
|
100056a6: 68ba ldr r2, [r7, #8]
|
|
100056a8: 4282 cmp r2, r0
|
|
100056aa: d100 bne.n 100056ae <_free_r+0x76>
|
|
100056ac: e07f b.n 100057ae <_free_r+0x176>
|
|
100056ae: 68f8 ldr r0, [r7, #12]
|
|
100056b0: 60d0 str r0, [r2, #12]
|
|
100056b2: 6082 str r2, [r0, #8]
|
|
100056b4: 2201 movs r2, #1
|
|
100056b6: 431a orrs r2, r3
|
|
100056b8: 604a str r2, [r1, #4]
|
|
100056ba: 50cb str r3, [r1, r3]
|
|
100056bc: e007 b.n 100056ce <_free_r+0x96>
|
|
100056be: 4648 mov r0, r9
|
|
100056c0: 6840 ldr r0, [r0, #4]
|
|
100056c2: 4220 tst r0, r4
|
|
100056c4: d0ed beq.n 100056a2 <_free_r+0x6a>
|
|
100056c6: 4662 mov r2, ip
|
|
100056c8: 431a orrs r2, r3
|
|
100056ca: 604a str r2, [r1, #4]
|
|
100056cc: 603b str r3, [r7, #0]
|
|
100056ce: 2280 movs r2, #128 @ 0x80
|
|
100056d0: 0092 lsls r2, r2, #2
|
|
100056d2: 4293 cmp r3, r2
|
|
100056d4: d214 bcs.n 10005700 <_free_r+0xc8>
|
|
100056d6: 08da lsrs r2, r3, #3
|
|
100056d8: 0958 lsrs r0, r3, #5
|
|
100056da: 2301 movs r3, #1
|
|
100056dc: 4083 lsls r3, r0
|
|
100056de: 6870 ldr r0, [r6, #4]
|
|
100056e0: 4303 orrs r3, r0
|
|
100056e2: 6073 str r3, [r6, #4]
|
|
100056e4: 00d3 lsls r3, r2, #3
|
|
100056e6: 199b adds r3, r3, r6
|
|
100056e8: 689a ldr r2, [r3, #8]
|
|
100056ea: 60cb str r3, [r1, #12]
|
|
100056ec: 608a str r2, [r1, #8]
|
|
100056ee: 6099 str r1, [r3, #8]
|
|
100056f0: 60d1 str r1, [r2, #12]
|
|
100056f2: 0028 movs r0, r5
|
|
100056f4: f7ff fef0 bl 100054d8 <__malloc_unlock>
|
|
100056f8: bcc0 pop {r6, r7}
|
|
100056fa: 46b9 mov r9, r7
|
|
100056fc: 46b0 mov r8, r6
|
|
100056fe: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10005700: 0a5c lsrs r4, r3, #9
|
|
10005702: 2c04 cmp r4, #4
|
|
10005704: d83d bhi.n 10005782 <_free_r+0x14a>
|
|
10005706: 099c lsrs r4, r3, #6
|
|
10005708: 0020 movs r0, r4
|
|
1000570a: 3439 adds r4, #57 @ 0x39
|
|
1000570c: 3038 adds r0, #56 @ 0x38
|
|
1000570e: 00e4 lsls r4, r4, #3
|
|
10005710: 1934 adds r4, r6, r4
|
|
10005712: 6822 ldr r2, [r4, #0]
|
|
10005714: 3c08 subs r4, #8
|
|
10005716: 2703 movs r7, #3
|
|
10005718: 4294 cmp r4, r2
|
|
1000571a: d103 bne.n 10005724 <_free_r+0xec>
|
|
1000571c: e040 b.n 100057a0 <_free_r+0x168>
|
|
1000571e: 6892 ldr r2, [r2, #8]
|
|
10005720: 4294 cmp r4, r2
|
|
10005722: d003 beq.n 1000572c <_free_r+0xf4>
|
|
10005724: 6850 ldr r0, [r2, #4]
|
|
10005726: 43b8 bics r0, r7
|
|
10005728: 4298 cmp r0, r3
|
|
1000572a: d8f8 bhi.n 1000571e <_free_r+0xe6>
|
|
1000572c: 68d4 ldr r4, [r2, #12]
|
|
1000572e: 60cc str r4, [r1, #12]
|
|
10005730: 608a str r2, [r1, #8]
|
|
10005732: 60a1 str r1, [r4, #8]
|
|
10005734: 60d1 str r1, [r2, #12]
|
|
10005736: e7dc b.n 100056f2 <_free_r+0xba>
|
|
10005738: 2800 cmp r0, #0
|
|
1000573a: d158 bne.n 100057ee <_free_r+0x1b6>
|
|
1000573c: 68b8 ldr r0, [r7, #8]
|
|
1000573e: 18d2 adds r2, r2, r3
|
|
10005740: 68fb ldr r3, [r7, #12]
|
|
10005742: 60c3 str r3, [r0, #12]
|
|
10005744: 6098 str r0, [r3, #8]
|
|
10005746: 4663 mov r3, ip
|
|
10005748: 4313 orrs r3, r2
|
|
1000574a: 604b str r3, [r1, #4]
|
|
1000574c: 508a str r2, [r1, r2]
|
|
1000574e: e7d0 b.n 100056f2 <_free_r+0xba>
|
|
10005750: 189a adds r2, r3, r2
|
|
10005752: 4663 mov r3, ip
|
|
10005754: 4203 tst r3, r0
|
|
10005756: d106 bne.n 10005766 <_free_r+0x12e>
|
|
10005758: 680b ldr r3, [r1, #0]
|
|
1000575a: 1ac9 subs r1, r1, r3
|
|
1000575c: 6888 ldr r0, [r1, #8]
|
|
1000575e: 18d2 adds r2, r2, r3
|
|
10005760: 68cb ldr r3, [r1, #12]
|
|
10005762: 60c3 str r3, [r0, #12]
|
|
10005764: 6098 str r0, [r3, #8]
|
|
10005766: 2301 movs r3, #1
|
|
10005768: 4313 orrs r3, r2
|
|
1000576a: 604b str r3, [r1, #4]
|
|
1000576c: 4b24 ldr r3, [pc, #144] @ (10005800 <_free_r+0x1c8>)
|
|
1000576e: 60b1 str r1, [r6, #8]
|
|
10005770: 681b ldr r3, [r3, #0]
|
|
10005772: 4293 cmp r3, r2
|
|
10005774: d8bd bhi.n 100056f2 <_free_r+0xba>
|
|
10005776: 4b23 ldr r3, [pc, #140] @ (10005804 <_free_r+0x1cc>)
|
|
10005778: 0028 movs r0, r5
|
|
1000577a: 6819 ldr r1, [r3, #0]
|
|
1000577c: f7ff ff02 bl 10005584 <_malloc_trim_r>
|
|
10005780: e7b7 b.n 100056f2 <_free_r+0xba>
|
|
10005782: 2c14 cmp r4, #20
|
|
10005784: d907 bls.n 10005796 <_free_r+0x15e>
|
|
10005786: 2c54 cmp r4, #84 @ 0x54
|
|
10005788: d81a bhi.n 100057c0 <_free_r+0x188>
|
|
1000578a: 0b1c lsrs r4, r3, #12
|
|
1000578c: 0020 movs r0, r4
|
|
1000578e: 346f adds r4, #111 @ 0x6f
|
|
10005790: 306e adds r0, #110 @ 0x6e
|
|
10005792: 00e4 lsls r4, r4, #3
|
|
10005794: e7bc b.n 10005710 <_free_r+0xd8>
|
|
10005796: 0020 movs r0, r4
|
|
10005798: 345c adds r4, #92 @ 0x5c
|
|
1000579a: 305b adds r0, #91 @ 0x5b
|
|
1000579c: 00e4 lsls r4, r4, #3
|
|
1000579e: e7b7 b.n 10005710 <_free_r+0xd8>
|
|
100057a0: 2301 movs r3, #1
|
|
100057a2: 1080 asrs r0, r0, #2
|
|
100057a4: 4083 lsls r3, r0
|
|
100057a6: 6870 ldr r0, [r6, #4]
|
|
100057a8: 4303 orrs r3, r0
|
|
100057aa: 6073 str r3, [r6, #4]
|
|
100057ac: e7bf b.n 1000572e <_free_r+0xf6>
|
|
100057ae: 60d1 str r1, [r2, #12]
|
|
100057b0: 6091 str r1, [r2, #8]
|
|
100057b2: 60ca str r2, [r1, #12]
|
|
100057b4: 608a str r2, [r1, #8]
|
|
100057b6: 2201 movs r2, #1
|
|
100057b8: 431a orrs r2, r3
|
|
100057ba: 604a str r2, [r1, #4]
|
|
100057bc: 50cb str r3, [r1, r3]
|
|
100057be: e798 b.n 100056f2 <_free_r+0xba>
|
|
100057c0: 22aa movs r2, #170 @ 0xaa
|
|
100057c2: 0052 lsls r2, r2, #1
|
|
100057c4: 4294 cmp r4, r2
|
|
100057c6: d805 bhi.n 100057d4 <_free_r+0x19c>
|
|
100057c8: 0bdc lsrs r4, r3, #15
|
|
100057ca: 0020 movs r0, r4
|
|
100057cc: 3478 adds r4, #120 @ 0x78
|
|
100057ce: 3077 adds r0, #119 @ 0x77
|
|
100057d0: 00e4 lsls r4, r4, #3
|
|
100057d2: e79d b.n 10005710 <_free_r+0xd8>
|
|
100057d4: 4a0c ldr r2, [pc, #48] @ (10005808 <_free_r+0x1d0>)
|
|
100057d6: 4294 cmp r4, r2
|
|
100057d8: d805 bhi.n 100057e6 <_free_r+0x1ae>
|
|
100057da: 0c9c lsrs r4, r3, #18
|
|
100057dc: 0020 movs r0, r4
|
|
100057de: 347d adds r4, #125 @ 0x7d
|
|
100057e0: 307c adds r0, #124 @ 0x7c
|
|
100057e2: 00e4 lsls r4, r4, #3
|
|
100057e4: e794 b.n 10005710 <_free_r+0xd8>
|
|
100057e6: 24fe movs r4, #254 @ 0xfe
|
|
100057e8: 207e movs r0, #126 @ 0x7e
|
|
100057ea: 00a4 lsls r4, r4, #2
|
|
100057ec: e790 b.n 10005710 <_free_r+0xd8>
|
|
100057ee: 4662 mov r2, ip
|
|
100057f0: 431a orrs r2, r3
|
|
100057f2: 604a str r2, [r1, #4]
|
|
100057f4: 603b str r3, [r7, #0]
|
|
100057f6: e77c b.n 100056f2 <_free_r+0xba>
|
|
100057f8: 200002f0 .word 0x200002f0
|
|
100057fc: 200002f8 .word 0x200002f8
|
|
10005800: 200002ec .word 0x200002ec
|
|
10005804: 2000098c .word 0x2000098c
|
|
10005808: 00000554 .word 0x00000554
|
|
|
|
1000580c <_fini>:
|
|
1000580c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
1000580e: 46c0 nop @ (mov r8, r8)
|
|
|
|
10005810 <__mutex_exit_veneer>:
|
|
10005810: b401 push {r0}
|
|
10005812: 4802 ldr r0, [pc, #8] @ (1000581c <__mutex_exit_veneer+0xc>)
|
|
10005814: 4684 mov ip, r0
|
|
10005816: bc01 pop {r0}
|
|
10005818: 4760 bx ip
|
|
1000581a: bf00 nop
|
|
1000581c: 200001c9 .word 0x200001c9
|
|
|
|
10005820 <____aeabi_ldiv0_veneer>:
|
|
10005820: b401 push {r0}
|
|
10005822: 4802 ldr r0, [pc, #8] @ (1000582c <____aeabi_ldiv0_veneer+0xc>)
|
|
10005824: 4684 mov ip, r0
|
|
10005826: bc01 pop {r0}
|
|
10005828: 4760 bx ip
|
|
1000582a: bf00 nop
|
|
1000582c: 20000215 .word 0x20000215
|
|
|
|
10005830 <____aeabi_idiv0_veneer>:
|
|
10005830: b401 push {r0}
|
|
10005832: 4802 ldr r0, [pc, #8] @ (1000583c <____aeabi_idiv0_veneer+0xc>)
|
|
10005834: 4684 mov ip, r0
|
|
10005836: bc01 pop {r0}
|
|
10005838: 4760 bx ip
|
|
1000583a: bf00 nop
|
|
1000583c: 20000215 .word 0x20000215
|
|
|
|
10005840 <__mutex_try_enter_block_until_veneer>:
|
|
10005840: b401 push {r0}
|
|
10005842: 4802 ldr r0, [pc, #8] @ (1000584c <__mutex_try_enter_block_until_veneer+0xc>)
|
|
10005844: 4684 mov ip, r0
|
|
10005846: bc01 pop {r0}
|
|
10005848: 4760 bx ip
|
|
1000584a: bf00 nop
|
|
1000584c: 20000195 .word 0x20000195
|
|
|
|
Disassembly of section .data:
|
|
|
|
200000c0 <mutex_try_enter>:
|
|
200000c0: 0003 movs r3, r0
|
|
200000c2: 6800 ldr r0, [r0, #0]
|
|
200000c4: f3ef 8c10 mrs ip, PRIMASK
|
|
200000c8: b672 cpsid i
|
|
200000ca: 6802 ldr r2, [r0, #0]
|
|
200000cc: 2a00 cmp r2, #0
|
|
200000ce: d0fc beq.n 200000ca <mutex_try_enter+0xa>
|
|
200000d0: f3bf 8f5f dmb sy
|
|
200000d4: 2204 movs r2, #4
|
|
200000d6: 569a ldrsb r2, [r3, r2]
|
|
200000d8: 2a00 cmp r2, #0
|
|
200000da: db0b blt.n 200000f4 <mutex_try_enter+0x34>
|
|
200000dc: 2900 cmp r1, #0
|
|
200000de: d010 beq.n 20000102 <mutex_try_enter+0x42>
|
|
200000e0: 600a str r2, [r1, #0]
|
|
200000e2: 2000 movs r0, #0
|
|
200000e4: 681b ldr r3, [r3, #0]
|
|
200000e6: f3bf 8f5f dmb sy
|
|
200000ea: 2200 movs r2, #0
|
|
200000ec: 601a str r2, [r3, #0]
|
|
200000ee: f38c 8810 msr PRIMASK, ip
|
|
200000f2: 4770 bx lr
|
|
200000f4: 22d0 movs r2, #208 @ 0xd0
|
|
200000f6: 0612 lsls r2, r2, #24
|
|
200000f8: 7812 ldrb r2, [r2, #0]
|
|
200000fa: b252 sxtb r2, r2
|
|
200000fc: 711a strb r2, [r3, #4]
|
|
200000fe: 2001 movs r0, #1
|
|
20000100: e7f0 b.n 200000e4 <mutex_try_enter+0x24>
|
|
20000102: 2000 movs r0, #0
|
|
20000104: e7ee b.n 200000e4 <mutex_try_enter+0x24>
|
|
...
|
|
|
|
20000108 <mutex_enter_block_until>:
|
|
20000108: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
2000010a: 46ce mov lr, r9
|
|
2000010c: 4647 mov r7, r8
|
|
2000010e: b580 push {r7, lr}
|
|
20000110: 0004 movs r4, r0
|
|
20000112: 0017 movs r7, r2
|
|
20000114: 4698 mov r8, r3
|
|
20000116: 6803 ldr r3, [r0, #0]
|
|
20000118: 2b00 cmp r3, #0
|
|
2000011a: d020 beq.n 2000015e <mutex_enter_block_until+0x56>
|
|
2000011c: 23d0 movs r3, #208 @ 0xd0
|
|
2000011e: 061b lsls r3, r3, #24
|
|
20000120: 781b ldrb r3, [r3, #0]
|
|
20000122: b25b sxtb r3, r3
|
|
20000124: 4699 mov r9, r3
|
|
20000126: 6826 ldr r6, [r4, #0]
|
|
20000128: f3ef 8c10 mrs ip, PRIMASK
|
|
2000012c: b672 cpsid i
|
|
2000012e: 6835 ldr r5, [r6, #0]
|
|
20000130: 2d00 cmp r5, #0
|
|
20000132: d0fc beq.n 2000012e <mutex_enter_block_until+0x26>
|
|
20000134: f3bf 8f5f dmb sy
|
|
20000138: 2504 movs r5, #4
|
|
2000013a: 5765 ldrsb r5, [r4, r5]
|
|
2000013c: 2d00 cmp r5, #0
|
|
2000013e: db14 blt.n 2000016a <mutex_enter_block_until+0x62>
|
|
20000140: 6823 ldr r3, [r4, #0]
|
|
20000142: f3bf 8f5f dmb sy
|
|
20000146: 2200 movs r2, #0
|
|
20000148: 601a str r2, [r3, #0]
|
|
2000014a: f38c 8810 msr PRIMASK, ip
|
|
2000014e: 0038 movs r0, r7
|
|
20000150: 4641 mov r1, r8
|
|
20000152: f000 f861 bl 20000218 <__best_effort_wfe_or_timeout_veneer>
|
|
20000156: 2800 cmp r0, #0
|
|
20000158: d0e5 beq.n 20000126 <mutex_enter_block_until+0x1e>
|
|
2000015a: 2000 movs r0, #0
|
|
2000015c: e00f b.n 2000017e <mutex_enter_block_until+0x76>
|
|
2000015e: 4b0a ldr r3, [pc, #40] @ (20000188 <mutex_enter_block_until+0x80>)
|
|
20000160: 4a0a ldr r2, [pc, #40] @ (2000018c <mutex_enter_block_until+0x84>)
|
|
20000162: 480b ldr r0, [pc, #44] @ (20000190 <mutex_enter_block_until+0x88>)
|
|
20000164: 2185 movs r1, #133 @ 0x85
|
|
20000166: f000 f85f bl 20000228 <____assert_func_veneer>
|
|
2000016a: 464b mov r3, r9
|
|
2000016c: 7123 strb r3, [r4, #4]
|
|
2000016e: 6823 ldr r3, [r4, #0]
|
|
20000170: f3bf 8f5f dmb sy
|
|
20000174: 2200 movs r2, #0
|
|
20000176: 601a str r2, [r3, #0]
|
|
20000178: f38c 8810 msr PRIMASK, ip
|
|
2000017c: 2001 movs r0, #1
|
|
2000017e: bcc0 pop {r6, r7}
|
|
20000180: 46b9 mov r9, r7
|
|
20000182: 46b0 mov r8, r6
|
|
20000184: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
20000186: 46c0 nop @ (mov r8, r8)
|
|
20000188: 10005c14 .word 0x10005c14
|
|
2000018c: 10005c6c .word 0x10005c6c
|
|
20000190: 10005bd0 .word 0x10005bd0
|
|
|
|
20000194 <mutex_try_enter_block_until>:
|
|
20000194: b570 push {r4, r5, r6, lr}
|
|
20000196: b082 sub sp, #8
|
|
20000198: 0006 movs r6, r0
|
|
2000019a: 0015 movs r5, r2
|
|
2000019c: 001c movs r4, r3
|
|
2000019e: a901 add r1, sp, #4
|
|
200001a0: f7ff ff8e bl 200000c0 <mutex_try_enter>
|
|
200001a4: 2800 cmp r0, #0
|
|
200001a6: d107 bne.n 200001b8 <mutex_try_enter_block_until+0x24>
|
|
200001a8: 9b01 ldr r3, [sp, #4]
|
|
200001aa: b25b sxtb r3, r3
|
|
200001ac: 22d0 movs r2, #208 @ 0xd0
|
|
200001ae: 0612 lsls r2, r2, #24
|
|
200001b0: 7812 ldrb r2, [r2, #0]
|
|
200001b2: b252 sxtb r2, r2
|
|
200001b4: 4293 cmp r3, r2
|
|
200001b6: d101 bne.n 200001bc <mutex_try_enter_block_until+0x28>
|
|
200001b8: b002 add sp, #8
|
|
200001ba: bd70 pop {r4, r5, r6, pc}
|
|
200001bc: 002a movs r2, r5
|
|
200001be: 0023 movs r3, r4
|
|
200001c0: 0030 movs r0, r6
|
|
200001c2: f7ff ffa1 bl 20000108 <mutex_enter_block_until>
|
|
200001c6: e7f7 b.n 200001b8 <mutex_try_enter_block_until+0x24>
|
|
|
|
200001c8 <mutex_exit>:
|
|
200001c8: b510 push {r4, lr}
|
|
200001ca: 6802 ldr r2, [r0, #0]
|
|
200001cc: f3ef 8110 mrs r1, PRIMASK
|
|
200001d0: b672 cpsid i
|
|
200001d2: 6813 ldr r3, [r2, #0]
|
|
200001d4: 2b00 cmp r3, #0
|
|
200001d6: d0fc beq.n 200001d2 <mutex_exit+0xa>
|
|
200001d8: f3bf 8f5f dmb sy
|
|
200001dc: 2304 movs r3, #4
|
|
200001de: 56c3 ldrsb r3, [r0, r3]
|
|
200001e0: 2b00 cmp r3, #0
|
|
200001e2: db0a blt.n 200001fa <mutex_exit+0x32>
|
|
200001e4: 23ff movs r3, #255 @ 0xff
|
|
200001e6: 7103 strb r3, [r0, #4]
|
|
200001e8: 6803 ldr r3, [r0, #0]
|
|
200001ea: f3bf 8f5f dmb sy
|
|
200001ee: 2200 movs r2, #0
|
|
200001f0: 601a str r2, [r3, #0]
|
|
200001f2: f381 8810 msr PRIMASK, r1
|
|
200001f6: bf40 sev
|
|
200001f8: bd10 pop {r4, pc}
|
|
200001fa: 4b03 ldr r3, [pc, #12] @ (20000208 <mutex_exit+0x40>)
|
|
200001fc: 4a03 ldr r2, [pc, #12] @ (2000020c <mutex_exit+0x44>)
|
|
200001fe: 4804 ldr r0, [pc, #16] @ (20000210 <mutex_exit+0x48>)
|
|
20000200: 21b4 movs r1, #180 @ 0xb4
|
|
20000202: f000 f811 bl 20000228 <____assert_func_veneer>
|
|
20000206: 46c0 nop @ (mov r8, r8)
|
|
20000208: 10005c28 .word 0x10005c28
|
|
2000020c: 10005c60 .word 0x10005c60
|
|
20000210: 10005bd0 .word 0x10005bd0
|
|
|
|
20000214 <__aeabi_idiv0>:
|
|
20000214: 4770 bx lr
|
|
20000216: 46c0 nop @ (mov r8, r8)
|
|
|
|
20000218 <__best_effort_wfe_or_timeout_veneer>:
|
|
20000218: b401 push {r0}
|
|
2000021a: 4802 ldr r0, [pc, #8] @ (20000224 <__best_effort_wfe_or_timeout_veneer+0xc>)
|
|
2000021c: 4684 mov ip, r0
|
|
2000021e: bc01 pop {r0}
|
|
20000220: 4760 bx ip
|
|
20000222: bf00 nop
|
|
20000224: 10001931 .word 0x10001931
|
|
|
|
20000228 <____assert_func_veneer>:
|
|
20000228: b401 push {r0}
|
|
2000022a: 4802 ldr r0, [pc, #8] @ (20000234 <____assert_func_veneer+0xc>)
|
|
2000022c: 4684 mov ip, r0
|
|
2000022e: bc01 pop {r0}
|
|
20000230: 4760 bx ip
|
|
20000232: bf00 nop
|
|
20000234: 100023b9 .word 0x100023b9
|
|
|
|
20000238 <striped_spin_lock_num>:
|
|
20000238: 00000010 ....
|
|
|
|
2000023c <irq_handler_chain_slots>:
|
|
2000023c: 00000000 .word 0x00000000
|
|
20000240: 00010000 .word 0x00010000
|
|
...
|
|
2000024c: 00020000 .word 0x00020000
|
|
...
|
|
20000258: 00030000 .word 0x00030000
|
|
...
|
|
20000264: 00ff0000 .word 0x00ff0000
|
|
20000268: 00000000 .word 0x00000000
|
|
|
|
2000026c <irq_handler_chain_first_slot>:
|
|
2000026c: b501 push {r0, lr}
|
|
2000026e: 6848 ldr r0, [r1, #4]
|
|
20000270: 3101 adds r1, #1
|
|
20000272: 468e mov lr, r1
|
|
20000274: 4700 bx r0
|
|
|
|
20000276 <irq_handler_chain_remove_tail>:
|
|
20000276: 4670 mov r0, lr
|
|
20000278: 3809 subs r0, #9
|
|
2000027a: 4901 ldr r1, [pc, #4] @ (20000280 <irq_handler_chain_remove_tail+0xa>)
|
|
2000027c: 4788 blx r1
|
|
2000027e: bd01 pop {r0, pc}
|
|
20000280: 10000e79 .word 0x10000e79
|
|
|
|
20000284 <default_alarm_pool>:
|
|
20000284: 2000029c 00000000 20000840 20000b04 ... ....@.. ...
|
|
...
|
|
|
|
2000029c <default_alarm_pool_heap>:
|
|
2000029c: 20000b14 00000000 00000000 00000010 ... ............
|
|
200002ac: 00000000 ....
|
|
|
|
200002b0 <aeabi_bits_funcs>:
|
|
200002b0: 00003350 .word 0x00003350
|
|
200002b4: 0000334c .word 0x0000334c
|
|
200002b8: 00003354 .word 0x00003354
|
|
200002bc: 00003352 .word 0x00003352
|
|
|
|
200002c0 <aeabi_bits_funcs_end>:
|
|
200002c0: 0000534d .word 0x0000534d
|
|
200002c4: 0000434d .word 0x0000434d
|
|
200002c8: 00003453 .word 0x00003453
|
|
200002cc: 00003443 .word 0x00003443
|
|
|
|
200002d0 <stdio_uart>:
|
|
200002d0: 10004a41 00000000 10004a61 10004ae5 AJ......aJ...J..
|
|
200002e0: 00000000 00000100 ........
|
|
|
|
200002e8 <__malloc_sbrk_base>:
|
|
200002e8: ffffffff ....
|
|
|
|
200002ec <__malloc_trim_threshold>:
|
|
200002ec: 00020000 ....
|
|
|
|
200002f0 <__malloc_av_>:
|
|
...
|
|
200002f8: 200002f0 200002f0 200002f8 200002f8 ... ... ... ...
|
|
20000308: 20000300 20000300 20000308 20000308 ... ... ... ...
|
|
20000318: 20000310 20000310 20000318 20000318 ... ... ... ...
|
|
20000328: 20000320 20000320 20000328 20000328 .. .. (.. (..
|
|
20000338: 20000330 20000330 20000338 20000338 0.. 0.. 8.. 8..
|
|
20000348: 20000340 20000340 20000348 20000348 @.. @.. H.. H..
|
|
20000358: 20000350 20000350 20000358 20000358 P.. P.. X.. X..
|
|
20000368: 20000360 20000360 20000368 20000368 `.. `.. h.. h..
|
|
20000378: 20000370 20000370 20000378 20000378 p.. p.. x.. x..
|
|
20000388: 20000380 20000380 20000388 20000388 ... ... ... ...
|
|
20000398: 20000390 20000390 20000398 20000398 ... ... ... ...
|
|
200003a8: 200003a0 200003a0 200003a8 200003a8 ... ... ... ...
|
|
200003b8: 200003b0 200003b0 200003b8 200003b8 ... ... ... ...
|
|
200003c8: 200003c0 200003c0 200003c8 200003c8 ... ... ... ...
|
|
200003d8: 200003d0 200003d0 200003d8 200003d8 ... ... ... ...
|
|
200003e8: 200003e0 200003e0 200003e8 200003e8 ... ... ... ...
|
|
200003f8: 200003f0 200003f0 200003f8 200003f8 ... ... ... ...
|
|
20000408: 20000400 20000400 20000408 20000408 ... ... ... ...
|
|
20000418: 20000410 20000410 20000418 20000418 ... ... ... ...
|
|
20000428: 20000420 20000420 20000428 20000428 .. .. (.. (..
|
|
20000438: 20000430 20000430 20000438 20000438 0.. 0.. 8.. 8..
|
|
20000448: 20000440 20000440 20000448 20000448 @.. @.. H.. H..
|
|
20000458: 20000450 20000450 20000458 20000458 P.. P.. X.. X..
|
|
20000468: 20000460 20000460 20000468 20000468 `.. `.. h.. h..
|
|
20000478: 20000470 20000470 20000478 20000478 p.. p.. x.. x..
|
|
20000488: 20000480 20000480 20000488 20000488 ... ... ... ...
|
|
20000498: 20000490 20000490 20000498 20000498 ... ... ... ...
|
|
200004a8: 200004a0 200004a0 200004a8 200004a8 ... ... ... ...
|
|
200004b8: 200004b0 200004b0 200004b8 200004b8 ... ... ... ...
|
|
200004c8: 200004c0 200004c0 200004c8 200004c8 ... ... ... ...
|
|
200004d8: 200004d0 200004d0 200004d8 200004d8 ... ... ... ...
|
|
200004e8: 200004e0 200004e0 200004e8 200004e8 ... ... ... ...
|
|
200004f8: 200004f0 200004f0 200004f8 200004f8 ... ... ... ...
|
|
20000508: 20000500 20000500 20000508 20000508 ... ... ... ...
|
|
20000518: 20000510 20000510 20000518 20000518 ... ... ... ...
|
|
20000528: 20000520 20000520 20000528 20000528 .. .. (.. (..
|
|
20000538: 20000530 20000530 20000538 20000538 0.. 0.. 8.. 8..
|
|
20000548: 20000540 20000540 20000548 20000548 @.. @.. H.. H..
|
|
20000558: 20000550 20000550 20000558 20000558 P.. P.. X.. X..
|
|
20000568: 20000560 20000560 20000568 20000568 `.. `.. h.. h..
|
|
20000578: 20000570 20000570 20000578 20000578 p.. p.. x.. x..
|
|
20000588: 20000580 20000580 20000588 20000588 ... ... ... ...
|
|
20000598: 20000590 20000590 20000598 20000598 ... ... ... ...
|
|
200005a8: 200005a0 200005a0 200005a8 200005a8 ... ... ... ...
|
|
200005b8: 200005b0 200005b0 200005b8 200005b8 ... ... ... ...
|
|
200005c8: 200005c0 200005c0 200005c8 200005c8 ... ... ... ...
|
|
200005d8: 200005d0 200005d0 200005d8 200005d8 ... ... ... ...
|
|
200005e8: 200005e0 200005e0 200005e8 200005e8 ... ... ... ...
|
|
200005f8: 200005f0 200005f0 200005f8 200005f8 ... ... ... ...
|
|
20000608: 20000600 20000600 20000608 20000608 ... ... ... ...
|
|
20000618: 20000610 20000610 20000618 20000618 ... ... ... ...
|
|
20000628: 20000620 20000620 20000628 20000628 .. .. (.. (..
|
|
20000638: 20000630 20000630 20000638 20000638 0.. 0.. 8.. 8..
|
|
20000648: 20000640 20000640 20000648 20000648 @.. @.. H.. H..
|
|
20000658: 20000650 20000650 20000658 20000658 P.. P.. X.. X..
|
|
20000668: 20000660 20000660 20000668 20000668 `.. `.. h.. h..
|
|
20000678: 20000670 20000670 20000678 20000678 p.. p.. x.. x..
|
|
20000688: 20000680 20000680 20000688 20000688 ... ... ... ...
|
|
20000698: 20000690 20000690 20000698 20000698 ... ... ... ...
|
|
200006a8: 200006a0 200006a0 200006a8 200006a8 ... ... ... ...
|
|
200006b8: 200006b0 200006b0 200006b8 200006b8 ... ... ... ...
|
|
200006c8: 200006c0 200006c0 200006c8 200006c8 ... ... ... ...
|
|
200006d8: 200006d0 200006d0 200006d8 200006d8 ... ... ... ...
|
|
200006e8: 200006e0 200006e0 200006e8 200006e8 ... ... ... ...
|
|
|
|
200006f8 <_impure_ptr>:
|
|
200006f8: 20000700 00000000 ... ....
|
|
|
|
20000700 <_impure_data>:
|
|
20000700: 00000000 20000990 200009f4 20000a58 ....... ... X..
|
|
...
|
|
20000798: 00000001 00000000 abcd330e e66d1234 .........3..4.m.
|
|
200007a8: 0005deec 0000000b 00000000 00000000 ................
|
|
...
|
|
|
|
20000820 <print_mutex>:
|
|
...
|
|
|
|
20000828 <__mutex_array_end>:
|
|
20000828: 1000465d .word 0x1000465d
|
|
2000082c: 100036d1 .word 0x100036d1
|
|
20000830: 10003dd1 .word 0x10003dd1
|
|
20000834: 100044f1 .word 0x100044f1
|
|
|
|
20000838 <__frame_dummy_init_array_entry>:
|
|
20000838: 10000331 1...
|