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This commit is contained in:
matthias wagner
2023-05-13 13:57:56 +02:00
parent e5ad290ac4
commit af5a1611d5
22 changed files with 11580 additions and 10097 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
CMakeLists.txt
View File

@@ -6,6 +6,6 @@ pico_sdk_init()
project(clacer C CXX ASM) project(clacer C CXX ASM)
file(GLOB SOURCES "src/*.c") file(GLOB SOURCES "src/*.c")
add_executable(clacer ${SOURCES}) add_executable(clacer ${SOURCES})
target_link_libraries(clacer pico_stdlib hardware_spi) target_link_libraries(clacer pico_stdlib pico_time hardware_spi)
set_target_properties(clacer PROPERTIES RUNTIME_OUTPUT_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/build) set_target_properties(clacer PROPERTIES RUNTIME_OUTPUT_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/build)
pico_add_extra_outputs(clacer) pico_add_extra_outputs(clacer)

2
build/.cmake/api/v1/reply/cache-v2-c0b90e06688d9807cafc.json → build/.cmake/api/v1/reply/cache-v2-2e397d5d242cbf496ee1.json
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@@ -1475,7 +1475,7 @@
} }
], ],
"type" : "INTERNAL", "type" : "INTERNAL",
"value" : " /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs" "value" : " /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs /home/spider_pig/src/c/pico/pico-sdk/src/rp2_common/cmsis /home/spider_pig/src/c/pico/pico-sdk/src/rp2040/hardware_regs"
}, },
{ {
"name" : "PICO_DOXYGEN_PATHS", "name" : "PICO_DOXYGEN_PATHS",

4
build/.cmake/api/v1/reply/index-2023-05-13T09-04-32-0437.json → build/.cmake/api/v1/reply/index-2023-05-13T11-27-53-0064.json
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@@ -35,7 +35,7 @@
} }
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"kind" : "cache", "kind" : "cache",
"version" : "version" :
{ {
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"version" : "version" :
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build CMakeFiles/pioasm.dir/hex_output.cpp.o: CXX_COMPILER__pioasm_ /home/spider_pig/src/c/pico/pico-sdk/tools/pioasm/hex_output.cpp || cmake_object_order_depends_target_pioasm build CMakeFiles/pioasm.dir/hex_output.cpp.o: CXX_COMPILER__pioasm_ /home/spider_pig/src/c/pico/pico-sdk/tools/pioasm/hex_output.cpp || cmake_object_order_depends_target_pioasm
DEP_FILE = CMakeFiles/pioasm.dir/hex_output.cpp.o.d DEP_FILE = CMakeFiles/pioasm.dir/hex_output.cpp.o.d
@@ -113,8 +99,6 @@ build CMakeFiles/pioasm.dir/hex_output.cpp.o: CXX_COMPILER__pioasm_ /home/spider
INCLUDES = -I/home/spider_pig/src/c/pico/pico-sdk/tools/pioasm -I/home/spider_pig/src/c/pico/pico-sdk/tools/pioasm/gen INCLUDES = -I/home/spider_pig/src/c/pico/pico-sdk/tools/pioasm -I/home/spider_pig/src/c/pico/pico-sdk/tools/pioasm/gen
OBJECT_DIR = CMakeFiles/pioasm.dir OBJECT_DIR = CMakeFiles/pioasm.dir
OBJECT_FILE_DIR = CMakeFiles/pioasm.dir OBJECT_FILE_DIR = CMakeFiles/pioasm.dir
TARGET_COMPILE_PDB = CMakeFiles/pioasm.dir/
TARGET_PDB = pioasm.pdb
build CMakeFiles/pioasm.dir/ada_output.cpp.o: CXX_COMPILER__pioasm_ /home/spider_pig/src/c/pico/pico-sdk/tools/pioasm/ada_output.cpp || cmake_object_order_depends_target_pioasm build CMakeFiles/pioasm.dir/ada_output.cpp.o: CXX_COMPILER__pioasm_ /home/spider_pig/src/c/pico/pico-sdk/tools/pioasm/ada_output.cpp || cmake_object_order_depends_target_pioasm
DEP_FILE = CMakeFiles/pioasm.dir/ada_output.cpp.o.d DEP_FILE = CMakeFiles/pioasm.dir/ada_output.cpp.o.d
@@ -122,8 +106,6 @@ build CMakeFiles/pioasm.dir/ada_output.cpp.o: CXX_COMPILER__pioasm_ /home/spider
INCLUDES = -I/home/spider_pig/src/c/pico/pico-sdk/tools/pioasm -I/home/spider_pig/src/c/pico/pico-sdk/tools/pioasm/gen INCLUDES = -I/home/spider_pig/src/c/pico/pico-sdk/tools/pioasm -I/home/spider_pig/src/c/pico/pico-sdk/tools/pioasm/gen
OBJECT_DIR = CMakeFiles/pioasm.dir OBJECT_DIR = CMakeFiles/pioasm.dir
OBJECT_FILE_DIR = CMakeFiles/pioasm.dir OBJECT_FILE_DIR = CMakeFiles/pioasm.dir
TARGET_COMPILE_PDB = CMakeFiles/pioasm.dir/
TARGET_PDB = pioasm.pdb
# ============================================================================= # =============================================================================
@@ -137,9 +119,8 @@ build pioasm: CXX_EXECUTABLE_LINKER__pioasm_ CMakeFiles/pioasm.dir/main.cpp.o CM
OBJECT_DIR = CMakeFiles/pioasm.dir OBJECT_DIR = CMakeFiles/pioasm.dir
POST_BUILD = : POST_BUILD = :
PRE_LINK = : PRE_LINK = :
TARGET_COMPILE_PDB = CMakeFiles/pioasm.dir/
TARGET_FILE = pioasm TARGET_FILE = pioasm
TARGET_PDB = pioasm.pdb TARGET_PDB = pioasm.dbg
############################################# #############################################
@@ -185,14 +166,14 @@ build all: phony pioasm
############################################# #############################################
# Re-run CMake if any of its inputs changed. # Re-run CMake if any of its inputs changed.
build build.ninja: RERUN_CMAKE | /home/spider_pig/src/c/pico/pico-sdk/tools/pioasm/CMakeLists.txt /usr/share/cmake/Modules/CMakeCXXCompiler.cmake.in /usr/share/cmake/Modules/CMakeCXXCompilerABI.cpp /usr/share/cmake/Modules/CMakeCXXInformation.cmake /usr/share/cmake/Modules/CMakeCommonLanguageInclude.cmake /usr/share/cmake/Modules/CMakeCompilerIdDetection.cmake /usr/share/cmake/Modules/CMakeDetermineCXXCompiler.cmake /usr/share/cmake/Modules/CMakeDetermineCompileFeatures.cmake /usr/share/cmake/Modules/CMakeDetermineCompiler.cmake /usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake /usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake /usr/share/cmake/Modules/CMakeDetermineSystem.cmake /usr/share/cmake/Modules/CMakeFindBinUtils.cmake /usr/share/cmake/Modules/CMakeGenericSystem.cmake /usr/share/cmake/Modules/CMakeInitializeConfigs.cmake /usr/share/cmake/Modules/CMakeLanguageInformation.cmake /usr/share/cmake/Modules/CMakeParseImplicitIncludeInfo.cmake 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/usr/share/cmake/Modules/CMakeSystemSpecificInitialize.cmake /usr/share/cmake/Modules/Compiler/CMakeCommonCompilerMacros.cmake /usr/share/cmake/Modules/Compiler/GNU-CXX.cmake /usr/share/cmake/Modules/Compiler/GNU.cmake /usr/share/cmake/Modules/Platform/Linux-GNU-CXX.cmake /usr/share/cmake/Modules/Platform/Linux-GNU.cmake /usr/share/cmake/Modules/Platform/Linux.cmake /usr/share/cmake/Modules/Platform/UnixPaths.cmake CMakeCache.txt CMakeFiles/3.25.3/CMakeCXXCompiler.cmake CMakeFiles/3.25.3/CMakeSystem.cmake
pool = console pool = console
############################################# #############################################
# A missing CMake input file is not an error. # A missing CMake input file is not an error.
build /home/spider_pig/src/c/pico/pico-sdk/tools/pioasm/CMakeLists.txt /usr/share/cmake/Modules/CMakeCXXCompiler.cmake.in /usr/share/cmake/Modules/CMakeCXXCompilerABI.cpp /usr/share/cmake/Modules/CMakeCXXInformation.cmake /usr/share/cmake/Modules/CMakeCommonLanguageInclude.cmake /usr/share/cmake/Modules/CMakeCompilerIdDetection.cmake /usr/share/cmake/Modules/CMakeDetermineCXXCompiler.cmake /usr/share/cmake/Modules/CMakeDetermineCompileFeatures.cmake /usr/share/cmake/Modules/CMakeDetermineCompiler.cmake /usr/share/cmake/Modules/CMakeDetermineCompilerABI.cmake /usr/share/cmake/Modules/CMakeDetermineCompilerId.cmake /usr/share/cmake/Modules/CMakeDetermineSystem.cmake /usr/share/cmake/Modules/CMakeFindBinUtils.cmake /usr/share/cmake/Modules/CMakeGenericSystem.cmake /usr/share/cmake/Modules/CMakeInitializeConfigs.cmake /usr/share/cmake/Modules/CMakeLanguageInformation.cmake /usr/share/cmake/Modules/CMakeParseImplicitIncludeInfo.cmake /usr/share/cmake/Modules/CMakeParseImplicitLinkInfo.cmake /usr/share/cmake/Modules/CMakeParseLibraryArchitecture.cmake /usr/share/cmake/Modules/CMakeSystem.cmake.in /usr/share/cmake/Modules/CMakeSystemSpecificInformation.cmake /usr/share/cmake/Modules/CMakeSystemSpecificInitialize.cmake /usr/share/cmake/Modules/CMakeTestCXXCompiler.cmake /usr/share/cmake/Modules/CMakeTestCompilerCommon.cmake /usr/share/cmake/Modules/Compiler/ADSP-DetermineCompiler.cmake /usr/share/cmake/Modules/Compiler/ARMCC-DetermineCompiler.cmake /usr/share/cmake/Modules/Compiler/ARMClang-DetermineCompiler.cmake /usr/share/cmake/Modules/Compiler/AppleClang-DetermineCompiler.cmake /usr/share/cmake/Modules/Compiler/Borland-DetermineCompiler.cmake /usr/share/cmake/Modules/Compiler/CMakeCommonCompilerMacros.cmake /usr/share/cmake/Modules/Compiler/Clang-DetermineCompiler.cmake /usr/share/cmake/Modules/Compiler/Clang-DetermineCompilerInternal.cmake /usr/share/cmake/Modules/Compiler/Comeau-CXX-DetermineCompiler.cmake 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/usr/share/cmake/Modules/CMakeSystemSpecificInitialize.cmake /usr/share/cmake/Modules/Compiler/CMakeCommonCompilerMacros.cmake /usr/share/cmake/Modules/Compiler/GNU-CXX.cmake /usr/share/cmake/Modules/Compiler/GNU.cmake /usr/share/cmake/Modules/Platform/Linux-GNU-CXX.cmake /usr/share/cmake/Modules/Platform/Linux-GNU.cmake /usr/share/cmake/Modules/Platform/Linux.cmake /usr/share/cmake/Modules/Platform/UnixPaths.cmake CMakeCache.txt CMakeFiles/3.25.3/CMakeCXXCompiler.cmake CMakeFiles/3.25.3/CMakeSystem.cmake: phony
############################################# #############################################

37
src/main.c
View File

@@ -1,17 +1,42 @@
#include "main.h" #include "main.h"
#include "hardware/gpio.h" #include "hardware/gpio.h"
#include "pico/stdlib.h" #include "pico/stdlib.h"
#include "pico/time.h"
#include "tft.h" #include "tft.h"
// lcd configuration
const struct tft_config lcd_config = {
.spi = PICO_DEFAULT_SPI_INSTANCE,
.gpio_din = PICO_DEFAULT_SPI_TX_PIN,
.gpio_clk = PICO_DEFAULT_SPI_SCK_PIN,
.gpio_cs = PICO_DEFAULT_SPI_CSN_PIN,
.gpio_dc = 26,
.gpio_rst = 22,
.gpio_bl = 20,
.width = 320,
.height = 480,
};
int main() int main()
{ {
gpio_init(DLED_PIN); stdio_init_all();
gpio_set_dir(DLED_PIN, GPIO_OUT);
// gpio_init(DLED_PIN);
// gpio_set_dir(DLED_PIN, GPIO_OUT);
tft_init(&lcd_config);
while (true) { while (true) {
gpio_put(DLED_PIN, 0); // gpio_put(DLED_PIN, 0);
sleep_ms(250); // sleep_ms(250);
gpio_put(DLED_PIN, 1); // gpio_put(DLED_PIN, 1);
sleep_ms(1000); // sleep_ms(1000);
absolute_time_t start = get_absolute_time();
tft_fill(0b0000000000000000);
tft_fill(0b1111111111111111);
absolute_time_t end = get_absolute_time();
volatile int64_t diff = absolute_time_diff_us(start, end);
printf("test");
} }
return 0; return 0;
} }

3
src/main.h
View File

@@ -3,6 +3,3 @@
#include "tft.h" #include "tft.h"
#define DLED_PIN 25 #define DLED_PIN 25
// void* malloc(size_t size);
// size_t strlen(const char* str);

264
src/tft.c
View File

@@ -1,145 +1,173 @@
#include "tft.h" #include "tft.h"
void cmd(uint8_t cmd)
static struct tft_config tft_cfg;
static bool tft_data_mode = false;
void tft_cmd(uint8_t cmd, const uint8_t* data, size_t len)
{ {
CS_L; spi_set_format(tft_cfg.spi, 8, SPI_CPOL_0, SPI_CPHA_0, SPI_MSB_FIRST);
RS_C; tft_data_mode = false;
spi_write_blocking(spi_default, &cmd, 1);
CS_H; gpio_put(tft_cfg.gpio_cs, 0);
gpio_put(tft_cfg.gpio_dc, 0);
spi_write_blocking(tft_cfg.spi, &cmd, sizeof(cmd));
if (len) {
gpio_put(tft_cfg.gpio_dc, 1);
spi_write_blocking(tft_cfg.spi, data, len);
}
gpio_put(tft_cfg.gpio_cs, 1);
gpio_put(tft_cfg.gpio_dc, 1);
} }
void data(uint8_t data) void tft_caset(uint16_t xs, uint16_t xe)
{ {
CS_L; uint8_t data[] = {
RS_D; xs >> 8,
spi_write_blocking(spi_default, &data, 1); xs & 0xff,
CS_H; xe >> 8,
} xe & 0xff,
void reset() };
{
sleep_ms(120); // CASET (2Ah): Column Address Set
gpio_put(RESET_PIN, 1); tft_cmd(0x2a, data, sizeof(data));
sleep_ms(120);
gpio_put(RESET_PIN, 0);
sleep_ms(120);
gpio_put(RESET_PIN, 1);
sleep_ms(120);
} }
void init_pins() void tft_raset(uint16_t ys, uint16_t ye)
{ {
gpio_init(LED_PIN); uint8_t data[] = {
gpio_set_dir(LED_PIN, GPIO_OUT); ys >> 8,
gpio_put(LED_PIN, 1); ys & 0xff,
gpio_init(RESET_PIN); ye >> 8,
gpio_set_dir(RESET_PIN, GPIO_OUT); ye & 0xff,
gpio_init(RS_PIN); };
gpio_set_dir(RS_PIN, GPIO_OUT);
gpio_init(CS_PIN); // RASET (2Bh): Row Address Set
gpio_set_dir(CS_PIN, GPIO_OUT); tft_cmd(0x2b, data, sizeof(data));
CS_H;
spi_init(spi_default, SPI_CLK);
gpio_set_function(RX_PIN, GPIO_FUNC_SPI);
gpio_set_function(SCK_PIN, GPIO_FUNC_SPI);
gpio_set_function(TX_PIN, GPIO_FUNC_SPI);
} }
void init() void tft_init(const struct tft_config* config)
{ {
init_pins(); memcpy(&tft_cfg, config, sizeof(tft_cfg));
write_command(0x01); // Software reset set_sys_clock_khz(250 * 1000, true);
sleep_ms(120);
write_command(0x11); // Sleep exit volatile uint ach = spi_init(tft_cfg.spi, 67 * 1000 * 1000); // original 125 * 1000 * 1000
sleep_ms(120); spi_set_format(tft_cfg.spi, 8, SPI_CPOL_0, SPI_CPHA_0, SPI_MSB_FIRST);
write_command(0xF0); // Command Set control gpio_set_function(tft_cfg.gpio_din, GPIO_FUNC_SPI);
write_data(0xC3); // Enable extension command 2 partI gpio_set_function(tft_cfg.gpio_clk, GPIO_FUNC_SPI);
write_command(0xF0); // Command Set control gpio_init(tft_cfg.gpio_cs);
write_data(0x96); // Enable extension command 2 partII gpio_init(tft_cfg.gpio_dc);
gpio_init(tft_cfg.gpio_rst);
gpio_init(tft_cfg.gpio_bl);
write_command(0x36); // Memory Data Access Control MX, MY, RGB mode gpio_set_dir(tft_cfg.gpio_cs, GPIO_OUT);
write_data(0x48); // X-Mirror, Top-Left to right-Buttom, RGB gpio_set_dir(tft_cfg.gpio_dc, GPIO_OUT);
gpio_set_dir(tft_cfg.gpio_rst, GPIO_OUT);
gpio_set_dir(tft_cfg.gpio_bl, GPIO_OUT);
write_command(0x3A); // Interface Pixel Format gpio_put(tft_cfg.gpio_cs, 1);
write_data(0x55); // Control interface color format set to 16 gpio_put(tft_cfg.gpio_dc, 1);
gpio_put(tft_cfg.gpio_rst, 1);
sleep_ms(100);
write_command(0xB4); // Column inversion // SWRESET (01h): Software Reset
write_data(0x01); // 1-dot inversion tft_cmd(0x01, NULL, 0);
sleep_ms(150);
write_command(0xB6); // Display Function Control // SLPOUT (11h): Sleep Out
write_data(0x80); // Bypass tft_cmd(0x11, NULL, 0);
write_data(0x02); // Source Output Scan from S1 to S960, Gate Output scan from G1 to G480, scan cycle=2 sleep_ms(50);
write_data(0x3B); // LCD Drive Line=8*(59+1)
write_command(0xE8); // Display Output Ctrl Adjust // COLMOD (3Ah): Interface Pixel Format
write_data(0x40); // - RGB interface color format = 65K of RGB interface
write_data(0x8A); // - Control interface color format = 16bit/pixel
write_data(0x00); tft_cmd(0x3a, (uint8_t[]) { 0x55 }, 1);
write_data(0x00); sleep_ms(10);
write_data(0x29); // Source eqaulizing period time= 22.5 us
write_data(0x19); // Timing for "Gate start"=25 (Tclk)
write_data(0xA5); // Timing for "Gate End"=37 (Tclk), Gate driver EQ function ON
write_data(0x33);
write_command(0xC1); // Power control2 // MADCTL (36h): Memory Data Access Control
write_data(0x06); // VAP(GVDD)=3.85+( vcom+vcom offset), VAN(GVCL)=-3.85+( vcom+vcom offset) // - Page Address Order = Top to Bottom
// - Column Address Order = Left to Right
// - Page/Column Order = Normal Mode
// - Line Address Order = LCD Refresh Top to Bottom
// - RGB/BGR Order = RGB
// - Display Data Latch Data Order = LCD Refresh Left to Right
tft_cmd(0x36, (uint8_t[]) { 0x00 }, 1);
write_command(0xC2); // Power control 3 tft_caset(0, tft_cfg.width);
write_data(0xA7); // Source driving current level=low, Gamma driving current level=High tft_raset(0, tft_cfg.height);
write_command(0xC5); // VCOM Control // INVON (21h): Display Inversion On
write_data(0x18); // VCOM=0.9 // tft_cmd(0x21, NULL, 0);
// sleep_ms(10);
sleep_ms(120); // NORON (13h): Normal Display Mode On
tft_cmd(0x13, NULL, 0);
sleep_ms(10);
// ST7796 Gamma Sequence // DISPON (29h): Display On
write_command(0xE0); // Gamma"+" tft_cmd(0x29, NULL, 0);
write_data(0xF0); sleep_ms(10);
write_data(0x09);
write_data(0x0b);
write_data(0x06);
write_data(0x04);
write_data(0x15);
write_data(0x2F);
write_data(0x54);
write_data(0x42);
write_data(0x3C);
write_data(0x17);
write_data(0x14);
write_data(0x18);
write_data(0x1B);
write_command(0xE1); // Gamma"-" gpio_put(tft_cfg.gpio_bl, 1);
write_data(0xE0);
write_data(0x09);
write_data(0x0B);
write_data(0x06);
write_data(0x04);
write_data(0x03);
write_data(0x2B);
write_data(0x43);
write_data(0x42);
write_data(0x3B);
write_data(0x16);
write_data(0x14);
write_data(0x17);
write_data(0x1B);
sleep_ms(120);
write_command(0xF0); // Command Set control
write_data(0x3C); // Disable extension command 2 partI
write_command(0xF0); // Command Set control
write_data(0x69); // Disable extension command 2 partII
CS_H;
sleep_ms(120);
CS_L;
write_command(0x29); // Display on
} }
void set_pixel_red() void tft_ramwr()
{ {
write_data(0b111111000100000000); gpio_put(tft_cfg.gpio_cs, 0);
gpio_put(tft_cfg.gpio_dc, 0);
// RAMWR (2Ch): Memory Write
uint8_t cmd = 0x2c;
spi_write_blocking(tft_cfg.spi, &cmd, sizeof(cmd));
gpio_put(tft_cfg.gpio_cs, 0);
gpio_put(tft_cfg.gpio_dc, 1);
}
void tft_write(const void* data, size_t len)
{
spi_write16_blocking(tft_cfg.spi, data, len / 2);
}
void tft_put(uint16_t pixel)
{
tft_write(&pixel, sizeof(pixel));
}
void tft_fill(uint16_t pixel)
{
int num_pixels = tft_cfg.width * tft_cfg.height;
tft_set_cursor(0, 0);
if (!tft_data_mode) {
tft_ramwr();
spi_set_format(tft_cfg.spi, 16, SPI_CPOL_0, SPI_CPHA_0, SPI_MSB_FIRST);
tft_data_mode = true;
}
printf("test");
for (int i = 0; i < num_pixels; i++) {
tft_put(pixel);
}
printf("test");
}
void tft_set_cursor(uint16_t x, uint16_t y)
{
tft_caset(x, tft_cfg.width);
tft_raset(y, tft_cfg.height);
}
void tft_vertical_scroll(uint16_t row)
{
uint8_t data[] = {
(row >> 8) & 0xff,
row & 0x00ff
};
// VSCSAD (37h): Vertical Scroll Start Address of RAM
tft_cmd(0x37, data, sizeof(data));
} }

41
src/tft.h
View File

@@ -3,26 +3,31 @@
#include "hardware/gpio.h" #include "hardware/gpio.h"
#include "hardware/spi.h" #include "hardware/spi.h"
#include "hardware/divider.h"
#include "pico/stdlib.h" #include "pico/stdlib.h"
#include <stdio.h>
#define LED_PIN 20 struct tft_config {
#define RESET_PIN 22 spi_inst_t* spi;
#define RS_PIN 26 uint gpio_din;
#define RX_PIN PICO_DEFAULT_SPI_RX_PIN uint gpio_clk;
#define CS_PIN PICO_DEFAULT_SPI_CSN_PIN int gpio_cs;
#define SCK_PIN PICO_DEFAULT_SPI_SCK_PIN uint gpio_dc;
#define TX_PIN PICO_DEFAULT_SPI_TX_PIN uint gpio_rst;
#define SPI_CLK 66666666 uint gpio_bl;
#define CS_L gpio_put(CS_PIN, 0) uint16_t width;
#define CS_H gpio_put(CS_PIN, 1) uint16_t height;
#define RS_C gpio_put(RS_PIN, 0) };
#define RS_D gpio_put(RS_PIN, 1)
void write_command(uint8_t cmd); void tft_cmd(uint8_t cmd, const uint8_t* data, size_t len);
void write_data(uint8_t data); void tft_caset(uint16_t xs, uint16_t xe);
void reset(); void tft_raset(uint16_t ys, uint16_t ye);
void init_pins(); void tft_init(const struct tft_config* config);
void init(); void tft_ramwr();
void set_pixel_red(); void tft_write(const void* data, size_t len);
void tft_put(uint16_t pixel);
void tft_fill(uint16_t pixel);
void tft_set_cursor(uint16_t x, uint16_t y);
void tft_vertical_scroll(uint16_t row);
#endif // TFT_H #endif // TFT_H

57
src/tft.pio Normal file
View File

@@ -0,0 +1,57 @@
;
; Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
;
; SPDX-License-Identifier: BSD-3-Clause
;
.program tft
.side_set 1
; This is just a simple clocked serial TX. At 125 MHz system clock we can
; sustain up to 62.5 Mbps.
; Data on OUT pin 0
; Clock on side-set pin 0
.wrap_target
out pins, 1 side 0 ; stall here if no data (clock low)
nop side 1
.wrap
% c-sdk {
// For optimal use of DMA bandwidth we would use an autopull threshold of 32,
// but we are using a threshold of 8 here (consume 1 byte from each FIFO entry
// and discard the remainder) to make things easier for software on the other side
static inline void tft_program_init(PIO pio, uint sm, uint offset, uint data_pin, uint clk_pin, float clk_div) {
pio_gpio_init(pio, data_pin);
pio_gpio_init(pio, clk_pin);
pio_sm_set_consecutive_pindirs(pio, sm, data_pin, 1, true);
pio_sm_set_consecutive_pindirs(pio, sm, clk_pin, 1, true);
pio_sm_config c = st7789_lcd_program_get_default_config(offset);
sm_config_set_sideset_pins(&c, clk_pin);
sm_config_set_out_pins(&c, data_pin, 1);
sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
sm_config_set_clkdiv(&c, clk_div);
sm_config_set_out_shift(&c, false, true, 8);
pio_sm_init(pio, sm, offset, &c);
pio_sm_set_enabled(pio, sm, true);
}
// Making use of the narrow store replication behaviour on RP2040 to get the
// data left-justified (as we are using shift-to-left to get MSB-first serial)
static inline void tft_put(PIO pio, uint sm, uint8_t x) {
while (pio_sm_is_tx_fifo_full(pio, sm))
;
*(volatile uint8_t*)&pio->txf[sm] = x;
}
// SM is done when it stalls on an empty FIFO
static inline void tft_wait_idle(PIO pio, uint sm) {
uint32_t sm_stall_mask = 1u << (sm + PIO_FDEBUG_TXSTALL_LSB);
pio->fdebug = sm_stall_mask;
while (!(pio->fdebug & sm_stall_mask))
;
}
%}